* [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation
@ 2015-01-29 9:54 Manuel Lauss
2015-01-29 9:54 ` [PATCH 2/2] MIPS: Alchemy: preset loops_per_jiffy based on CPU clock Manuel Lauss
2015-01-29 10:35 ` [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation Sergei Shtylyov
0 siblings, 2 replies; 4+ messages in thread
From: Manuel Lauss @ 2015-01-29 9:54 UTC (permalink / raw)
To: Linux-MIPS; +Cc: Ralf Baechle, Manuel Lauss
The Au1000 and Au1500 calculate the LRCLK a bit differently than
newer models: a single bit in MEM_STCFG0 selects if pclk is divided
by 4 or 5.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
arch/mips/alchemy/common/clock.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index 48a9dfc..428c9f0 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -315,17 +315,27 @@ static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)
/* lrclk: external synchronous static bus clock ***********************/
-static struct clk __init *alchemy_clk_setup_lrclk(const char *pn)
+static struct clk __init *alchemy_clk_setup_lrclk(const char *pn, int t)
{
- /* MEM_STCFG0[15:13] = divisor.
+ /* Au1000, Au1500: MEM_STCFG0[11]: If bit is set, lrclk=pclk/5,
+ * otherwise lrclk=pclk/4.
+ * All other variants: MEM_STCFG0[15:13] = divisor.
* L/RCLK = periph_clk / (divisor + 1)
* On Au1000, Au1500, Au1100 it's called LCLK,
* on later models it's called RCLK, but it's the same thing.
*/
struct clk *c;
- unsigned long v = alchemy_rdsmem(AU1000_MEM_STCFG0) >> 13;
+ unsigned long v;
- v = (v & 7) + 1;
+ switch (t) {
+ case ALCHEMY_CPU_AU1000:
+ case ALCHEMY_CPU_AU1500:
+ v = 4 + ((alchemy_rdsmem(AU1000_MEM_STCFG0) >> 11) & 1);
+ break;
+ default: /* all other models */
+ v = alchemy_rdsmem(AU1000_MEM_STCFG0) >> 13;
+ v = (v & 7) + 1;
+ }
c = clk_register_fixed_factor(NULL, ALCHEMY_LR_CLK,
pn, 0, 1, v);
if (!IS_ERR(c))
@@ -1060,7 +1070,7 @@ static int __init alchemy_clk_init(void)
ERRCK(c)
/* L/RCLK: external static bus clock for synchronous mode */
- c = alchemy_clk_setup_lrclk(ALCHEMY_PERIPH_CLK);
+ c = alchemy_clk_setup_lrclk(ALCHEMY_PERIPH_CLK, ctype);
ERRCK(c)
/* Frequency dividers 0-5 */
--
2.2.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 2/2] MIPS: Alchemy: preset loops_per_jiffy based on CPU clock
2015-01-29 9:54 [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation Manuel Lauss
@ 2015-01-29 9:54 ` Manuel Lauss
2015-01-29 10:38 ` Sergei Shtylyov
2015-01-29 10:35 ` [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation Sergei Shtylyov
1 sibling, 1 reply; 4+ messages in thread
From: Manuel Lauss @ 2015-01-29 9:54 UTC (permalink / raw)
To: Linux-MIPS; +Cc: Ralf Baechle, Manuel Lauss
This was lost during the rewrite of clock framework support.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
arch/mips/alchemy/common/clock.c | 6 ++++++
arch/mips/alchemy/common/setup.c | 4 +++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index 428c9f0..680fbb6 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -133,6 +133,12 @@ static unsigned long alchemy_clk_cpu_recalc(struct clk_hw *hw,
return t;
}
+void __init alchemy_set_lpj(void)
+{
+ preset_lpj = alchemy_clk_cpu_recalc(NULL, ALCHEMY_ROOTCLK_RATE);
+ preset_lpj = preset_lpj / 2 / HZ;
+}
+
static struct clk_ops alchemy_clkops_cpu = {
.recalc_rate = alchemy_clk_cpu_recalc,
};
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 4e72daf..2902138 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -34,10 +34,12 @@
#include <au1000.h>
extern void __init board_setup(void);
-extern void set_cpuspec(void);
+extern void __init alchemy_set_lpj(void);
void __init plat_mem_setup(void)
{
+ alchemy_set_lpj();
+
if (au1xxx_cpu_needs_config_od())
/* Various early Au1xx0 errata corrected by this */
set_c0_config(1 << 19); /* Set Config[OD] */
--
2.2.2
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] MIPS: Alchemy: preset loops_per_jiffy based on CPU clock
2015-01-29 9:54 ` [PATCH 2/2] MIPS: Alchemy: preset loops_per_jiffy based on CPU clock Manuel Lauss
@ 2015-01-29 10:38 ` Sergei Shtylyov
0 siblings, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2015-01-29 10:38 UTC (permalink / raw)
To: Manuel Lauss, Linux-MIPS; +Cc: Ralf Baechle
On 1/29/2015 12:54 PM, Manuel Lauss wrote:
> This was lost during the rewrite of clock framework support.
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
> ---
> arch/mips/alchemy/common/clock.c | 6 ++++++
> arch/mips/alchemy/common/setup.c | 4 +++-
> 2 files changed, 9 insertions(+), 1 deletion(-)
> diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
> index 428c9f0..680fbb6 100644
> --- a/arch/mips/alchemy/common/clock.c
> +++ b/arch/mips/alchemy/common/clock.c
> @@ -133,6 +133,12 @@ static unsigned long alchemy_clk_cpu_recalc(struct clk_hw *hw,
> return t;
> }
>
> +void __init alchemy_set_lpj(void)
> +{
> + preset_lpj = alchemy_clk_cpu_recalc(NULL, ALCHEMY_ROOTCLK_RATE);
> + preset_lpj = preset_lpj / 2 / HZ;
How about "preset_lpj /= 2 * HZ;"?
[...]
> diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
> index 4e72daf..2902138 100644
> --- a/arch/mips/alchemy/common/setup.c
> +++ b/arch/mips/alchemy/common/setup.c
> @@ -34,10 +34,12 @@
> #include <au1000.h>
>
> extern void __init board_setup(void);
> -extern void set_cpuspec(void);
Not documented in the change-log?
> +extern void __init alchemy_set_lpj(void);
>
> void __init plat_mem_setup(void)
> {
> + alchemy_set_lpj();
> +
[...]
WBR, Sergei
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation
2015-01-29 9:54 [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation Manuel Lauss
2015-01-29 9:54 ` [PATCH 2/2] MIPS: Alchemy: preset loops_per_jiffy based on CPU clock Manuel Lauss
@ 2015-01-29 10:35 ` Sergei Shtylyov
1 sibling, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2015-01-29 10:35 UTC (permalink / raw)
To: Manuel Lauss, Linux-MIPS; +Cc: Ralf Baechle
Hello.
On 1/29/2015 12:54 PM, Manuel Lauss wrote:
> The Au1000 and Au1500 calculate the LRCLK a bit differently than
> newer models: a single bit in MEM_STCFG0 selects if pclk is divided
> by 4 or 5.
> Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
> ---
> arch/mips/alchemy/common/clock.c | 20 +++++++++++++++-----
> 1 file changed, 15 insertions(+), 5 deletions(-)
> diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
> index 48a9dfc..428c9f0 100644
> --- a/arch/mips/alchemy/common/clock.c
> +++ b/arch/mips/alchemy/common/clock.c
> @@ -315,17 +315,27 @@ static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)
>
> /* lrclk: external synchronous static bus clock ***********************/
>
> -static struct clk __init *alchemy_clk_setup_lrclk(const char *pn)
> +static struct clk __init *alchemy_clk_setup_lrclk(const char *pn, int t)
> {
> - /* MEM_STCFG0[15:13] = divisor.
> + /* Au1000, Au1500: MEM_STCFG0[11]: If bit is set, lrclk=pclk/5,
> + * otherwise lrclk=pclk/4.
> + * All other variants: MEM_STCFG0[15:13] = divisor.
> * L/RCLK = periph_clk / (divisor + 1)
> * On Au1000, Au1500, Au1100 it's called LCLK,
> * on later models it's called RCLK, but it's the same thing.
> */
> struct clk *c;
> - unsigned long v = alchemy_rdsmem(AU1000_MEM_STCFG0) >> 13;
> + unsigned long v;
>
> - v = (v & 7) + 1;
> + switch (t) {
> + case ALCHEMY_CPU_AU1000:
> + case ALCHEMY_CPU_AU1500:
> + v = 4 + ((alchemy_rdsmem(AU1000_MEM_STCFG0) >> 11) & 1);
> + break;
> + default: /* all other models */
> + v = alchemy_rdsmem(AU1000_MEM_STCFG0) >> 13;
How about reading MEM_STCFG0 only once, before *switch*?
[...]
WBR, Sergei
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2015-01-29 10:38 UTC | newest]
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2015-01-29 9:54 [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation Manuel Lauss
2015-01-29 9:54 ` [PATCH 2/2] MIPS: Alchemy: preset loops_per_jiffy based on CPU clock Manuel Lauss
2015-01-29 10:38 ` Sergei Shtylyov
2015-01-29 10:35 ` [PATCH 1/2] MIPS: Alchemy: fix Au1000/Au1500 LRCLK calculation Sergei Shtylyov
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