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From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 3/6] target-tricore: Add instructions of RRR2 opcode format
Date: Wed, 18 Feb 2015 00:06:05 +0000	[thread overview]
Message-ID: <54E3D76D.6080209@mail.uni-paderborn.de> (raw)
In-Reply-To: <54E39D03.9040208@twiddle.net>


On 02/17/2015 07:56 PM, Richard Henderson wrote:
> On 02/11/2015 08:49 AM, Bastian Koppelmann wrote:
>> -    OPC2_32_RRR2_MADD_U_32                       = 0x68,
>> +    OPC2_32_RRR2_MADD_U_64                       = 0x68,
> I guess this is a change to the spec, after the V1.0, 2012-05 edition that I have?
Well, I guess this is a mistake in the documentation. The signature says 
the result is 32 bit, but the pseudo-code states E[c] = result[63:0] and 
E[c] is clearly a 64 bit register.
My tests with the manufacturers simulator show the 64 bit behavior, too.

Cheers,
Bastian

  reply	other threads:[~2015-02-17 23:04 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-11 16:48 [Qemu-devel] [PATCH v2 0/6] TriCore: Add RRR1 and RRR2 instructions Bastian Koppelmann
2015-02-11 16:48 ` [Qemu-devel] [PATCH v2 1/6] target-tricore: Fix RLC_ADDI, RLC_ADDIH using wrong microcode helper Bastian Koppelmann
2015-02-11 16:48 ` [Qemu-devel] [PATCH v2 2/6] target-tricore: fix msub32_suov return wrong results Bastian Koppelmann
2015-02-11 16:49 ` [Qemu-devel] [PATCH v2 3/6] target-tricore: Add instructions of RRR2 opcode format Bastian Koppelmann
2015-02-17 19:56   ` Richard Henderson
2015-02-18  0:06     ` Bastian Koppelmann [this message]
2015-02-11 16:49 ` [Qemu-devel] [PATCH v2 4/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x83 as first opcode Bastian Koppelmann
2015-02-11 16:49 ` [Qemu-devel] [PATCH v2 5/6] target-tricore: Add instructions of RRR1 opcode format, which have 0x43 " Bastian Koppelmann
2015-02-11 16:49 ` [Qemu-devel] [PATCH v2 6/6] target-tricore: Add instructions of RRR1 opcode format, which have 0xc3 " Bastian Koppelmann
2015-02-17 13:17 ` [Qemu-devel] [PATCH v2 0/6] TriCore: Add RRR1 and RRR2 instructions Bastian Koppelmann
2015-02-17 20:12 ` Richard Henderson

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