[Qemu-devel] [PULL] tricore patches for 2.3-rc2

[Qemu-devel] [PULL] tricore patches for 2.3-rc2

[Bastian Koppelmann]

The following changes since commit 627f91b1f80fecc73d00727181a9ddb6162cc30e:

  Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging (2015-03-28 10:10:04 +0000)

are available in the git repository at:

  https://github.com/bkoppelmann/qemu-tricore-upstream.git tags/pull-tricore-20150330

for you to fetch changes up to f1fdaf552974ee2ef6ec1ba3cf1e18c2951533e1:

  target-tricore: fix CACHEA/I_POSTINC/PREINC using data register.. (2015-03-30 13:39:38 +0200)

----------------------------------------------------------------
TriCore bugfixes

----------------------------------------------------------------
Bastian Koppelmann (1):
      target-tricore: fix CACHEA/I_POSTINC/PREINC using data register..

 target-tricore/translate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
-- 
2.3.4

[Qemu-devel] [PULL] target-tricore: fix CACHEA/I_POSTINC/PREINC using data register..

[Bastian Koppelmann]

..for address calculation instead address registers.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
 target-tricore/translate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index bbcfee9..54a48cd 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -4509,14 +4509,14 @@ static void decode_bo_addrmode_post_pre_base(CPUTriCoreState *env,
     case OPC2_32_BO_CACHEA_I_POSTINC:
         /* instruction to access the cache, but we still need to handle
            the addressing mode */
-        tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
+        tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
         break;
     case OPC2_32_BO_CACHEA_WI_PREINC:
     case OPC2_32_BO_CACHEA_W_PREINC:
     case OPC2_32_BO_CACHEA_I_PREINC:
         /* instruction to access the cache, but we still need to handle
            the addressing mode */
-        tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
+        tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
         break;
     case OPC2_32_BO_CACHEI_WI_SHORTOFF:
     case OPC2_32_BO_CACHEI_W_SHORTOFF:
@@ -4526,13 +4526,13 @@ static void decode_bo_addrmode_post_pre_base(CPUTriCoreState *env,
     case OPC2_32_BO_CACHEI_W_POSTINC:
     case OPC2_32_BO_CACHEI_WI_POSTINC:
         if (tricore_feature(env, TRICORE_FEATURE_131)) {
-            tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
+            tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
         } /* TODO: else raise illegal opcode trap */
         break;
     case OPC2_32_BO_CACHEI_W_PREINC:
     case OPC2_32_BO_CACHEI_WI_PREINC:
         if (tricore_feature(env, TRICORE_FEATURE_131)) {
-            tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
+            tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
         } /* TODO: else raise illegal opcode trap */
         break;
     case OPC2_32_BO_ST_A_SHORTOFF:
-- 
2.3.4

Re: [Qemu-devel] [PULL] tricore patches for 2.3-rc2

[Andreas Färber]

Hi Bastian,

Am 30.03.2015 um 13:46 schrieb Bastian Koppelmann:
> Bastian Koppelmann (1):
>       target-tricore: fix CACHEA/I_POSTINC/PREINC using data register..

FYI git-format-patch has a --numbered option that forces [PULL 1/1].

Cheers,
Andreas

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GF: Felix Imendörffer, Jane Smithard, Jennifer Guild, Dilip Upmanyu,
Graham Norton; HRB 21284 (AG Nürnberg)

Re: [Qemu-devel] [PULL] tricore patches for 2.3-rc2

[Bastian Koppelmann]

On 03/30/2015 06:34 PM, Andreas Färber wrote:
> Hi Bastian,
>
> Am 30.03.2015 um 13:46 schrieb Bastian Koppelmann:
>> Bastian Koppelmann (1):
>>        target-tricore: fix CACHEA/I_POSTINC/PREINC using data register..
> FYI git-format-patch has a --numbered option that forces [PULL 1/1].
Thanks. I'll change it next time :). I didn't know this was necessary.

Cheers,
Bastian

Re: [Qemu-devel] [PULL] tricore patches for 2.3-rc2

[Peter Maydell]

On 30 March 2015 at 12:46, Bastian Koppelmann
<kbastian@mail.uni-paderborn.de> wrote:
> The following changes since commit 627f91b1f80fecc73d00727181a9ddb6162cc30e:
>
>   Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into staging (2015-03-28 10:10:04 +0000)
>
> are available in the git repository at:
>
>   https://github.com/bkoppelmann/qemu-tricore-upstream.git tags/pull-tricore-20150330
>
> for you to fetch changes up to f1fdaf552974ee2ef6ec1ba3cf1e18c2951533e1:
>
>   target-tricore: fix CACHEA/I_POSTINC/PREINC using data register.. (2015-03-30 13:39:38 +0200)
>
> ----------------------------------------------------------------
> TriCore bugfixes
>
> ----------------------------------------------------------------

Applied, thanks.

-- PMM