All of lore.kernel.org
 help / color / mirror / Atom feed
From: Marc Zyngier <marc.zyngier@arm.com>
To: "Minghuan.Lian@freescale.com" <Minghuan.Lian@freescale.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	Arnd Bergmann <arnd@arndb.de>,
	"Mingkai.Hu@freescale.com" <Mingkai.Hu@freescale.com>,
	Roy Zang <tie-fei.zang@freescale.com>,
	Stuart Yoder <stuart.yoder@freescale.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Scott Wood <scottwood@freescale.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Jason Cooper <jason@lakedaemon.net>,
	Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH 1/2] irqchip/gicv3-its: Support share device ID
Date: Thu, 16 Apr 2015 11:04:00 +0100	[thread overview]
Message-ID: <552F8910.9000701@arm.com> (raw)
In-Reply-To: <DM2PR0301MB0640576D29E70392C41444DFE2E40@DM2PR0301MB0640.namprd03.prod.outlook.com>

On 16/04/15 03:57, Minghuan.Lian@freescale.com wrote:
> Hi Marc,
> 
> Please see my comments inline
> 
>> -----Original Message----- From: Marc Zyngier 
>> [mailto:marc.zyngier@arm.com] Sent: Thursday, April 16, 2015 12:37
>>  AM To: Lian Minghuan-B31939 Cc: linux-pci@vger.kernel.org; Arnd 
>> Bergmann; Hu Mingkai-B21284; Zang Roy-R61911; Yoder Stuart-B08248;
>>  Bjorn Helgaas; Wood Scott-B07421; linux- 
>> arm-kernel@lists.infradead.org; Jason Cooper; Thomas Gleixner 
>> Subject: Re: [PATCH 1/2] irqchip/gicv3-its: Support share device 
>> ID
>> 
>> On Wed, 15 Apr 2015 17:49:23 +0800 Minghuan Lian 
>> <Minghuan.Lian@freescale.com> wrote:
>> 
>>> SMMU of some platforms can only isolate limited device ID. This 
>>> may require that all PCI devices share the same ITS device with 
>>> the fixed device ID. The patch adds function 
>>> arch_msi_share_devid_update used for these platforms to update 
>>> the fixed device ID and maximum MSI interrupts number.
>>> 
>>> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> --- 
>>> drivers/irqchip/irq-gic-v3-its.c | 11 +++++++++++ 1 file changed,
>>> 11 insertions(+)
>>> 
>>> diff --git a/drivers/irqchip/irq-gic-v3-its.c 
>>> b/drivers/irqchip/irq-gic-v3-its.c index d0374a6..be78d0a 100644 
>>> --- a/drivers/irqchip/irq-gic-v3-its.c +++ 
>>> b/drivers/irqchip/irq-gic-v3-its.c @@ -1169,6 +1169,15 @@ static
>>>  int its_get_pci_alias(struct pci_dev *pdev,
>> u16 alias, void *data)
>>> return 0; }
>>> 
>>> +void __weak +arch_msi_share_devid_update(struct pci_dev *pdev, 
>>> u32 *dev_id, u32 +*nvesc) { +	/* +	 * use PCI_DEVID NOT share 
>>> device ID as default +	 * so nothing need to do +	 */ +} +
>> 
>> NAK. On top of being ugly as sin, this breaks any form of 
>> multiplatform support. No way anything like this is going in. Guys,
>> you really should know better.
>> 
> [Minghuan]  The current ITS MSI will create an individual ITS device 
> for each PCIe device, and use PCI_DEVID as ITS dev_id However, out 
> platform only supports  ITS dev_id 0 -63.  A normal PCIe DEVID of 
> 0000:01:00.0 is 256 bigger than 63. Besides, because of the limited 
> dev_id number, all the PCIe device will share the same ITS dev. Our 
> platform provides a hardware module LUT to map PCI DEVID to ITS 
> dev_id.  So, when creating ITS device, we need to update dev_id and 
> the nvesc. I may change pci_for_each_dma_alias to add a new flag to 
> use alias_bus and alias_devfn.

Yes, that's where you should take care of this hack.

> But I also need to update nvesc which should contains all the PCI 
> device MSI/MSIX nvesc and PCIe PME, aerdrv interrupts. The main 
> difference is that we need a ITS device to service multiple PCIe 
> devices. Could you give me some suggestions how to implement this 
> requirement.

It you take the time to read the code in its_msi_prepare(), you'll
quickly notice that we already handle aliasing of multiple PCI devices
to a single DeviceID. Once you have the aliasing taken care of in
pci_for_each_dma_alias, the ITS code will automatically adjust the
number of vectors (using its_get_pci_alias as a callback from
pci_for_each_dma_alias).

>>> static int its_msi_prepare(struct irq_domain *domain, struct 
>>> device *dev, int nvec, msi_alloc_info_t *info)  { @@ -1185,6
>> +1194,8 @@
>>> static int its_msi_prepare(struct irq_domain *domain, struct 
>>> device *dev, dev_alias.count = nvec;
>>> 
>>> pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias); + 
>>> arch_msi_share_devid_update(pdev, &dev_alias.dev_id, 
>>> +&dev_alias.count); +
>> 
>> See the function above? That's where the aliasing should be taken 
>> care of.
>> 
> [Minghuan] The alias will use dma_alias_devfn, but it does not 
> contains alias_bus. I need to translate PCI_DEVID to a fixed ID.

Then add another flag to deal with that. Your hardware is "creative"
(some might even argue it is broken), so deal with the creativity as a
quirk, which has no business in the ITS driver (or any other driver).

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] irqchip/gicv3-its: Support share device ID
Date: Thu, 16 Apr 2015 11:04:00 +0100	[thread overview]
Message-ID: <552F8910.9000701@arm.com> (raw)
In-Reply-To: <DM2PR0301MB0640576D29E70392C41444DFE2E40@DM2PR0301MB0640.namprd03.prod.outlook.com>

On 16/04/15 03:57, Minghuan.Lian at freescale.com wrote:
> Hi Marc,
> 
> Please see my comments inline
> 
>> -----Original Message----- From: Marc Zyngier 
>> [mailto:marc.zyngier at arm.com] Sent: Thursday, April 16, 2015 12:37
>>  AM To: Lian Minghuan-B31939 Cc: linux-pci at vger.kernel.org; Arnd 
>> Bergmann; Hu Mingkai-B21284; Zang Roy-R61911; Yoder Stuart-B08248;
>>  Bjorn Helgaas; Wood Scott-B07421; linux- 
>> arm-kernel at lists.infradead.org; Jason Cooper; Thomas Gleixner 
>> Subject: Re: [PATCH 1/2] irqchip/gicv3-its: Support share device 
>> ID
>> 
>> On Wed, 15 Apr 2015 17:49:23 +0800 Minghuan Lian 
>> <Minghuan.Lian@freescale.com> wrote:
>> 
>>> SMMU of some platforms can only isolate limited device ID. This 
>>> may require that all PCI devices share the same ITS device with 
>>> the fixed device ID. The patch adds function 
>>> arch_msi_share_devid_update used for these platforms to update 
>>> the fixed device ID and maximum MSI interrupts number.
>>> 
>>> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> --- 
>>> drivers/irqchip/irq-gic-v3-its.c | 11 +++++++++++ 1 file changed,
>>> 11 insertions(+)
>>> 
>>> diff --git a/drivers/irqchip/irq-gic-v3-its.c 
>>> b/drivers/irqchip/irq-gic-v3-its.c index d0374a6..be78d0a 100644 
>>> --- a/drivers/irqchip/irq-gic-v3-its.c +++ 
>>> b/drivers/irqchip/irq-gic-v3-its.c @@ -1169,6 +1169,15 @@ static
>>>  int its_get_pci_alias(struct pci_dev *pdev,
>> u16 alias, void *data)
>>> return 0; }
>>> 
>>> +void __weak +arch_msi_share_devid_update(struct pci_dev *pdev, 
>>> u32 *dev_id, u32 +*nvesc) { +	/* +	 * use PCI_DEVID NOT share 
>>> device ID as default +	 * so nothing need to do +	 */ +} +
>> 
>> NAK. On top of being ugly as sin, this breaks any form of 
>> multiplatform support. No way anything like this is going in. Guys,
>> you really should know better.
>> 
> [Minghuan]  The current ITS MSI will create an individual ITS device 
> for each PCIe device, and use PCI_DEVID as ITS dev_id However, out 
> platform only supports  ITS dev_id 0 -63.  A normal PCIe DEVID of 
> 0000:01:00.0 is 256 bigger than 63. Besides, because of the limited 
> dev_id number, all the PCIe device will share the same ITS dev. Our 
> platform provides a hardware module LUT to map PCI DEVID to ITS 
> dev_id.  So, when creating ITS device, we need to update dev_id and 
> the nvesc. I may change pci_for_each_dma_alias to add a new flag to 
> use alias_bus and alias_devfn.

Yes, that's where you should take care of this hack.

> But I also need to update nvesc which should contains all the PCI 
> device MSI/MSIX nvesc and PCIe PME, aerdrv interrupts. The main 
> difference is that we need a ITS device to service multiple PCIe 
> devices. Could you give me some suggestions how to implement this 
> requirement.

It you take the time to read the code in its_msi_prepare(), you'll
quickly notice that we already handle aliasing of multiple PCI devices
to a single DeviceID. Once you have the aliasing taken care of in
pci_for_each_dma_alias, the ITS code will automatically adjust the
number of vectors (using its_get_pci_alias as a callback from
pci_for_each_dma_alias).

>>> static int its_msi_prepare(struct irq_domain *domain, struct 
>>> device *dev, int nvec, msi_alloc_info_t *info)  { @@ -1185,6
>> +1194,8 @@
>>> static int its_msi_prepare(struct irq_domain *domain, struct 
>>> device *dev, dev_alias.count = nvec;
>>> 
>>> pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias); + 
>>> arch_msi_share_devid_update(pdev, &dev_alias.dev_id, 
>>> +&dev_alias.count); +
>> 
>> See the function above? That's where the aliasing should be taken 
>> care of.
>> 
> [Minghuan] The alias will use dma_alias_devfn, but it does not 
> contains alias_bus. I need to translate PCI_DEVID to a fixed ID.

Then add another flag to deal with that. Your hardware is "creative"
(some might even argue it is broken), so deal with the creativity as a
quirk, which has no business in the ITS driver (or any other driver).

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2015-04-16 10:04 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-15  9:49 [PATCH] irqchip/gicv3-its: Decrease page size when needed Minghuan Lian
2015-04-15  9:49 ` Minghuan Lian
2015-04-15  9:49 ` [PATCH 1/2] irqchip/gicv3-its: Support share device ID Minghuan Lian
2015-04-15  9:49   ` Minghuan Lian
2015-04-15 11:08   ` Varun Sethi
2015-04-15 11:08     ` Varun Sethi
2015-04-15 11:38     ` Minghuan.Lian
2015-04-15 11:38       ` Minghuan.Lian at freescale.com
2015-04-15 13:18       ` Varun Sethi
2015-04-15 13:18         ` Varun Sethi
2015-04-16 10:40         ` Will Deacon
2015-04-16 10:40           ` Will Deacon
2015-04-17 14:19           ` Stuart Yoder
2015-04-17 14:19             ` Stuart Yoder
2015-04-17 17:57             ` Varun Sethi
2015-04-17 17:57               ` Varun Sethi
2015-04-22 17:07             ` Will Deacon
2015-04-22 17:07               ` Will Deacon
2015-04-22 18:40               ` Varun Sethi
2015-04-22 18:40                 ` Varun Sethi
2015-04-22 19:41               ` Stuart Yoder
2015-04-22 19:41                 ` Stuart Yoder
2015-04-24 16:18                 ` Will Deacon
2015-04-24 16:18                   ` Will Deacon
2015-04-24 16:44                   ` Marc Zyngier
2015-04-24 16:44                     ` Marc Zyngier
2015-04-24 18:18                     ` Stuart Yoder
2015-04-24 18:18                       ` Stuart Yoder
2015-04-25 10:39                       ` Marc Zyngier
2015-04-25 10:39                         ` Marc Zyngier
2015-04-26 18:20                         ` Varun Sethi
2015-04-26 18:20                           ` Varun Sethi
2015-04-27  7:58                           ` Marc Zyngier
2015-04-27  7:58                             ` Marc Zyngier
2015-04-27 13:08                             ` Varun Sethi
2015-04-27 13:08                               ` Varun Sethi
2015-04-27 17:04                               ` Will Deacon
2015-04-27 17:04                                 ` Will Deacon
2015-05-01 15:23                                 ` Stuart Yoder
2015-05-01 15:23                                   ` Stuart Yoder
2015-05-01 15:26                                   ` Will Deacon
2015-05-01 15:26                                     ` Will Deacon
2015-04-27 17:17                               ` Marc Zyngier
2015-04-27 17:17                                 ` Marc Zyngier
2015-04-24 19:24                     ` Stuart Yoder
2015-04-24 19:24                       ` Stuart Yoder
2015-04-24 18:09                   ` Stuart Yoder
2015-04-24 18:09                     ` Stuart Yoder
2015-04-26 18:26                 ` Varun Sethi
2015-04-26 18:26                   ` Varun Sethi
2015-04-15 16:36   ` Marc Zyngier
2015-04-15 16:36     ` Marc Zyngier
2015-04-16  2:57     ` Minghuan.Lian
2015-04-16  2:57       ` Minghuan.Lian at freescale.com
2015-04-16 10:04       ` Marc Zyngier [this message]
2015-04-16 10:04         ` Marc Zyngier
2015-04-16 10:57         ` Minghuan.Lian
2015-04-16 10:57           ` Minghuan.Lian at freescale.com
2015-04-16 11:50           ` Marc Zyngier
2015-04-16 11:50             ` Marc Zyngier
2015-04-16 18:38             ` Varun Sethi
2015-04-16 18:38               ` Varun Sethi
2015-04-17  2:34               ` Minghuan.Lian
2015-04-17  2:34                 ` Minghuan.Lian at freescale.com
2015-04-15  9:49 ` [PATCH 2/2] pci/layerscape: Add LS2085A MSI support Minghuan Lian
2015-04-15  9:49   ` Minghuan Lian
2015-04-15 11:51 ` [PATCH] irqchip/gicv3-its: Decrease page size when needed Jason Cooper
2015-04-15 11:51   ` Jason Cooper
2015-04-15 14:17   ` Marc Zyngier
2015-04-15 14:17     ` Marc Zyngier
2015-04-16  1:15     ` Minghuan.Lian
2015-04-16  1:15       ` Minghuan.Lian at freescale.com
2015-04-15 16:31 ` Marc Zyngier
2015-04-15 16:31   ` Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=552F8910.9000701@arm.com \
    --to=marc.zyngier@arm.com \
    --cc=Minghuan.Lian@freescale.com \
    --cc=Mingkai.Hu@freescale.com \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=jason@lakedaemon.net \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=scottwood@freescale.com \
    --cc=stuart.yoder@freescale.com \
    --cc=tglx@linutronix.de \
    --cc=tie-fei.zang@freescale.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.