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From: Michal Simek <michal.simek@xilinx.com>
To: Moritz Fischer <moritz.fischer@ettus.com>,
	Appana Durga Kedareswara Rao <appana.durga.rao@xilinx.com>
Cc: Appana Durga Kedareswara Rao <appanad@xilinx.com>,
	"vinod.koul@intel.com" <vinod.koul@intel.com>,
	"dan.j.williams@intel.com" <dan.j.williams@intel.com>,
	Soren Brinkmann <sorenb@xilinx.com>,
	"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Anirudha Sarangi <anirudh@xilinx.com>
Subject: Re: [RESEND PATCH] dmaengine: Add Xilinx AXI Direct Memory Access Engine driver support
Date: Fri, 21 Aug 2015 09:36:22 +0200	[thread overview]
Message-ID: <55D6D4F6.4020100@xilinx.com> (raw)
In-Reply-To: <CAAtXAHe3QjBo4_5unB32ixnOriO8Xt-1nLeddjgRgYvj5Kn_EA@mail.gmail.com>

Hi,

On 08/21/2015 03:16 AM, Moritz Fischer wrote:
> Hi,
> 
> your MUA produces funny messages somehow ...
> The driver did not probe for me in it's current form as the bindings
> were missing interrupt parents for the interrupts...

It is just a question where interrupt parent is listed. I have seen that
some SoCs are just setting up at one location for all IPs.
I remember some discussions that some properties don't need to be
documented again and again. That's why the question is if they are
really needed to be documented in the binding doc because it is just
documentation duplication in every binding document.

Definitely if you miss it in the binding doc, feel free to send the
patch and update it.

Thanks,
Michal


WARNING: multiple messages have this Message-ID (diff)
From: michal.simek@xilinx.com (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH] dmaengine: Add Xilinx AXI Direct Memory Access Engine driver support
Date: Fri, 21 Aug 2015 09:36:22 +0200	[thread overview]
Message-ID: <55D6D4F6.4020100@xilinx.com> (raw)
In-Reply-To: <CAAtXAHe3QjBo4_5unB32ixnOriO8Xt-1nLeddjgRgYvj5Kn_EA@mail.gmail.com>

Hi,

On 08/21/2015 03:16 AM, Moritz Fischer wrote:
> Hi,
> 
> your MUA produces funny messages somehow ...
> The driver did not probe for me in it's current form as the bindings
> were missing interrupt parents for the interrupts...

It is just a question where interrupt parent is listed. I have seen that
some SoCs are just setting up at one location for all IPs.
I remember some discussions that some properties don't need to be
documented again and again. That's why the question is if they are
really needed to be documented in the binding doc because it is just
documentation duplication in every binding document.

Definitely if you miss it in the binding doc, feel free to send the
patch and update it.

Thanks,
Michal

  reply	other threads:[~2015-08-21  7:36 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-17 15:31 [RESEND PATCH] dmaengine: Add Xilinx AXI Direct Memory Access Engine driver support Kedareswara rao Appana
2015-08-17 15:31 ` Kedareswara rao Appana
2015-08-19 21:51 ` Moritz Fischer
2015-08-19 21:51   ` Moritz Fischer
2015-08-20  5:31   ` Appana Durga Kedareswara Rao
2015-08-20  5:31     ` Appana Durga Kedareswara Rao
2015-08-20  5:41   ` Appana Durga Kedareswara Rao
2015-08-20  5:41     ` Appana Durga Kedareswara Rao
2015-08-20  7:01     ` Appana Durga Kedareswara Rao
2015-08-20  7:01       ` Appana Durga Kedareswara Rao
2015-08-21  1:16       ` Moritz Fischer
2015-08-21  1:16         ` Moritz Fischer
2015-08-21  7:36         ` Michal Simek [this message]
2015-08-21  7:36           ` Michal Simek
2015-08-22 11:06         ` Appana Durga Kedareswara Rao
2015-08-22 11:06           ` Appana Durga Kedareswara Rao

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