* [PATCH] drm/i915/skl+: Add YUV pixel format in Capability list
@ 2015-07-14 12:38 Kumar, Mahesh
2015-07-14 12:46 ` Daniel Vetter
0 siblings, 1 reply; 12+ messages in thread
From: Kumar, Mahesh @ 2015-07-14 12:38 UTC (permalink / raw)
To: intel-gfx
GEN >= 9 supports YUV format for all planes, but it's not exported in
Capability list of primary plane. Add YUV formats in skl_primary_formats
list.
Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not
filling bits_per_pixel field of fb-struct for YUV pixel format.
This leads to divide by zero error during watermark calculation.
Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
Cc: Konduru, Chandra <chandra.konduru@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 ++++
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bb58cb6..f4b27af 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
};
/* Cursor formats */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f2be1ce..1d13b7e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3156,8 +3156,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
/* For planar: Bpp is for uv plane, y_Bpp is for y plane */
if (fb) {
p->plane[0].enabled = true;
- p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
- drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
+ p->plane[0].bytes_per_pixel =
+ drm_format_plane_cpp(fb->pixel_format, 1);
p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
drm_format_plane_cpp(fb->pixel_format, 0) : 0;
p->plane[0].tiling = fb->modifier[0];
--
1.9.1
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^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH] drm/i915/skl+: Add YUV pixel format in Capability list
2015-07-14 12:38 [PATCH] drm/i915/skl+: Add YUV pixel format in Capability list Kumar, Mahesh
@ 2015-07-14 12:46 ` Daniel Vetter
2015-07-17 13:50 ` [PATCH V2] " Kumar, Mahesh
0 siblings, 1 reply; 12+ messages in thread
From: Daniel Vetter @ 2015-07-14 12:46 UTC (permalink / raw)
To: Kumar, Mahesh; +Cc: intel-gfx
On Tue, Jul 14, 2015 at 06:08:06PM +0530, Kumar, Mahesh wrote:
> GEN >= 9 supports YUV format for all planes, but it's not exported in
> Capability list of primary plane. Add YUV formats in skl_primary_formats
> list.
> Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not
> filling bits_per_pixel field of fb-struct for YUV pixel format.
> This leads to divide by zero error during watermark calculation.
>
> Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
> Cc: Konduru, Chandra <chandra.konduru@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 ++++
> drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index bb58cb6..f4b27af 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
> DRM_FORMAT_ABGR8888,
> DRM_FORMAT_XRGB2101010,
> DRM_FORMAT_XBGR2101010,
> + DRM_FORMAT_YUYV,
> + DRM_FORMAT_YVYU,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_VYUY,
Needs testcase (or reworking an existing testcase to also test the primary
plane). Also we should really aim to unify all the skl plane functions ...
-Daniel
> };
>
> /* Cursor formats */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index f2be1ce..1d13b7e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3156,8 +3156,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
> /* For planar: Bpp is for uv plane, y_Bpp is for y plane */
> if (fb) {
> p->plane[0].enabled = true;
> - p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
> - drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
> + p->plane[0].bytes_per_pixel =
> + drm_format_plane_cpp(fb->pixel_format, 1);
> p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
> drm_format_plane_cpp(fb->pixel_format, 0) : 0;
> p->plane[0].tiling = fb->modifier[0];
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-07-14 12:46 ` Daniel Vetter
@ 2015-07-17 13:50 ` Kumar, Mahesh
2015-07-20 7:28 ` shuang.he
` (2 more replies)
0 siblings, 3 replies; 12+ messages in thread
From: Kumar, Mahesh @ 2015-07-17 13:50 UTC (permalink / raw)
To: intel-gfx
GEN >= 9 supports YUV format for all planes, but it's not exported in
Capability list of primary plane. Add YUV formats in skl_primary_formats
list.
Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not
filling bits_per_pixel field of fb-struct for YUV pixel format.
This leads to divide by zero error during watermark calculation.
V2: Don't break NV12 case.
Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
Cc: Konduru, Chandra <chandra.konduru@intel.com>
---
IGT changes made for testcase will be sent in separate patch.
drivers/gpu/drm/i915/intel_display.c | 4 ++++
drivers/gpu/drm/i915/intel_pm.c | 3 ++-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index af0bcfe..d31704a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
};
/* Cursor formats */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5eeddc9..5768f8c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3164,7 +3164,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
if (fb) {
p->plane[0].enabled = true;
p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
- drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
+ drm_format_plane_cpp(fb->pixel_format, 1) :
+ drm_format_plane_cpp(fb->pixel_format, 0);
p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
drm_format_plane_cpp(fb->pixel_format, 0) : 0;
p->plane[0].tiling = fb->modifier[0];
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-07-17 13:50 ` [PATCH V2] " Kumar, Mahesh
@ 2015-07-20 7:28 ` shuang.he
2015-08-24 10:23 ` Jindal, Sonika
2015-08-24 13:05 ` [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list Ville Syrjälä
2 siblings, 0 replies; 12+ messages in thread
From: shuang.he @ 2015-07-20 7:28 UTC (permalink / raw)
To: shuang.he, julianx.dumez, christophe.sureau, lei.a.liu,
intel-gfx, mahesh1.kumar
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6823
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
ILK 302/302 302/302
SNB 315/315 315/315
IVB 342/342 342/342
BYT -1 285/285 284/285
HSW 378/378 378/378
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*BYT igt@gem_partial_pwrite_pread@reads-display PASS(1) FAIL(1)
Note: You need to pay more attention to line start with '*'
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-07-17 13:50 ` [PATCH V2] " Kumar, Mahesh
2015-07-20 7:28 ` shuang.he
@ 2015-08-24 10:23 ` Jindal, Sonika
2015-08-24 10:45 ` Kumar, Mahesh
2015-08-24 13:05 ` [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list Ville Syrjälä
2 siblings, 1 reply; 12+ messages in thread
From: Jindal, Sonika @ 2015-08-24 10:23 UTC (permalink / raw)
To: Kumar, Mahesh1, intel-gfx
Can you please add the test case name to the commit message?
Also, this should be split into two patches one addressing the divide by zero error and another one to add plane formats.
Regards,
Sonika
-----Original Message-----
From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Mahesh
Sent: Friday, July 17, 2015 7:21 PM
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list
GEN >= 9 supports YUV format for all planes, but it's not exported in Capability list of primary plane. Add YUV formats in skl_primary_formats list.
Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not filling bits_per_pixel field of fb-struct for YUV pixel format.
This leads to divide by zero error during watermark calculation.
V2: Don't break NV12 case.
Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
Cc: Konduru, Chandra <chandra.konduru@intel.com>
---
IGT changes made for testcase will be sent in separate patch.
drivers/gpu/drm/i915/intel_display.c | 4 ++++
drivers/gpu/drm/i915/intel_pm.c | 3 ++-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index af0bcfe..d31704a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
};
/* Cursor formats */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 5eeddc9..5768f8c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3164,7 +3164,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
if (fb) {
p->plane[0].enabled = true;
p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
- drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
+ drm_format_plane_cpp(fb->pixel_format, 1) :
+ drm_format_plane_cpp(fb->pixel_format, 0);
p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
drm_format_plane_cpp(fb->pixel_format, 0) : 0;
p->plane[0].tiling = fb->modifier[0];
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-08-24 10:23 ` Jindal, Sonika
@ 2015-08-24 10:45 ` Kumar, Mahesh
2015-09-03 10:47 ` [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel Kumar, Mahesh
0 siblings, 1 reply; 12+ messages in thread
From: Kumar, Mahesh @ 2015-08-24 10:45 UTC (permalink / raw)
To: Jindal, Sonika, intel-gfx
Ok..., Will resubmit the patch with suggested changes.
Regards,
-Mahesh
On 8/24/2015 3:53 PM, Jindal, Sonika wrote:
> Can you please add the test case name to the commit message?
> Also, this should be split into two patches one addressing the divide by zero error and another one to add plane formats.
>
> Regards,
> Sonika
>
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Mahesh
> Sent: Friday, July 17, 2015 7:21 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list
>
> GEN >= 9 supports YUV format for all planes, but it's not exported in Capability list of primary plane. Add YUV formats in skl_primary_formats list.
> Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not filling bits_per_pixel field of fb-struct for YUV pixel format.
> This leads to divide by zero error during watermark calculation.
>
> V2: Don't break NV12 case.
>
> Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
> Cc: Konduru, Chandra <chandra.konduru@intel.com>
> ---
>
> IGT changes made for testcase will be sent in separate patch.
>
> drivers/gpu/drm/i915/intel_display.c | 4 ++++
> drivers/gpu/drm/i915/intel_pm.c | 3 ++-
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index af0bcfe..d31704a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
> DRM_FORMAT_ABGR8888,
> DRM_FORMAT_XRGB2101010,
> DRM_FORMAT_XBGR2101010,
> + DRM_FORMAT_YUYV,
> + DRM_FORMAT_YVYU,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_VYUY,
> };
>
> /* Cursor formats */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 5eeddc9..5768f8c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3164,7 +3164,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
> if (fb) {
> p->plane[0].enabled = true;
> p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
> - drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
> + drm_format_plane_cpp(fb->pixel_format, 1) :
> + drm_format_plane_cpp(fb->pixel_format, 0);
> p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
> drm_format_plane_cpp(fb->pixel_format, 0) : 0;
> p->plane[0].tiling = fb->modifier[0];
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-07-17 13:50 ` [PATCH V2] " Kumar, Mahesh
2015-07-20 7:28 ` shuang.he
2015-08-24 10:23 ` Jindal, Sonika
@ 2015-08-24 13:05 ` Ville Syrjälä
2 siblings, 0 replies; 12+ messages in thread
From: Ville Syrjälä @ 2015-08-24 13:05 UTC (permalink / raw)
To: Kumar, Mahesh; +Cc: intel-gfx
On Fri, Jul 17, 2015 at 07:20:41PM +0530, Kumar, Mahesh wrote:
> GEN >= 9 supports YUV format for all planes, but it's not exported in
> Capability list of primary plane. Add YUV formats in skl_primary_formats
> list.
> Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not
> filling bits_per_pixel field of fb-struct for YUV pixel format.
> This leads to divide by zero error during watermark calculation.
>
> V2: Don't break NV12 case.
>
> Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
> Cc: Konduru, Chandra <chandra.konduru@intel.com>
> ---
>
> IGT changes made for testcase will be sent in separate patch.
>
> drivers/gpu/drm/i915/intel_display.c | 4 ++++
> drivers/gpu/drm/i915/intel_pm.c | 3 ++-
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index af0bcfe..d31704a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
> DRM_FORMAT_ABGR8888,
> DRM_FORMAT_XRGB2101010,
> DRM_FORMAT_XBGR2101010,
> + DRM_FORMAT_YUYV,
> + DRM_FORMAT_YVYU,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_VYUY,
> };
>
> /* Cursor formats */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 5eeddc9..5768f8c 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3164,7 +3164,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
> if (fb) {
> p->plane[0].enabled = true;
> p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
> - drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
> + drm_format_plane_cpp(fb->pixel_format, 1) :
> + drm_format_plane_cpp(fb->pixel_format, 0);
Someone should really fix the SKL WM code to treat the Y plane as the
normal case and CbCr as the special case. Currently we do just the
opposite which leads to this kind of checks all over the place.
> p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
> drm_format_plane_cpp(fb->pixel_format, 0) : 0;
> p->plane[0].tiling = fb->modifier[0];
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel
2015-08-24 10:45 ` Kumar, Mahesh
@ 2015-09-03 10:47 ` Kumar, Mahesh
2015-09-03 10:47 ` [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list Kumar, Mahesh
2015-09-03 11:30 ` [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel Jindal, Sonika
0 siblings, 2 replies; 12+ messages in thread
From: Kumar, Mahesh @ 2015-09-03 10:47 UTC (permalink / raw)
To: intel-gfx
Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not
filling bits_per_pixel field of fb-struct for YUV pixel format.
This leads to divide by zero error during watermark calculation.
Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
Cc: Konduru, Chandra <chandra.konduru@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ea49661..1b90f03 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3170,7 +3170,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
if (fb) {
p->plane[0].enabled = true;
p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
- drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
+ drm_format_plane_cpp(fb->pixel_format, 1) :
+ drm_format_plane_cpp(fb->pixel_format, 0);
p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
drm_format_plane_cpp(fb->pixel_format, 0) : 0;
p->plane[0].tiling = fb->modifier[0];
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-09-03 10:47 ` [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel Kumar, Mahesh
@ 2015-09-03 10:47 ` Kumar, Mahesh
2015-09-03 11:30 ` Jindal, Sonika
2015-09-03 11:30 ` [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel Jindal, Sonika
1 sibling, 1 reply; 12+ messages in thread
From: Kumar, Mahesh @ 2015-09-03 10:47 UTC (permalink / raw)
To: intel-gfx
GEN >= 9 supports YUV format for all planes, but it's not exported in
Capability list of primary plane. Add YUV formats in skl_primary_formats
list.
Testcase: igt/kms_universal_plane.c
Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
Cc: Konduru, Chandra <chandra.konduru@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0377520..5ab8a1a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
};
/* Cursor formats */
--
1.9.1
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-09-03 10:47 ` [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list Kumar, Mahesh
@ 2015-09-03 11:30 ` Jindal, Sonika
2015-09-04 7:39 ` Daniel Vetter
0 siblings, 1 reply; 12+ messages in thread
From: Jindal, Sonika @ 2015-09-03 11:30 UTC (permalink / raw)
To: Kumar, Mahesh1, intel-gfx
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
-----Original Message-----
From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Mahesh
Sent: Thursday, September 3, 2015 4:17 PM
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list
GEN >= 9 supports YUV format for all planes, but it's not exported in Capability list of primary plane. Add YUV formats in skl_primary_formats list.
Testcase: igt/kms_universal_plane.c
Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
Cc: Konduru, Chandra <chandra.konduru@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0377520..5ab8a1a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
};
/* Cursor formats */
--
1.9.1
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel
2015-09-03 10:47 ` [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel Kumar, Mahesh
2015-09-03 10:47 ` [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list Kumar, Mahesh
@ 2015-09-03 11:30 ` Jindal, Sonika
1 sibling, 0 replies; 12+ messages in thread
From: Jindal, Sonika @ 2015-09-03 11:30 UTC (permalink / raw)
To: Kumar, Mahesh1, intel-gfx
Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
-----Original Message-----
From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Mahesh
Sent: Thursday, September 3, 2015 4:17 PM
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel
Don't rely on fb->bits_per_pixel as intel_framebuffer_init is not filling bits_per_pixel field of fb-struct for YUV pixel format.
This leads to divide by zero error during watermark calculation.
Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
Cc: Konduru, Chandra <chandra.konduru@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ea49661..1b90f03 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3170,7 +3170,8 @@ static void skl_compute_wm_pipe_parameters(struct drm_crtc *crtc,
if (fb) {
p->plane[0].enabled = true;
p->plane[0].bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
- drm_format_plane_cpp(fb->pixel_format, 1) : fb->bits_per_pixel / 8;
+ drm_format_plane_cpp(fb->pixel_format, 1) :
+ drm_format_plane_cpp(fb->pixel_format, 0);
p->plane[0].y_bytes_per_pixel = fb->pixel_format == DRM_FORMAT_NV12 ?
drm_format_plane_cpp(fb->pixel_format, 0) : 0;
p->plane[0].tiling = fb->modifier[0];
--
1.9.1
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_______________________________________________
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list
2015-09-03 11:30 ` Jindal, Sonika
@ 2015-09-04 7:39 ` Daniel Vetter
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Vetter @ 2015-09-04 7:39 UTC (permalink / raw)
To: Jindal, Sonika; +Cc: intel-gfx
On Thu, Sep 03, 2015 at 11:30:07AM +0000, Jindal, Sonika wrote:
> Reviewed-by: Sonika Jindal <sonika.jindal@intel.com>
>
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Kumar, Mahesh
> Sent: Thursday, September 3, 2015 4:17 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list
>
> GEN >= 9 supports YUV format for all planes, but it's not exported in Capability list of primary plane. Add YUV formats in skl_primary_formats list.
>
> Testcase: igt/kms_universal_plane.c
>
> Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com>
> Cc: Konduru, Chandra <chandra.konduru@intel.com>
Both patches applied to dinq, thanks.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_display.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0377520..5ab8a1a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -72,6 +72,10 @@ static const uint32_t skl_primary_formats[] = {
> DRM_FORMAT_ABGR8888,
> DRM_FORMAT_XRGB2101010,
> DRM_FORMAT_XBGR2101010,
> + DRM_FORMAT_YUYV,
> + DRM_FORMAT_YVYU,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_VYUY,
> };
>
> /* Cursor formats */
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2015-09-04 7:36 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-07-14 12:38 [PATCH] drm/i915/skl+: Add YUV pixel format in Capability list Kumar, Mahesh
2015-07-14 12:46 ` Daniel Vetter
2015-07-17 13:50 ` [PATCH V2] " Kumar, Mahesh
2015-07-20 7:28 ` shuang.he
2015-08-24 10:23 ` Jindal, Sonika
2015-08-24 10:45 ` Kumar, Mahesh
2015-09-03 10:47 ` [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel Kumar, Mahesh
2015-09-03 10:47 ` [PATCH 2/2] drm/i915/skl+: Add YUV pixel format in Capability list Kumar, Mahesh
2015-09-03 11:30 ` Jindal, Sonika
2015-09-04 7:39 ` Daniel Vetter
2015-09-03 11:30 ` [PATCH 1/2] drm/i915/skl: Avoid using un-initialized bits_per_pixel Jindal, Sonika
2015-08-24 13:05 ` [PATCH V2] drm/i915/skl+: Add YUV pixel format in Capability list Ville Syrjälä
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