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From: Vignesh Raghavendra <vigneshr@ti.com>
To: Ramon Fried <rfried.dev@gmail.com>
Cc: Dave Gerlach <d-gerlach@ti.com>,
	Joe Hershberger <joe.hershberger@ni.com>,
	 Tom Rini <trini@konsulko.com>,
	U-Boot Mailing List <u-boot@lists.denx.de>,
	Grygorii Strashko <grygorii.strashko@ti.com>
Subject: Re: [PATCH 2/8] net: ti: am65-cpsw: Add support for multi port independent MAC mode
Date: Fri, 21 Jan 2022 09:48:53 +0530	[thread overview]
Message-ID: <55a8b3ea-0840-e471-26ad-f1903fcafe4a@ti.com> (raw)
In-Reply-To: <CAGi-RULzL0J7zdMC12rz3F=RiQR4djDCzgW1hjArt9a3_npOrg@mail.gmail.com>



On 30/12/21 1:01 am, Ramon Fried wrote:
> On Fri, Dec 24, 2021 at 9:25 AM Vignesh Raghavendra <vigneshr@ti.com> wrote:
>>
>> On certain TI SoC, like AM64x there is a CPSW3G which supports 2
>> external independent MAC ports for single CPSW instance.
>> It is not possible for Ethernet driver to register more than one port
>> for given instance.
>>
>> This patch modifies top level CPSW NUSS as UCLASS_MISC and binds
>> UCLASS_ETH to individual ports so as to support bring up more than one
>> Ethernet interface in U-Boot.
>>
>> Note that there is no isolation in the since, CPSW NUSS is in promisc
>> mode and forwards all packets to host.
> So both ports are working in parallel, how do I choose from which port to exit ?


One would have to chose active port with ethact. Packet from non active
port is dropped by the driver.

>>
>> Since top level driver is now UCLASS_MISC, board files would need to
>> instantiate this driver explicitly.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> ---

[...]

>> -static int am65_cpsw_probe_cpsw(struct udevice *dev)
>> +static int am65_cpsw_port_probe(struct udevice *dev)
>>  {
>>         struct am65_cpsw_priv *priv = dev_get_priv(dev);
>>         struct eth_pdata *pdata = dev_get_plat(dev);
>>         struct am65_cpsw_common *cpsw_common;
>> -       ofnode ports_np, node;
>> -       int ret, i;
>> +       char portname[15];
>> +       int ret;
>>
>>         priv->dev = dev;
>>
>> -       cpsw_common = calloc(1, sizeof(*priv->cpsw_common));
>> -       if (!cpsw_common)
>> -               return -ENOMEM;
>> +       cpsw_common = dev_get_priv(dev->parent);
>>         priv->cpsw_common = cpsw_common;
>>
>> +       sprintf(portname, "%s%s", dev->parent->name, dev->name);
>> +       device_set_name(dev, portname);
>> +
>> +       ret = am65_cpsw_ofdata_parse_phy(dev);
>> +       if (ret)
>> +               goto out;
>> +
>> +       am65_cpsw_gmii_sel_k3(priv, pdata->phy_interface, priv->port_id);
>> +
>> +       ret = am65_cpsw_mdio_init(dev);
>> +       if (ret)
>> +               goto out;
>> +
>> +       ret = am65_cpsw_phy_init(dev);
>> +       if (ret)
>> +               goto out;
>> +out:
>> +       return ret;
>> +}
>> +
>> +static int am65_cpsw_probe_nuss(struct udevice *dev)
>> +{
>> +       struct am65_cpsw_common *cpsw_common = dev_get_priv(dev);
>> +       ofnode ports_np, node;
>> +       int ret, i;
>> +       struct udevice *port_dev;
>> +
>>         cpsw_common->dev = dev;
>>         cpsw_common->ss_base = dev_read_addr(dev);
>>         if (cpsw_common->ss_base == FDT_ADDR_T_NONE)
>> @@ -723,10 +750,9 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
>>                 if (disabled)
>>                         continue;
>>
>> -               priv->port_id = port_id;
>> -               ret = am65_cpsw_ofdata_parse_phy(dev, node);
>> +               ret = device_bind_driver_to_node(dev, "am65_cpsw_nuss_port", ofnode_get_name(node), node, &port_dev);
>>                 if (ret)
>> -                       goto out;
>> +                       printf("SCREEEM\n");
> Please handle reasonably.

Oops, sorry, I missed to clean this up before posting... Since the patch
is merged, will send a followup patch addressing the same.

[...]

Regards
Vignesh

  reply	other threads:[~2022-01-21  4:19 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-24  7:25 [PATCH 0/8] ARM: ti: AM64x: Add Ethernet boot support on AM64x SK Vignesh Raghavendra
2021-12-24  7:25 ` [PATCH 1/8] mach-k3: common: Instantiate AM65 CPSW NUSS wrapper Vignesh Raghavendra
2022-01-17 18:36   ` Tom Rini
2021-12-24  7:25 ` [PATCH 2/8] net: ti: am65-cpsw: Add support for multi port independent MAC mode Vignesh Raghavendra
2021-12-29 19:31   ` Ramon Fried
2022-01-21  4:18     ` Vignesh Raghavendra [this message]
2022-01-17 18:37   ` Tom Rini
2022-01-20 23:13     ` Ramon Fried
2022-01-20 23:19       ` Tom Rini
2022-01-21  4:32         ` Vignesh Raghavendra
2021-12-24  7:25 ` [PATCH 3/8] board: ti: am64x: Init DRAM size in R5/A53 SPL Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2021-12-24  7:25 ` [PATCH 4/8] mach-k3: am642_init: Probe AM65 CPSW NUSS for " Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2021-12-24  7:25 ` [PATCH 5/8] mach-k3: am64_spl: Alias Ethernet RGMII boot to CPGMAC Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2021-12-24  7:25 ` [PATCH 6/8] configs: am64x_evm: set eth1 as boot interface Vignesh Raghavendra
2022-01-17 14:46   ` Tom Rini
2022-01-21  7:11     ` Vignesh Raghavendra
2021-12-24  7:25 ` [PATCH 7/8] ARM: dts: K3-am642-r5-sk: Enable Second CPSW port in R5/A53 SPL Vignesh Raghavendra
2022-01-17 18:37   ` Tom Rini
2021-12-24  7:25 ` [PATCH 8/8] configs: am64x_evm_r5/a53_defconfig: Enable configs required for Ethboot Vignesh Raghavendra
2022-01-17 14:47   ` Tom Rini
2022-01-21  4:29     ` Vignesh Raghavendra
2022-01-21 14:57       ` Tom Rini
2022-01-21 15:18         ` Vignesh Raghavendra
2022-01-21 15:21           ` Tom Rini

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