[PATCH 0/5] Support the thermal for RK3368 SoCs

[PATCH 0/5] Support the thermal for RK3368 SoCs

[Caesar Wang]

This series patchs are working for RK3368 on Rockchip platform.

This patchset are based on linus master branch.
(Note: add Dmitry two thermal patchs for rockchip
 https://patchwork.kernel.org/patch/6973101/
 https://patchwork.kernel.org/patch/6973131/
)

the git log oneline as follows:

30451f4 arm64: dts: Enable the Thermal on R88 board.
1637a7c arm64: dts: Add main Thermal info to rk3368.dtsi
8f908b7 arm64: dts: Add the thermal data found on RK3368
a501fad thermal: rockchip: Support the RK3368 SoCs in thermal driver
c765254 dt-bindings: thermal: Support the RK3368 SoCs compatible
ff7fd5d thermal: rockhip: fix setting thermal shutdown polarity
f54373c thermal: rockchip: fix handling of invalid readings
0410a40 arm64: dts: rockchip: Add the needed timer for RK3368 SoC
f696cac arm64: Enable the timer on Rockchip architecture
e84d626 clocksource: rockchip: Make the driver more readability and compatible
1f93e4a Linux 4.3-rc2
.....

@Heiko,
The PATCH [4/5] is working based on big/littel cluster cpufreq added.
Anyway, the PATCH [4/5] also work for next kernel.

@Eduardo,

The PATCH[2/4] is based on the Dmitry's patchs.

 https://patchwork.kernel.org/patch/6973101/
 https://patchwork.kernel.org/patch/6973131/

---
This series are tested on RK3368 board.

while true;do ls >/dev/null; done&

while true; do grep "" /sys/class/thermal/thermal_zone[1-2]/temp;date;sleep .5;
done &

You can get the temperature form sensors.

/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:32500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:32500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:32500



Caesar Wang (5):
  dt-bindings: thermal: Support the RK3368 SoCs compatible
  thermal: rockchip: Support the RK3368 SoCs in thermal driver
  arm64: dts: Add the thermal data found on RK3368
  arm64: dts: Add main Thermal info to rk3368.dtsi
  arm64: dts: Enable the Thermal on R88 board

 .../bindings/thermal/rockchip-thermal.txt          |   4 +-
 arch/arm64/boot/dts/rockchip/rk3368-r88.dts        |   6 +
 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi   | 112 ++++++++++++
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           |  30 +++
 drivers/thermal/rockchip_thermal.c                 | 201 ++++++++++++++++++---
 5 files changed, 327 insertions(+), 26 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

-- 
1.9.1

[PATCH 0/5] Support the thermal for RK3368 SoCs

[Caesar Wang]

This series patchs are working for RK3368 on Rockchip platform.

This patchset are based on linus master branch.
(Note: add Dmitry two thermal patchs for rockchip
 https://patchwork.kernel.org/patch/6973101/
 https://patchwork.kernel.org/patch/6973131/
)

the git log oneline as follows:

30451f4 arm64: dts: Enable the Thermal on R88 board.
1637a7c arm64: dts: Add main Thermal info to rk3368.dtsi
8f908b7 arm64: dts: Add the thermal data found on RK3368
a501fad thermal: rockchip: Support the RK3368 SoCs in thermal driver
c765254 dt-bindings: thermal: Support the RK3368 SoCs compatible
ff7fd5d thermal: rockhip: fix setting thermal shutdown polarity
f54373c thermal: rockchip: fix handling of invalid readings
0410a40 arm64: dts: rockchip: Add the needed timer for RK3368 SoC
f696cac arm64: Enable the timer on Rockchip architecture
e84d626 clocksource: rockchip: Make the driver more readability and compatible
1f93e4a Linux 4.3-rc2
.....

@Heiko,
The PATCH [4/5] is working based on big/littel cluster cpufreq added.
Anyway, the PATCH [4/5] also work for next kernel.

@Eduardo,

The PATCH[2/4] is based on the Dmitry's patchs.

 https://patchwork.kernel.org/patch/6973101/
 https://patchwork.kernel.org/patch/6973131/

---
This series are tested on RK3368 board.

while true;do ls >/dev/null; done&

while true; do grep "" /sys/class/thermal/thermal_zone[1-2]/temp;date;sleep .5;
done &

You can get the temperature form sensors.

/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:27500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:32500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:22500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:30000
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:32500
/sys/class/thermal/thermal_zone0/temp:32500
/sys/class/thermal/thermal_zone1/temp:30000
/sys/class/thermal/thermal_zone0/temp:25000
/sys/class/thermal/thermal_zone1/temp:32500



Caesar Wang (5):
  dt-bindings: thermal: Support the RK3368 SoCs compatible
  thermal: rockchip: Support the RK3368 SoCs in thermal driver
  arm64: dts: Add the thermal data found on RK3368
  arm64: dts: Add main Thermal info to rk3368.dtsi
  arm64: dts: Enable the Thermal on R88 board

 .../bindings/thermal/rockchip-thermal.txt          |   4 +-
 arch/arm64/boot/dts/rockchip/rk3368-r88.dts        |   6 +
 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi   | 112 ++++++++++++
 arch/arm64/boot/dts/rockchip/rk3368.dtsi           |  30 +++
 drivers/thermal/rockchip_thermal.c                 | 201 ++++++++++++++++++---
 5 files changed, 327 insertions(+), 26 deletions(-)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

-- 
1.9.1

[PATCH 1/5] dt-bindings: thermal: Support the RK3368 SoCs compatible

[Caesar Wang]

This patchset attempts to new compatible for thermal founding
on RK3368 SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index ef802de..52682db 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -1,7 +1,9 @@
 * Temperature Sensor ADC (TSADC) on rockchip SoCs
 
 Required properties:
-- compatible : "rockchip,rk3288-tsadc"
+- compatible : should be "rockchip,<name>-tsadc"
+   "rockchip,rk3288-tsadc": found on RK3288 SoCs
+   "rockchip,rk3368-tsadc": found on RK3368 SoCs
 - reg : physical base address of the controller and length of memory mapped
 	region.
 - interrupts : The interrupt number to the cpu. The interrupt specifier format
-- 
1.9.1

[PATCH 1/5] dt-bindings: thermal: Support the RK3368 SoCs compatible

[Caesar Wang]

This patchset attempts to new compatible for thermal founding
on RK3368 SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index ef802de..52682db 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -1,7 +1,9 @@
 * Temperature Sensor ADC (TSADC) on rockchip SoCs
 
 Required properties:
-- compatible : "rockchip,rk3288-tsadc"
+- compatible : should be "rockchip,<name>-tsadc"
+   "rockchip,rk3288-tsadc": found on RK3288 SoCs
+   "rockchip,rk3368-tsadc": found on RK3368 SoCs
 - reg : physical base address of the controller and length of memory mapped
 	region.
 - interrupts : The interrupt number to the cpu. The interrupt specifier format
-- 
1.9.1

[PATCH 2/5] thermal: rockchip: Support the RK3368 SoCs in thermal driver

[Caesar Wang]

The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.

The system has two Temperature Sensors, channel 0 is for CPU,
and channel 1 is for GPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 drivers/thermal/rockchip_thermal.c | 201 ++++++++++++++++++++++++++++++++-----
 1 file changed, 176 insertions(+), 25 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 4d5b7d4..16d2476 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -1,6 +1,9 @@
 /*
  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
@@ -43,16 +46,11 @@ enum tshut_polarity {
 	TSHUT_HIGH_ACTIVE,
 };
 
-/**
- * The system has three Temperature Sensors.  channel 0 is reserved,
- * channel 1 is for CPU, and channel 2 is for GPU.
- */
-enum sensor_id {
-	SENSOR_CPU = 1,
-	SENSOR_GPU,
-};
-
 struct rockchip_tsadc_chip {
+	/* The sensor id of chip correspond to the ADC channel */
+	int cpu_id;
+	int gpu_id;
+
 	/* The hardware-controlled tshut property */
 	long tshut_temp;
 	enum tshut_mode tshut_mode;
@@ -72,10 +70,11 @@ struct rockchip_tsadc_chip {
 struct rockchip_thermal_sensor {
 	struct rockchip_thermal_data *thermal;
 	struct thermal_zone_device *tzd;
-	enum sensor_id id;
+	int id;
 };
 
-#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
+/* Two sensors: CPU and GPU */
+#define NUM_SENSORS	2
 
 struct rockchip_thermal_data {
 	const struct rockchip_tsadc_chip *chip;
@@ -94,7 +93,7 @@ struct rockchip_thermal_data {
 	enum tshut_polarity tshut_polarity;
 };
 
-/* TSADC V2 Sensor info define: */
+/* TSADC Sensor info define: */
 #define TSADCV2_AUTO_CON			0x04
 #define TSADCV2_INT_EN				0x08
 #define TSADCV2_INT_PD				0x0c
@@ -116,6 +115,8 @@ struct rockchip_thermal_data {
 #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
 
 #define TSADCV2_DATA_MASK			0xfff
+#define TSADCV3_DATA_MASK			0x3ff
+
 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
 #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
@@ -164,6 +165,45 @@ static const struct tsadc_table v2_code_table[] = {
 	{3421, 125000},
 };
 
+static const struct tsadc_table v3_code_table[] = {
+	{0, -40000},
+	{106, -40000},
+	{108, -35000},
+	{110, -30000},
+	{112, -25000},
+	{114, -20000},
+	{116, -15000},
+	{118, -10000},
+	{120, -5000},
+	{122, 0},
+	{124, 5000},
+	{126, 10000},
+	{128, 15000},
+	{130, 20000},
+	{132, 25000},
+	{134, 30000},
+	{136, 35000},
+	{138, 40000},
+	{140, 45000},
+	{142, 50000},
+	{144, 55000},
+	{146, 60000},
+	{148, 65000},
+	{150, 70000},
+	{152, 75000},
+	{154, 80000},
+	{156, 85000},
+	{158, 90000},
+	{160, 95000},
+	{162, 100000},
+	{163, 105000},
+	{165, 110000},
+	{167, 115000},
+	{169, 120000},
+	{171, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
 static u32 rk_tsadcv2_temp_to_code(long temp)
 {
 	int high, low, mid;
@@ -227,16 +267,83 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
 	return 0;
 }
 
+static u32 rk_tsadcv3_temp_to_code(long temp)
+{
+	int high, low, mid;
+
+	low = 0;
+	high = ARRAY_SIZE(v3_code_table) - 1;
+	mid = (high + low) / 2;
+
+	if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
+		return 0;
+
+	while (low <= high) {
+		if (temp == v3_code_table[mid].temp)
+			return v3_code_table[mid].code;
+		else if (temp < v3_code_table[mid].temp)
+			high = mid - 1;
+		else
+			low = mid + 1;
+		mid = (low + high) / 2;
+	}
+
+	return 0;
+}
+
+static int rk_tsadcv3_code_to_temp(u32 code, int *temp)
+{
+	unsigned int low = 1;
+	unsigned int high = ARRAY_SIZE(v3_code_table) - 1;
+	unsigned int mid = (low + high) / 2;
+	unsigned int num;
+	unsigned long denom;
+
+	BUILD_BUG_ON(ARRAY_SIZE(v3_code_table) < 2);
+
+	code &= TSADCV3_DATA_MASK;
+	if (code < v3_code_table[low].code)
+		return -EAGAIN;		/* Incorrect reading */
+
+	while (low <= high) {
+		if (code >= v3_code_table[mid - 1].code &&
+		    code < v3_code_table[mid].code)
+			break;
+		else if (code > v3_code_table[mid].code)
+			low = mid + 1;
+		else
+			high = mid - 1;
+		mid = (low + high) / 2;
+	}
+
+	/*
+	 * The 5C granularity provided by the table is too much. Let's
+	 * assume that the relationship between sensor readings and
+	 * temperature between 2 table entries is linear and interpolate
+	 * to produce less granular result.
+	 */
+	num = v3_code_table[mid].temp - v3_code_table[mid - 1].temp;
+	num *= code - v3_code_table[mid - 1].code;
+	denom = v3_code_table[mid].code - v3_code_table[mid - 1].code;
+	*temp = v3_code_table[mid - 1].temp + (num / denom);
+
+	return 0;
+}
+
 /**
- * rk_tsadcv2_initialize - initialize TASDC Controller
- * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
- * every two accessing of TSADC in normal operation.
- * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
- * every two accessing of TSADC after the temperature is higher
- * than COM_SHUT or COM_INT.
- * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
- * if the temperature is higher than COMP_INT or COMP_SHUT for
- * "debounce" times, TSADC controller will generate interrupt or TSHUT.
+ * rk_tsadcv2_initialize - initialize TASDC Controller.
+ *
+ * (1) Set TSADC_V2_AUTO_PERIOD:
+ *     Configure the interleave between every two accessing of
+ *     TSADC in normal operation.
+ *
+ * (2) Set TSADCV2_AUTO_PERIOD_HT:
+ *     Configure the interleave between every two accessing of
+ *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
+ *
+ * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
+ *     If the temperature is higher than COMP_INT or COMP_SHUT for
+ *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
  */
 static void rk_tsadcv2_initialize(void __iomem *regs,
 				  enum tshut_polarity tshut_polarity)
@@ -316,7 +423,31 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 	writel_relaxed(val, regs + TSADCV2_INT_EN);
 }
 
+static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, int *temp)
+{
+	u32 val;
+
+	val = readl_relaxed(regs + TSADCV2_DATA(chn));
+
+	return rk_tsadcv3_code_to_temp(val, temp);
+}
+
+static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
+{
+	u32 tshut_value, val;
+
+	tshut_value = rk_tsadcv3_temp_to_code(temp);
+	writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
+
+	/* TSHUT will be valid */
+	val = readl_relaxed(regs + TSADCV2_AUTO_CON);
+	writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
+}
+
 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
+	.cpu_id = 1,
+	.gpu_id = 2,
+
 	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 	.tshut_temp = 95000,
@@ -329,11 +460,31 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
 };
 
+static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
+	.cpu_id = 0,
+	.gpu_id = 1,
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv2_initialize,
+	.irq_ack = rk_tsadcv2_irq_ack,
+	.control = rk_tsadcv2_control,
+	.get_temp = rk_tsadcv3_get_temp,
+	.set_tshut_temp = rk_tsadcv3_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+};
+
 static const struct of_device_id of_rockchip_thermal_match[] = {
 	{
 		.compatible = "rockchip,rk3288-tsadc",
 		.data = (void *)&rk3288_tsadc_data,
 	},
+	{
+		.compatible = "rockchip,rk3368-tsadc",
+		.data = (void *)&rk3368_tsadc_data,
+	},
 	{ /* end */ },
 };
 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
@@ -441,7 +592,7 @@ static int
 rockchip_thermal_register_sensor(struct platform_device *pdev,
 				 struct rockchip_thermal_data *thermal,
 				 struct rockchip_thermal_sensor *sensor,
-				 enum sensor_id id)
+				 int id)
 {
 	const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 	int error;
@@ -557,7 +708,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
 	error = rockchip_thermal_register_sensor(pdev, thermal,
 						 &thermal->sensors[0],
-						 SENSOR_CPU);
+						 thermal->chip->cpu_id);
 	if (error) {
 		dev_err(&pdev->dev,
 			"failed to register CPU thermal sensor: %d\n", error);
@@ -566,7 +717,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
 	error = rockchip_thermal_register_sensor(pdev, thermal,
 						 &thermal->sensors[1],
-						 SENSOR_GPU);
+						 thermal->chip->gpu_id);
 	if (error) {
 		dev_err(&pdev->dev,
 			"failed to register GPU thermal sensor: %d\n", error);
@@ -661,7 +812,7 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 
 	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
-		enum sensor_id id = thermal->sensors[i].id;
+		int id = thermal->sensors[i].id;
 
 		thermal->chip->set_tshut_mode(id, thermal->regs,
 					      thermal->tshut_mode);
-- 
1.9.1

[PATCH 2/5] thermal: rockchip: Support the RK3368 SoCs in thermal driver

[Caesar Wang]

The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
of each channel can be configurable.

The system has two Temperature Sensors, channel 0 is for CPU,
and channel 1 is for GPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 drivers/thermal/rockchip_thermal.c | 201 ++++++++++++++++++++++++++++++++-----
 1 file changed, 176 insertions(+), 25 deletions(-)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 4d5b7d4..16d2476 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -1,6 +1,9 @@
 /*
  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
  * version 2, as published by the Free Software Foundation.
@@ -43,16 +46,11 @@ enum tshut_polarity {
 	TSHUT_HIGH_ACTIVE,
 };
 
-/**
- * The system has three Temperature Sensors.  channel 0 is reserved,
- * channel 1 is for CPU, and channel 2 is for GPU.
- */
-enum sensor_id {
-	SENSOR_CPU = 1,
-	SENSOR_GPU,
-};
-
 struct rockchip_tsadc_chip {
+	/* The sensor id of chip correspond to the ADC channel */
+	int cpu_id;
+	int gpu_id;
+
 	/* The hardware-controlled tshut property */
 	long tshut_temp;
 	enum tshut_mode tshut_mode;
@@ -72,10 +70,11 @@ struct rockchip_tsadc_chip {
 struct rockchip_thermal_sensor {
 	struct rockchip_thermal_data *thermal;
 	struct thermal_zone_device *tzd;
-	enum sensor_id id;
+	int id;
 };
 
-#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
+/* Two sensors: CPU and GPU */
+#define NUM_SENSORS	2
 
 struct rockchip_thermal_data {
 	const struct rockchip_tsadc_chip *chip;
@@ -94,7 +93,7 @@ struct rockchip_thermal_data {
 	enum tshut_polarity tshut_polarity;
 };
 
-/* TSADC V2 Sensor info define: */
+/* TSADC Sensor info define: */
 #define TSADCV2_AUTO_CON			0x04
 #define TSADCV2_INT_EN				0x08
 #define TSADCV2_INT_PD				0x0c
@@ -116,6 +115,8 @@ struct rockchip_thermal_data {
 #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
 
 #define TSADCV2_DATA_MASK			0xfff
+#define TSADCV3_DATA_MASK			0x3ff
+
 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
 #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
@@ -164,6 +165,45 @@ static const struct tsadc_table v2_code_table[] = {
 	{3421, 125000},
 };
 
+static const struct tsadc_table v3_code_table[] = {
+	{0, -40000},
+	{106, -40000},
+	{108, -35000},
+	{110, -30000},
+	{112, -25000},
+	{114, -20000},
+	{116, -15000},
+	{118, -10000},
+	{120, -5000},
+	{122, 0},
+	{124, 5000},
+	{126, 10000},
+	{128, 15000},
+	{130, 20000},
+	{132, 25000},
+	{134, 30000},
+	{136, 35000},
+	{138, 40000},
+	{140, 45000},
+	{142, 50000},
+	{144, 55000},
+	{146, 60000},
+	{148, 65000},
+	{150, 70000},
+	{152, 75000},
+	{154, 80000},
+	{156, 85000},
+	{158, 90000},
+	{160, 95000},
+	{162, 100000},
+	{163, 105000},
+	{165, 110000},
+	{167, 115000},
+	{169, 120000},
+	{171, 125000},
+	{TSADCV3_DATA_MASK, 125000},
+};
+
 static u32 rk_tsadcv2_temp_to_code(long temp)
 {
 	int high, low, mid;
@@ -227,16 +267,83 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
 	return 0;
 }
 
+static u32 rk_tsadcv3_temp_to_code(long temp)
+{
+	int high, low, mid;
+
+	low = 0;
+	high = ARRAY_SIZE(v3_code_table) - 1;
+	mid = (high + low) / 2;
+
+	if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
+		return 0;
+
+	while (low <= high) {
+		if (temp == v3_code_table[mid].temp)
+			return v3_code_table[mid].code;
+		else if (temp < v3_code_table[mid].temp)
+			high = mid - 1;
+		else
+			low = mid + 1;
+		mid = (low + high) / 2;
+	}
+
+	return 0;
+}
+
+static int rk_tsadcv3_code_to_temp(u32 code, int *temp)
+{
+	unsigned int low = 1;
+	unsigned int high = ARRAY_SIZE(v3_code_table) - 1;
+	unsigned int mid = (low + high) / 2;
+	unsigned int num;
+	unsigned long denom;
+
+	BUILD_BUG_ON(ARRAY_SIZE(v3_code_table) < 2);
+
+	code &= TSADCV3_DATA_MASK;
+	if (code < v3_code_table[low].code)
+		return -EAGAIN;		/* Incorrect reading */
+
+	while (low <= high) {
+		if (code >= v3_code_table[mid - 1].code &&
+		    code < v3_code_table[mid].code)
+			break;
+		else if (code > v3_code_table[mid].code)
+			low = mid + 1;
+		else
+			high = mid - 1;
+		mid = (low + high) / 2;
+	}
+
+	/*
+	 * The 5C granularity provided by the table is too much. Let's
+	 * assume that the relationship between sensor readings and
+	 * temperature between 2 table entries is linear and interpolate
+	 * to produce less granular result.
+	 */
+	num = v3_code_table[mid].temp - v3_code_table[mid - 1].temp;
+	num *= code - v3_code_table[mid - 1].code;
+	denom = v3_code_table[mid].code - v3_code_table[mid - 1].code;
+	*temp = v3_code_table[mid - 1].temp + (num / denom);
+
+	return 0;
+}
+
 /**
- * rk_tsadcv2_initialize - initialize TASDC Controller
- * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
- * every two accessing of TSADC in normal operation.
- * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
- * every two accessing of TSADC after the temperature is higher
- * than COM_SHUT or COM_INT.
- * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
- * if the temperature is higher than COMP_INT or COMP_SHUT for
- * "debounce" times, TSADC controller will generate interrupt or TSHUT.
+ * rk_tsadcv2_initialize - initialize TASDC Controller.
+ *
+ * (1) Set TSADC_V2_AUTO_PERIOD:
+ *     Configure the interleave between every two accessing of
+ *     TSADC in normal operation.
+ *
+ * (2) Set TSADCV2_AUTO_PERIOD_HT:
+ *     Configure the interleave between every two accessing of
+ *     TSADC after the temperature is higher than COM_SHUT or COM_INT.
+ *
+ * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
+ *     If the temperature is higher than COMP_INT or COMP_SHUT for
+ *     "debounce" times, TSADC controller will generate interrupt or TSHUT.
  */
 static void rk_tsadcv2_initialize(void __iomem *regs,
 				  enum tshut_polarity tshut_polarity)
@@ -316,7 +423,31 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 	writel_relaxed(val, regs + TSADCV2_INT_EN);
 }
 
+static int rk_tsadcv3_get_temp(int chn, void __iomem *regs, int *temp)
+{
+	u32 val;
+
+	val = readl_relaxed(regs + TSADCV2_DATA(chn));
+
+	return rk_tsadcv3_code_to_temp(val, temp);
+}
+
+static void rk_tsadcv3_tshut_temp(int chn, void __iomem *regs, long temp)
+{
+	u32 tshut_value, val;
+
+	tshut_value = rk_tsadcv3_temp_to_code(temp);
+	writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
+
+	/* TSHUT will be valid */
+	val = readl_relaxed(regs + TSADCV2_AUTO_CON);
+	writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
+}
+
 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
+	.cpu_id = 1,
+	.gpu_id = 2,
+
 	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
 	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
 	.tshut_temp = 95000,
@@ -329,11 +460,31 @@ static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
 	.set_tshut_mode = rk_tsadcv2_tshut_mode,
 };
 
+static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
+	.cpu_id = 0,
+	.gpu_id = 1,
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv2_initialize,
+	.irq_ack = rk_tsadcv2_irq_ack,
+	.control = rk_tsadcv2_control,
+	.get_temp = rk_tsadcv3_get_temp,
+	.set_tshut_temp = rk_tsadcv3_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+};
+
 static const struct of_device_id of_rockchip_thermal_match[] = {
 	{
 		.compatible = "rockchip,rk3288-tsadc",
 		.data = (void *)&rk3288_tsadc_data,
 	},
+	{
+		.compatible = "rockchip,rk3368-tsadc",
+		.data = (void *)&rk3368_tsadc_data,
+	},
 	{ /* end */ },
 };
 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
@@ -441,7 +592,7 @@ static int
 rockchip_thermal_register_sensor(struct platform_device *pdev,
 				 struct rockchip_thermal_data *thermal,
 				 struct rockchip_thermal_sensor *sensor,
-				 enum sensor_id id)
+				 int id)
 {
 	const struct rockchip_tsadc_chip *tsadc = thermal->chip;
 	int error;
@@ -557,7 +708,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
 	error = rockchip_thermal_register_sensor(pdev, thermal,
 						 &thermal->sensors[0],
-						 SENSOR_CPU);
+						 thermal->chip->cpu_id);
 	if (error) {
 		dev_err(&pdev->dev,
 			"failed to register CPU thermal sensor: %d\n", error);
@@ -566,7 +717,7 @@ static int rockchip_thermal_probe(struct platform_device *pdev)
 
 	error = rockchip_thermal_register_sensor(pdev, thermal,
 						 &thermal->sensors[1],
-						 SENSOR_GPU);
+						 thermal->chip->gpu_id);
 	if (error) {
 		dev_err(&pdev->dev,
 			"failed to register GPU thermal sensor: %d\n", error);
@@ -661,7 +812,7 @@ static int __maybe_unused rockchip_thermal_resume(struct device *dev)
 	thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
 
 	for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
-		enum sensor_id id = thermal->sensors[i].id;
+		int id = thermal->sensors[i].id;
 
 		thermal->chip->set_tshut_mode(id, thermal->regs,
 					      thermal->tshut_mode);
-- 
1.9.1

[PATCH 3/5] arm64: dts: Add the thermal data found on RK3368

[Caesar Wang]

This patchset add the thermal for RK3368 dts,
Since the two CPU clusters, with four CPU core for each cluster,
One cluster is optimized for high-performance(big cluster) and the othe
is optimized for low power(little cluster).

This patch adds the second order for thermal throttle, and the critical
temperature for thermal over-tempeature protection on Software.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 +++++++++++++++++++++++
 1 file changed, 112 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
new file mode 100644
index 0000000..a10010f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
@@ -0,0 +1,112 @@
+/*
+ * Device Tree Source for RK3368 SoC thermal
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/thermal/thermal.h>
+
+cpu_thermal: cpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 0>;
+
+	trips {
+		cpu_alert0: cpu_alert0 {
+			temperature = <75000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_alert1: cpu_alert1 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_crit: cpu_crit {
+			temperature = <95000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&cpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+		map1 {
+			trip = <&cpu_alert1>;
+			cooling-device =
+				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+gpu_thermal: gpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 1>;
+
+	trips {
+		gpu_alert0: gpu_alert0 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		gpu_crit: gpu_crit {
+			temperature = <1150000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&gpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
-- 
1.9.1

[PATCH 3/5] arm64: dts: Add the thermal data found on RK3368

[Caesar Wang]

This patchset add the thermal for RK3368 dts,
Since the two CPU clusters, with four CPU core for each cluster,
One cluster is optimized for high-performance(big cluster) and the othe
is optimized for low power(little cluster).

This patch adds the second order for thermal throttle, and the critical
temperature for thermal over-tempeature protection on Software.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi | 112 +++++++++++++++++++++++
 1 file changed, 112 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
new file mode 100644
index 0000000..a10010f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi
@@ -0,0 +1,112 @@
+/*
+ * Device Tree Source for RK3368 SoC thermal
+ *
+ * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
+ * Caesar Wang <wxt@rock-chips.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include <dt-bindings/thermal/thermal.h>
+
+cpu_thermal: cpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 0>;
+
+	trips {
+		cpu_alert0: cpu_alert0 {
+			temperature = <75000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_alert1: cpu_alert1 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		cpu_crit: cpu_crit {
+			temperature = <95000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&cpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+		map1 {
+			trip = <&cpu_alert1>;
+			cooling-device =
+				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+gpu_thermal: gpu_thermal {
+	polling-delay-passive = <100>; /* milliseconds */
+	polling-delay = <5000>; /* milliseconds */
+
+	thermal-sensors = <&tsadc 1>;
+
+	trips {
+		gpu_alert0: gpu_alert0 {
+			temperature = <80000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "passive";
+		};
+		gpu_crit: gpu_crit {
+			temperature = <1150000>; /* millicelsius */
+			hysteresis = <2000>; /* millicelsius */
+			type = "critical";
+		};
+	};
+
+	cooling-maps {
+		map0 {
+			trip = <&gpu_alert0>;
+			cooling-device =
+				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+		};
+	};
+};
-- 
1.9.1

[PATCH 4/5] arm64: dts: Add main Thermal info to rk3368.dtsi

[Caesar Wang]

This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a712bea..71d7793 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -45,6 +45,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3368";
@@ -123,6 +124,8 @@
 			reg = <0x0 0x0>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_l1: cpu@1 {
@@ -155,6 +158,8 @@
 			reg = <0x0 0x100>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_b1: cpu@101 {
@@ -404,6 +409,25 @@
 		status = "disabled";
 	};
 
+	thermal-zones {
+		#include "rk3368-thermal.dtsi"
+	};
+
+	tsadc: tsadc@ff280000 {
+		compatible = "rockchip,rk3368-tsadc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "default";
+		pinctrl-0 = <&otp_out>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <95000>;
+		status = "disabled";
+	};
+
 	gmac: ethernet@ff290000 {
 		compatible = "rockchip,rk3368-gmac";
 		reg = <0x0 0xff290000 0x0 0x10000>;
@@ -829,6 +853,12 @@
 			};
 		};
 
+		tsadc {
+			otp_out: otp-out {
+				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,
-- 
1.9.1

[PATCH 4/5] arm64: dts: Add main Thermal info to rk3368.dtsi

[Caesar Wang]

This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a712bea..71d7793 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -45,6 +45,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3368";
@@ -123,6 +124,8 @@
 			reg = <0x0 0x0>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_l1: cpu at 1 {
@@ -155,6 +158,8 @@
 			reg = <0x0 0x100>;
 			cpu-idle-states = <&cpu_sleep>;
 			enable-method = "psci";
+
+			#cooling-cells = <2>; /* min followed by max */
 		};
 
 		cpu_b1: cpu at 101 {
@@ -404,6 +409,25 @@
 		status = "disabled";
 	};
 
+	thermal-zones {
+		#include "rk3368-thermal.dtsi"
+	};
+
+	tsadc: tsadc at ff280000 {
+		compatible = "rockchip,rk3368-tsadc";
+		reg = <0x0 0xff280000 0x0 0x100>;
+		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		pinctrl-names = "default";
+		pinctrl-0 = <&otp_out>;
+		#thermal-sensor-cells = <1>;
+		rockchip,hw-tshut-temp = <95000>;
+		status = "disabled";
+	};
+
 	gmac: ethernet at ff290000 {
 		compatible = "rockchip,rk3368-gmac";
 		reg = <0x0 0xff290000 0x0 0x10000>;
@@ -829,6 +853,12 @@
 			};
 		};
 
+		tsadc {
+			otp_out: otp-out {
+				rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,
-- 
1.9.1

[PATCH 5/5] arm64: dts: Enable the Thermal on R88 board

[Caesar Wang]

This patch enable the TS-ADC.

When a thermal temperature is invoked use the CRU to reset the chip
on R88 board. TSHUT is low active on this board.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
index 401a812..7684426a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -336,6 +336,12 @@
 	status = "okay";
 };
 
+&tsadc {
+	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+	status = "okay";
+}
+
 &uart2 {
 	status = "okay";
 };
-- 
1.9.1

[PATCH 5/5] arm64: dts: Enable the Thermal on R88 board

[Caesar Wang]

This patch enable the TS-ADC.

When a thermal temperature is invoked use the CRU to reset the chip
on R88 board. TSHUT is low active on this board.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

 arch/arm64/boot/dts/rockchip/rk3368-r88.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
index 401a812..7684426a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts
@@ -336,6 +336,12 @@
 	status = "okay";
 };
 
+&tsadc {
+	rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+	status = "okay";
+}
+
 &uart2 {
 	status = "okay";
 };
-- 
1.9.1

Re: [PATCH 2/5] thermal: rockchip: Support the RK3368 SoCs in thermal driver

[Dmitry Torokhov]

Hi Caesar,

On Mon, Sep 21, 2015 at 12:16:08PM +0800, Caesar Wang wrote:
> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
> of each channel can be configurable.
> 
> The system has two Temperature Sensors, channel 0 is for CPU,
> and channel 1 is for GPU.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
>  drivers/thermal/rockchip_thermal.c | 201 ++++++++++++++++++++++++++++++++-----
>  1 file changed, 176 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 4d5b7d4..16d2476 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -1,6 +1,9 @@
>  /*
>   * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>   *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt@rock-chips.com>
> + *
>   * This program is free software; you can redistribute it and/or modify it
>   * under the terms and conditions of the GNU General Public License,
>   * version 2, as published by the Free Software Foundation.
> @@ -43,16 +46,11 @@ enum tshut_polarity {
>  	TSHUT_HIGH_ACTIVE,
>  };
>  
> -/**
> - * The system has three Temperature Sensors.  channel 0 is reserved,
> - * channel 1 is for CPU, and channel 2 is for GPU.
> - */
> -enum sensor_id {
> -	SENSOR_CPU = 1,
> -	SENSOR_GPU,
> -};
> -
>  struct rockchip_tsadc_chip {
> +	/* The sensor id of chip correspond to the ADC channel */
> +	int cpu_id;
> +	int gpu_id;
> +
>  	/* The hardware-controlled tshut property */
>  	long tshut_temp;
>  	enum tshut_mode tshut_mode;
> @@ -72,10 +70,11 @@ struct rockchip_tsadc_chip {
>  struct rockchip_thermal_sensor {
>  	struct rockchip_thermal_data *thermal;
>  	struct thermal_zone_device *tzd;
> -	enum sensor_id id;
> +	int id;
>  };
>  
> -#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
> +/* Two sensors: CPU and GPU */
> +#define NUM_SENSORS	2
>  
>  struct rockchip_thermal_data {
>  	const struct rockchip_tsadc_chip *chip;
> @@ -94,7 +93,7 @@ struct rockchip_thermal_data {
>  	enum tshut_polarity tshut_polarity;
>  };
>  
> -/* TSADC V2 Sensor info define: */
> +/* TSADC Sensor info define: */
>  #define TSADCV2_AUTO_CON			0x04
>  #define TSADCV2_INT_EN				0x08
>  #define TSADCV2_INT_PD				0x0c
> @@ -116,6 +115,8 @@ struct rockchip_thermal_data {
>  #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
>  
>  #define TSADCV2_DATA_MASK			0xfff
> +#define TSADCV3_DATA_MASK			0x3ff
> +
>  #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
>  #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
> @@ -164,6 +165,45 @@ static const struct tsadc_table v2_code_table[] = {
>  	{3421, 125000},
>  };
>  
> +static const struct tsadc_table v3_code_table[] = {
> +	{0, -40000},
> +	{106, -40000},
> +	{108, -35000},
> +	{110, -30000},
> +	{112, -25000},
> +	{114, -20000},
> +	{116, -15000},
> +	{118, -10000},
> +	{120, -5000},
> +	{122, 0},
> +	{124, 5000},
> +	{126, 10000},
> +	{128, 15000},
> +	{130, 20000},
> +	{132, 25000},
> +	{134, 30000},
> +	{136, 35000},
> +	{138, 40000},
> +	{140, 45000},
> +	{142, 50000},
> +	{144, 55000},
> +	{146, 60000},
> +	{148, 65000},
> +	{150, 70000},
> +	{152, 75000},
> +	{154, 80000},
> +	{156, 85000},
> +	{158, 90000},
> +	{160, 95000},
> +	{162, 100000},
> +	{163, 105000},
> +	{165, 110000},
> +	{167, 115000},
> +	{169, 120000},
> +	{171, 125000},
> +	{TSADCV3_DATA_MASK, 125000},
> +};
> +
>  static u32 rk_tsadcv2_temp_to_code(long temp)
>  {
>  	int high, low, mid;
> @@ -227,16 +267,83 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>  	return 0;
>  }
>  
> +static u32 rk_tsadcv3_temp_to_code(long temp)
> +{
> +	int high, low, mid;
> +
> +	low = 0;
> +	high = ARRAY_SIZE(v3_code_table) - 1;
> +	mid = (high + low) / 2;
> +
> +	if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
> +		return 0;

How is this different from v2 conversion except for the table being
used? I think you should be able to reuse the conversion routines if you
pass the conversion table in as a parameter.

Thanks.

-- 
Dmitry

[PATCH 2/5] thermal: rockchip: Support the RK3368 SoCs in thermal driver

[Dmitry Torokhov]

Hi Caesar,

On Mon, Sep 21, 2015 at 12:16:08PM +0800, Caesar Wang wrote:
> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
> of each channel can be configurable.
> 
> The system has two Temperature Sensors, channel 0 is for CPU,
> and channel 1 is for GPU.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
>  drivers/thermal/rockchip_thermal.c | 201 ++++++++++++++++++++++++++++++++-----
>  1 file changed, 176 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
> index 4d5b7d4..16d2476 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -1,6 +1,9 @@
>  /*
>   * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>   *
> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
> + * Caesar Wang <wxt@rock-chips.com>
> + *
>   * This program is free software; you can redistribute it and/or modify it
>   * under the terms and conditions of the GNU General Public License,
>   * version 2, as published by the Free Software Foundation.
> @@ -43,16 +46,11 @@ enum tshut_polarity {
>  	TSHUT_HIGH_ACTIVE,
>  };
>  
> -/**
> - * The system has three Temperature Sensors.  channel 0 is reserved,
> - * channel 1 is for CPU, and channel 2 is for GPU.
> - */
> -enum sensor_id {
> -	SENSOR_CPU = 1,
> -	SENSOR_GPU,
> -};
> -
>  struct rockchip_tsadc_chip {
> +	/* The sensor id of chip correspond to the ADC channel */
> +	int cpu_id;
> +	int gpu_id;
> +
>  	/* The hardware-controlled tshut property */
>  	long tshut_temp;
>  	enum tshut_mode tshut_mode;
> @@ -72,10 +70,11 @@ struct rockchip_tsadc_chip {
>  struct rockchip_thermal_sensor {
>  	struct rockchip_thermal_data *thermal;
>  	struct thermal_zone_device *tzd;
> -	enum sensor_id id;
> +	int id;
>  };
>  
> -#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
> +/* Two sensors: CPU and GPU */
> +#define NUM_SENSORS	2
>  
>  struct rockchip_thermal_data {
>  	const struct rockchip_tsadc_chip *chip;
> @@ -94,7 +93,7 @@ struct rockchip_thermal_data {
>  	enum tshut_polarity tshut_polarity;
>  };
>  
> -/* TSADC V2 Sensor info define: */
> +/* TSADC Sensor info define: */
>  #define TSADCV2_AUTO_CON			0x04
>  #define TSADCV2_INT_EN				0x08
>  #define TSADCV2_INT_PD				0x0c
> @@ -116,6 +115,8 @@ struct rockchip_thermal_data {
>  #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
>  
>  #define TSADCV2_DATA_MASK			0xfff
> +#define TSADCV3_DATA_MASK			0x3ff
> +
>  #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
>  #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
>  #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
> @@ -164,6 +165,45 @@ static const struct tsadc_table v2_code_table[] = {
>  	{3421, 125000},
>  };
>  
> +static const struct tsadc_table v3_code_table[] = {
> +	{0, -40000},
> +	{106, -40000},
> +	{108, -35000},
> +	{110, -30000},
> +	{112, -25000},
> +	{114, -20000},
> +	{116, -15000},
> +	{118, -10000},
> +	{120, -5000},
> +	{122, 0},
> +	{124, 5000},
> +	{126, 10000},
> +	{128, 15000},
> +	{130, 20000},
> +	{132, 25000},
> +	{134, 30000},
> +	{136, 35000},
> +	{138, 40000},
> +	{140, 45000},
> +	{142, 50000},
> +	{144, 55000},
> +	{146, 60000},
> +	{148, 65000},
> +	{150, 70000},
> +	{152, 75000},
> +	{154, 80000},
> +	{156, 85000},
> +	{158, 90000},
> +	{160, 95000},
> +	{162, 100000},
> +	{163, 105000},
> +	{165, 110000},
> +	{167, 115000},
> +	{169, 120000},
> +	{171, 125000},
> +	{TSADCV3_DATA_MASK, 125000},
> +};
> +
>  static u32 rk_tsadcv2_temp_to_code(long temp)
>  {
>  	int high, low, mid;
> @@ -227,16 +267,83 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>  	return 0;
>  }
>  
> +static u32 rk_tsadcv3_temp_to_code(long temp)
> +{
> +	int high, low, mid;
> +
> +	low = 0;
> +	high = ARRAY_SIZE(v3_code_table) - 1;
> +	mid = (high + low) / 2;
> +
> +	if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
> +		return 0;

How is this different from v2 conversion except for the table being
used? I think you should be able to reuse the conversion routines if you
pass the conversion table in as a parameter.

Thanks.

-- 
Dmitry

Re: [PATCH 2/5] thermal: rockchip: Support the RK3368 SoCs in thermal driver

[Caesar Wang]

Hi Dmitry,

在 2015年09月22日 01:08, Dmitry Torokhov 写道:
> Hi Caesar,
>
> On Mon, Sep 21, 2015 at 12:16:08PM +0800, Caesar Wang wrote:
>> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
>> of each channel can be configurable.
>>
>> The system has two Temperature Sensors, channel 0 is for CPU,
>> and channel 1 is for GPU.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>>   drivers/thermal/rockchip_thermal.c | 201 ++++++++++++++++++++++++++++++++-----
>>   1 file changed, 176 insertions(+), 25 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index 4d5b7d4..16d2476 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -1,6 +1,9 @@
>>   /*
>>    * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>>    *
>> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
>> + * Caesar Wang <wxt@rock-chips.com>
>> + *
>>    * This program is free software; you can redistribute it and/or modify it
>>    * under the terms and conditions of the GNU General Public License,
>>    * version 2, as published by the Free Software Foundation.
>> @@ -43,16 +46,11 @@ enum tshut_polarity {
>>   	TSHUT_HIGH_ACTIVE,
>>   };
>>   
>> -/**
>> - * The system has three Temperature Sensors.  channel 0 is reserved,
>> - * channel 1 is for CPU, and channel 2 is for GPU.
>> - */
>> -enum sensor_id {
>> -	SENSOR_CPU = 1,
>> -	SENSOR_GPU,
>> -};
>> -
>>   struct rockchip_tsadc_chip {
>> +	/* The sensor id of chip correspond to the ADC channel */
>> +	int cpu_id;
>> +	int gpu_id;
>> +
>>   	/* The hardware-controlled tshut property */
>>   	long tshut_temp;
>>   	enum tshut_mode tshut_mode;
>> @@ -72,10 +70,11 @@ struct rockchip_tsadc_chip {
>>   struct rockchip_thermal_sensor {
>>   	struct rockchip_thermal_data *thermal;
>>   	struct thermal_zone_device *tzd;
>> -	enum sensor_id id;
>> +	int id;
>>   };
>>   
>> -#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
>> +/* Two sensors: CPU and GPU */
>> +#define NUM_SENSORS	2
>>   
>>   struct rockchip_thermal_data {
>>   	const struct rockchip_tsadc_chip *chip;
>> @@ -94,7 +93,7 @@ struct rockchip_thermal_data {
>>   	enum tshut_polarity tshut_polarity;
>>   };
>>   
>> -/* TSADC V2 Sensor info define: */
>> +/* TSADC Sensor info define: */
>>   #define TSADCV2_AUTO_CON			0x04
>>   #define TSADCV2_INT_EN				0x08
>>   #define TSADCV2_INT_PD				0x0c
>> @@ -116,6 +115,8 @@ struct rockchip_thermal_data {
>>   #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
>>   
>>   #define TSADCV2_DATA_MASK			0xfff
>> +#define TSADCV3_DATA_MASK			0x3ff
>> +
>>   #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
>>   #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
>>   #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
>> @@ -164,6 +165,45 @@ static const struct tsadc_table v2_code_table[] = {
>>   	{3421, 125000},
>>   };
>>   
>> +static const struct tsadc_table v3_code_table[] = {
>> +	{0, -40000},
>> +	{106, -40000},
>> +	{108, -35000},
>> +	{110, -30000},
>> +	{112, -25000},
>> +	{114, -20000},
>> +	{116, -15000},
>> +	{118, -10000},
>> +	{120, -5000},
>> +	{122, 0},
>> +	{124, 5000},
>> +	{126, 10000},
>> +	{128, 15000},
>> +	{130, 20000},
>> +	{132, 25000},
>> +	{134, 30000},
>> +	{136, 35000},
>> +	{138, 40000},
>> +	{140, 45000},
>> +	{142, 50000},
>> +	{144, 55000},
>> +	{146, 60000},
>> +	{148, 65000},
>> +	{150, 70000},
>> +	{152, 75000},
>> +	{154, 80000},
>> +	{156, 85000},
>> +	{158, 90000},
>> +	{160, 95000},
>> +	{162, 100000},
>> +	{163, 105000},
>> +	{165, 110000},
>> +	{167, 115000},
>> +	{169, 120000},
>> +	{171, 125000},
>> +	{TSADCV3_DATA_MASK, 125000},
>> +};
>> +
>>   static u32 rk_tsadcv2_temp_to_code(long temp)
>>   {
>>   	int high, low, mid;
>> @@ -227,16 +267,83 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>>   	return 0;
>>   }
>>   
>> +static u32 rk_tsadcv3_temp_to_code(long temp)
>> +{
>> +	int high, low, mid;
>> +
>> +	low = 0;
>> +	high = ARRAY_SIZE(v3_code_table) - 1;
>> +	mid = (high + low) / 2;
>> +
>> +	if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
>> +		return 0;
> How is this different from v2 conversion except for the table being
> used? I think you should be able to reuse the conversion routines if you
> pass the conversion table in as a parameter.

The table_v3 is same with the table_v2 but the anolog data of ADC.

Do you want to reuse the conversion routines,?  I know the conversion 
routines is same in
rk_tsadcv3_temp_to_code() if we have many socs maybe the ADC analog data 
are different.

Says:

rk_tsadcv3_temp_to_code(temp, xxx)

{
     ...

yyyy =  rk_tsadcv2_temp_to_code(temp)

...
}
...


I guess you want to independent the adc value,after all the temperature 
points are same.

Says: maybe i will better likely on this.

//3066/3188
.....

//3288

static const struct tsadc_table v2_code_table[] = {
	{0,3800,3792,3783, 3774,3765, 3756,3747,......
},


//3368

static const struct tsadc_table v3_code_table[] = {
	{0,106,108,110,112,114,......
},

//next socs

  ....

Dmitry, I know you don't mean that.:-)

I'm no sure if this way will better for the thermal driver.


> Thanks.
>


-- 
Thanks,
Caesar

[PATCH 2/5] thermal: rockchip: Support the RK3368 SoCs in thermal driver

[Caesar Wang]

Hi Dmitry,

? 2015?09?22? 01:08, Dmitry Torokhov ??:
> Hi Caesar,
>
> On Mon, Sep 21, 2015 at 12:16:08PM +0800, Caesar Wang wrote:
>> The RK3368 SoCs support to 2 channel TS-ADC, the temperature criteria
>> of each channel can be configurable.
>>
>> The system has two Temperature Sensors, channel 0 is for CPU,
>> and channel 1 is for GPU.
>>
>> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
>> ---
>>
>>   drivers/thermal/rockchip_thermal.c | 201 ++++++++++++++++++++++++++++++++-----
>>   1 file changed, 176 insertions(+), 25 deletions(-)
>>
>> diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
>> index 4d5b7d4..16d2476 100644
>> --- a/drivers/thermal/rockchip_thermal.c
>> +++ b/drivers/thermal/rockchip_thermal.c
>> @@ -1,6 +1,9 @@
>>   /*
>>    * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
>>    *
>> + * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
>> + * Caesar Wang <wxt@rock-chips.com>
>> + *
>>    * This program is free software; you can redistribute it and/or modify it
>>    * under the terms and conditions of the GNU General Public License,
>>    * version 2, as published by the Free Software Foundation.
>> @@ -43,16 +46,11 @@ enum tshut_polarity {
>>   	TSHUT_HIGH_ACTIVE,
>>   };
>>   
>> -/**
>> - * The system has three Temperature Sensors.  channel 0 is reserved,
>> - * channel 1 is for CPU, and channel 2 is for GPU.
>> - */
>> -enum sensor_id {
>> -	SENSOR_CPU = 1,
>> -	SENSOR_GPU,
>> -};
>> -
>>   struct rockchip_tsadc_chip {
>> +	/* The sensor id of chip correspond to the ADC channel */
>> +	int cpu_id;
>> +	int gpu_id;
>> +
>>   	/* The hardware-controlled tshut property */
>>   	long tshut_temp;
>>   	enum tshut_mode tshut_mode;
>> @@ -72,10 +70,11 @@ struct rockchip_tsadc_chip {
>>   struct rockchip_thermal_sensor {
>>   	struct rockchip_thermal_data *thermal;
>>   	struct thermal_zone_device *tzd;
>> -	enum sensor_id id;
>> +	int id;
>>   };
>>   
>> -#define NUM_SENSORS	2 /* Ignore unused sensor 0 */
>> +/* Two sensors: CPU and GPU */
>> +#define NUM_SENSORS	2
>>   
>>   struct rockchip_thermal_data {
>>   	const struct rockchip_tsadc_chip *chip;
>> @@ -94,7 +93,7 @@ struct rockchip_thermal_data {
>>   	enum tshut_polarity tshut_polarity;
>>   };
>>   
>> -/* TSADC V2 Sensor info define: */
>> +/* TSADC Sensor info define: */
>>   #define TSADCV2_AUTO_CON			0x04
>>   #define TSADCV2_INT_EN				0x08
>>   #define TSADCV2_INT_PD				0x0c
>> @@ -116,6 +115,8 @@ struct rockchip_thermal_data {
>>   #define TSADCV2_INT_PD_CLEAR_MASK		~BIT(8)
>>   
>>   #define TSADCV2_DATA_MASK			0xfff
>> +#define TSADCV3_DATA_MASK			0x3ff
>> +
>>   #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT	4
>>   #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT	4
>>   #define TSADCV2_AUTO_PERIOD_TIME		250 /* msec */
>> @@ -164,6 +165,45 @@ static const struct tsadc_table v2_code_table[] = {
>>   	{3421, 125000},
>>   };
>>   
>> +static const struct tsadc_table v3_code_table[] = {
>> +	{0, -40000},
>> +	{106, -40000},
>> +	{108, -35000},
>> +	{110, -30000},
>> +	{112, -25000},
>> +	{114, -20000},
>> +	{116, -15000},
>> +	{118, -10000},
>> +	{120, -5000},
>> +	{122, 0},
>> +	{124, 5000},
>> +	{126, 10000},
>> +	{128, 15000},
>> +	{130, 20000},
>> +	{132, 25000},
>> +	{134, 30000},
>> +	{136, 35000},
>> +	{138, 40000},
>> +	{140, 45000},
>> +	{142, 50000},
>> +	{144, 55000},
>> +	{146, 60000},
>> +	{148, 65000},
>> +	{150, 70000},
>> +	{152, 75000},
>> +	{154, 80000},
>> +	{156, 85000},
>> +	{158, 90000},
>> +	{160, 95000},
>> +	{162, 100000},
>> +	{163, 105000},
>> +	{165, 110000},
>> +	{167, 115000},
>> +	{169, 120000},
>> +	{171, 125000},
>> +	{TSADCV3_DATA_MASK, 125000},
>> +};
>> +
>>   static u32 rk_tsadcv2_temp_to_code(long temp)
>>   {
>>   	int high, low, mid;
>> @@ -227,16 +267,83 @@ static int rk_tsadcv2_code_to_temp(u32 code, int *temp)
>>   	return 0;
>>   }
>>   
>> +static u32 rk_tsadcv3_temp_to_code(long temp)
>> +{
>> +	int high, low, mid;
>> +
>> +	low = 0;
>> +	high = ARRAY_SIZE(v3_code_table) - 1;
>> +	mid = (high + low) / 2;
>> +
>> +	if (temp < v3_code_table[low].temp || temp > v3_code_table[high].temp)
>> +		return 0;
> How is this different from v2 conversion except for the table being
> used? I think you should be able to reuse the conversion routines if you
> pass the conversion table in as a parameter.

The table_v3 is same with the table_v2 but the anolog data of ADC.

Do you want to reuse the conversion routines,?  I know the conversion 
routines is same in
rk_tsadcv3_temp_to_code() if we have many socs maybe the ADC analog data 
are different.

Says:

rk_tsadcv3_temp_to_code(temp, xxx)

{
     ...

yyyy =  rk_tsadcv2_temp_to_code(temp)

...
}
...


I guess you want to independent the adc value,after all the temperature 
points are same.

Says: maybe i will better likely on this.

//3066/3188
.....

//3288

static const struct tsadc_table v2_code_table[] = {
	{0,3800,3792,3783, 3774,3765, 3756,3747,......
},


//3368

static const struct tsadc_table v3_code_table[] = {
	{0,106,108,110,112,114,......
},

//next socs

  ....

Dmitry, I know you don't mean that.:-)

I'm no sure if this way will better for the thermal driver.


> Thanks.
>


-- 
Thanks,
Caesar