[PATCH 1/2] mtd: brcmnand: Add brcm,nand-bcm63268 device tree binding

[PATCH 1/2] mtd: brcmnand: Add brcm,nand-bcm63268 device tree binding

[Simon Arlott]

Add device tree binding for NAND on the BCM63268.

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
 .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
index 4ff7128..45c6e0c 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
@@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
        and enable registers
      - reg-names: (required) "nand-int-base"
 
+   * "brcm,nand-bcm63268"
+     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
+     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
+       and enable registers, and boot address registers
+     - reg-names: (required) "nand-intr-base"
+     - clock: (required) reference to the clock for NAND controller
+
    * "brcm,nand-iproc"
      - reg: (required) the "IDM" register range, for interrupt enable and APB
        bus access endianness configuration, and the "EXT" register range,
@@ -148,3 +155,29 @@ nand@f0442800 {
 		};
 	};
 };
+
+nand@0x10000200 {
+	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
+		"brcm,brcmnand-v4.0", "brcm,brcmnand";
+	reg = <0x10000200 0x180>,
+	      <0x10000600 0x200>,
+	      <0x100000b0 0x10>;
+	reg-names = "nand", "nand-cache", "nand-intr-base";
+	interrupt-parent = <&periph_intc>;
+	interrupts = <50>;
+	clocks = <&periph_clk 20>;
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand0: nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <1>;
+		nand-ecc-step-size = <512>;
+
+		#address-cells = <0>;
+		#size-cells = <0>;
+	};
+};
-- 
2.1.4

-- 
Simon Arlott

[PATCH 1/2] mtd: brcmnand: Add brcm, nand-bcm63268 device tree binding

[Simon Arlott]

Add device tree binding for NAND on the BCM63268.

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
 .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
index 4ff7128..45c6e0c 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
@@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
        and enable registers
      - reg-names: (required) "nand-int-base"
 
+   * "brcm,nand-bcm63268"
+     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
+     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
+       and enable registers, and boot address registers
+     - reg-names: (required) "nand-intr-base"
+     - clock: (required) reference to the clock for NAND controller
+
    * "brcm,nand-iproc"
      - reg: (required) the "IDM" register range, for interrupt enable and APB
        bus access endianness configuration, and the "EXT" register range,
@@ -148,3 +155,29 @@ nand@f0442800 {
 		};
 	};
 };
+
+nand@0x10000200 {
+	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
+		"brcm,brcmnand-v4.0", "brcm,brcmnand";
+	reg = <0x10000200 0x180>,
+	      <0x10000600 0x200>,
+	      <0x100000b0 0x10>;
+	reg-names = "nand", "nand-cache", "nand-intr-base";
+	interrupt-parent = <&periph_intc>;
+	interrupts = <50>;
+	clocks = <&periph_clk 20>;
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand0: nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <1>;
+		nand-ecc-step-size = <512>;
+
+		#address-cells = <0>;
+		#size-cells = <0>;
+	};
+};
-- 
2.1.4

-- 
Simon Arlott

[PATCH 1/2] mtd: brcmnand: Add brcm,nand-bcm63268 device tree binding

[Simon Arlott]

Add device tree binding for NAND on the BCM63268.

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
---
 .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
index 4ff7128..45c6e0c 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
@@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
        and enable registers
      - reg-names: (required) "nand-int-base"
 
+   * "brcm,nand-bcm63268"
+     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
+     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
+       and enable registers, and boot address registers
+     - reg-names: (required) "nand-intr-base"
+     - clock: (required) reference to the clock for NAND controller
+
    * "brcm,nand-iproc"
      - reg: (required) the "IDM" register range, for interrupt enable and APB
        bus access endianness configuration, and the "EXT" register range,
@@ -148,3 +155,29 @@ nand@f0442800 {
 		};
 	};
 };
+
+nand@0x10000200 {
+	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
+		"brcm,brcmnand-v4.0", "brcm,brcmnand";
+	reg = <0x10000200 0x180>,
+	      <0x10000600 0x200>,
+	      <0x100000b0 0x10>;
+	reg-names = "nand", "nand-cache", "nand-intr-base";
+	interrupt-parent = <&periph_intc>;
+	interrupts = <50>;
+	clocks = <&periph_clk 20>;
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand0: nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <1>;
+		nand-ecc-step-size = <512>;
+
+		#address-cells = <0>;
+		#size-cells = <0>;
+	};
+};
-- 
2.1.4

-- 
Simon Arlott
--
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[PATCH 2/2] mtd: brcmnand: Add support for BCM63268 interrupts

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 175 ++++++++++++++++++++++++++++++
 2 files changed, 176 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..c20bf40 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..79b54f3
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = of_clk_get(dev->of_node, 0);
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		clk_put(priv->clk);
+		return ret;
+	}
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret) {
+		clk_disable_unprepare(priv->clk);
+		clk_put(priv->clk);
+	}
+
+	return ret;
+}
+
+static int bcm63268_nand_remove(struct platform_device *pdev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
+	struct bcm63268_nand_soc *priv =
+			container_of(ctrl->soc, struct bcm63268_nand_soc, soc);
+
+	clk_disable_unprepare(priv->clk);
+	clk_put(priv->clk);
+
+	return brcmnand_remove(pdev);
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,nand-bcm63268" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= bcm63268_nand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
-- 
2.1.4

-- 
Simon Arlott

[PATCH 2/2] mtd: brcmnand: Add support for BCM63268 interrupts

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
---
 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 175 ++++++++++++++++++++++++++++++
 2 files changed, 176 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..c20bf40 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..79b54f3
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = of_clk_get(dev->of_node, 0);
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		clk_put(priv->clk);
+		return ret;
+	}
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret) {
+		clk_disable_unprepare(priv->clk);
+		clk_put(priv->clk);
+	}
+
+	return ret;
+}
+
+static int bcm63268_nand_remove(struct platform_device *pdev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
+	struct bcm63268_nand_soc *priv =
+			container_of(ctrl->soc, struct bcm63268_nand_soc, soc);
+
+	clk_disable_unprepare(priv->clk);
+	clk_put(priv->clk);
+
+	return brcmnand_remove(pdev);
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,nand-bcm63268" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= bcm63268_nand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
-- 
2.1.4

-- 
Simon Arlott
--
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[PATCH 2/2 (v2)] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a "device_remove" function to struct brcmnand_soc so that the clock
can be disabled when the device is removed.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
On 21/11/15 13:12, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.

Sorry, that version won't even compile...

 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 171 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   3 +
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 176 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..58a8d84
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,171 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static void bcm63268_nand_remove(struct bcm63268_nand_soc *priv)
+{
+	clk_disable_unprepare(priv->clk);
+	clk_put(priv->clk);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = of_clk_get(dev->of_node, 0);
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		clk_put(priv->clk);
+		return ret;
+	}
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+	soc->remove_device = bcm63268_nand_remove;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret) {
+		clk_disable_unprepare(priv->clk);
+		clk_put(priv->clk);
+	}
+
+	return ret;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,nand-bcm63268" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= brcmnand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..7b4988f 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2270,6 +2270,9 @@ int brcmnand_remove(struct platform_device *pdev)
 	list_for_each_entry(host, &ctrl->host_list, node)
 		nand_release(&host->mtd);
 
+	if (ctrl->soc && ctrl->soc->remove_device)
+		ctrl->soc->remove_device(ctrl->soc);
+
 	dev_set_drvdata(&pdev->dev, NULL);
 
 	return 0;
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..5c5dc2d 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -24,6 +24,7 @@ struct brcmnand_soc {
 	bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
 	void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
 	void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare);
+	void (*remove_device)(struct brcmnand_soc *soc);
 };
 
 static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc)
-- 
2.1.4

-- 
Simon Arlott

[PATCH (v3) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a "device_remove" function to struct brcmnand_soc so that the clock
can be disabled when the device is removed.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
On 21/11/15 17:04, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
>  drivers/mtd/nand/brcmnand/bcm63268_nand.c | 171 ++++++++++++++++++++++++++++++

Changed argument of bcm63268_nand_remove() from struct bcm63268_nand_soc
to struct brcmnand_soc.

 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 174 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   3 +
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 179 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..70b142e
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static void bcm63268_nand_remove(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+
+	clk_disable_unprepare(priv->clk);
+	clk_put(priv->clk);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = of_clk_get(dev->of_node, 0);
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		clk_put(priv->clk);
+		return ret;
+	}
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+	soc->remove_device = bcm63268_nand_remove;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret) {
+		clk_disable_unprepare(priv->clk);
+		clk_put(priv->clk);
+	}
+
+	return ret;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,nand-bcm63268" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= brcmnand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..7b4988f 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2270,6 +2270,9 @@ int brcmnand_remove(struct platform_device *pdev)
 	list_for_each_entry(host, &ctrl->host_list, node)
 		nand_release(&host->mtd);
 
+	if (ctrl->soc && ctrl->soc->remove_device)
+		ctrl->soc->remove_device(ctrl->soc);
+
 	dev_set_drvdata(&pdev->dev, NULL);
 
 	return 0;
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..5c5dc2d 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -24,6 +24,7 @@ struct brcmnand_soc {
 	bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
 	void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
 	void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare);
+	void (*remove_device)(struct brcmnand_soc *soc);
 };
 
 static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc)
-- 
2.1.4

-- 
Simon Arlott

[PATCH (v3) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a "device_remove" function to struct brcmnand_soc so that the clock
can be disabled when the device is removed.

Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
---
On 21/11/15 17:04, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
>  drivers/mtd/nand/brcmnand/bcm63268_nand.c | 171 ++++++++++++++++++++++++++++++

Changed argument of bcm63268_nand_remove() from struct bcm63268_nand_soc
to struct brcmnand_soc.

 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 174 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   3 +
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 179 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..70b142e
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static void bcm63268_nand_remove(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+
+	clk_disable_unprepare(priv->clk);
+	clk_put(priv->clk);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = of_clk_get(dev->of_node, 0);
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		clk_put(priv->clk);
+		return ret;
+	}
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+	soc->remove_device = bcm63268_nand_remove;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret) {
+		clk_disable_unprepare(priv->clk);
+		clk_put(priv->clk);
+	}
+
+	return ret;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,nand-bcm63268" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= brcmnand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..7b4988f 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2270,6 +2270,9 @@ int brcmnand_remove(struct platform_device *pdev)
 	list_for_each_entry(host, &ctrl->host_list, node)
 		nand_release(&host->mtd);
 
+	if (ctrl->soc && ctrl->soc->remove_device)
+		ctrl->soc->remove_device(ctrl->soc);
+
 	dev_set_drvdata(&pdev->dev, NULL);
 
 	return 0;
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..5c5dc2d 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -24,6 +24,7 @@ struct brcmnand_soc {
 	bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
 	void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
 	void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare);
+	void (*remove_device)(struct brcmnand_soc *soc);
 };
 
 static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc)
-- 
2.1.4

-- 
Simon Arlott

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Re: [PATCH 1/2] mtd: brcmnand: Add brcm,nand-bcm63268 device tree binding

[Rob Herring]

On Sat, Nov 21, 2015 at 01:10:45PM +0000, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
> 
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
> 
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> ---
>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> index 4ff7128..45c6e0c 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> @@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
>         and enable registers
>       - reg-names: (required) "nand-int-base"
>  
> +   * "brcm,nand-bcm63268"
> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"

vendor,<soc>-device is preferred.

[PATCH (v4) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

Add device tree binding for NAND on the BCM63268.

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
On 22/11/15 21:59, Rob Herring wrote:
>> + * "brcm,nand-bcm63268"
>> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>
> vendor,<soc>-device is preferred.

The existing two bindings use brcm,nand-<soc>, but I've changed this one.

 .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
index 4ff7128..2644d6c 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
@@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
        and enable registers
      - reg-names: (required) "nand-int-base"
 
+   * "brcm,bcm63268-nand"
+     - compatible: should contain "brcm,bcm<soc>-nand", "brcm,bcm63268-nand"
+     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
+       and enable registers, and boot address registers
+     - reg-names: (required) "nand-intr-base"
+     - clock: (required) reference to the clock for NAND controller
+
    * "brcm,nand-iproc"
      - reg: (required) the "IDM" register range, for interrupt enable and APB
        bus access endianness configuration, and the "EXT" register range,
@@ -148,3 +155,29 @@ nand@f0442800 {
 		};
 	};
 };
+
+nand@0x10000200 {
+	compatible = "brcm,bcm63168-nand", "brcm,bcm63268-nand",
+		"brcm,brcmnand-v4.0", "brcm,brcmnand";
+	reg = <0x10000200 0x180>,
+	      <0x10000600 0x200>,
+	      <0x100000b0 0x10>;
+	reg-names = "nand", "nand-cache", "nand-intr-base";
+	interrupt-parent = <&periph_intc>;
+	interrupts = <50>;
+	clocks = <&periph_clk 20>;
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand0: nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <1>;
+		nand-ecc-step-size = <512>;
+
+		#address-cells = <0>;
+		#size-cells = <0>;
+	};
+};
-- 
2.1.4

-- 
Simon Arlott

[PATCH (v4) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

Add device tree binding for NAND on the BCM63268.

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
---
On 22/11/15 21:59, Rob Herring wrote:
>> + * "brcm,nand-bcm63268"
>> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>
> vendor,<soc>-device is preferred.

The existing two bindings use brcm,nand-<soc>, but I've changed this one.

 .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
index 4ff7128..2644d6c 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
@@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
        and enable registers
      - reg-names: (required) "nand-int-base"
 
+   * "brcm,bcm63268-nand"
+     - compatible: should contain "brcm,bcm<soc>-nand", "brcm,bcm63268-nand"
+     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
+       and enable registers, and boot address registers
+     - reg-names: (required) "nand-intr-base"
+     - clock: (required) reference to the clock for NAND controller
+
    * "brcm,nand-iproc"
      - reg: (required) the "IDM" register range, for interrupt enable and APB
        bus access endianness configuration, and the "EXT" register range,
@@ -148,3 +155,29 @@ nand@f0442800 {
 		};
 	};
 };
+
+nand@0x10000200 {
+	compatible = "brcm,bcm63168-nand", "brcm,bcm63268-nand",
+		"brcm,brcmnand-v4.0", "brcm,brcmnand";
+	reg = <0x10000200 0x180>,
+	      <0x10000600 0x200>,
+	      <0x100000b0 0x10>;
+	reg-names = "nand", "nand-cache", "nand-intr-base";
+	interrupt-parent = <&periph_intc>;
+	interrupts = <50>;
+	clocks = <&periph_clk 20>;
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand0: nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <1>;
+		nand-ecc-step-size = <512>;
+
+		#address-cells = <0>;
+		#size-cells = <0>;
+	};
+};
-- 
2.1.4

-- 
Simon Arlott
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[PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a "device_remove" function to struct brcmnand_soc so that the clock
can be disabled when the device is removed.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
On 22/11/15 21:59, Rob Herring wrote:
>> >> + * "brcm,nand-bcm63268"
>> >> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
> >
> > vendor,<soc>-device is preferred.

The existing two bindings use brcm,nand-<soc>, but I've changed this one.

 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 174 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   3 +
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 179 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..88b32fa
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,174 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static void bcm63268_nand_remove(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+
+	clk_disable_unprepare(priv->clk);
+	clk_put(priv->clk);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = of_clk_get(dev->of_node, 0);
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret) {
+		clk_put(priv->clk);
+		return ret;
+	}
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+	soc->remove_device = bcm63268_nand_remove;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret) {
+		clk_disable_unprepare(priv->clk);
+		clk_put(priv->clk);
+	}
+
+	return ret;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,bcm63268-nand" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= brcmnand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..7b4988f 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2270,6 +2270,9 @@ int brcmnand_remove(struct platform_device *pdev)
 	list_for_each_entry(host, &ctrl->host_list, node)
 		nand_release(&host->mtd);
 
+	if (ctrl->soc && ctrl->soc->remove_device)
+		ctrl->soc->remove_device(ctrl->soc);
+
 	dev_set_drvdata(&pdev->dev, NULL);
 
 	return 0;
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..5c5dc2d 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -24,6 +24,7 @@ struct brcmnand_soc {
 	bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
 	void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
 	void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare);
+	void (*remove_device)(struct brcmnand_soc *soc);
 };
 
 static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc)
-- 
2.1.4

-- 
Simon Arlott

Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

[Jonas Gorski]

On Sun, Nov 22, 2015 at 11:17 PM, Simon Arlott <simon@fire.lp0.eu> wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
>
> Set up the device by enabling the clock, disabling and acking all
> interrupts, then handle the CTRL_READY interrupt.
>
> Add a "device_remove" function to struct brcmnand_soc so that the clock
> can be disabled when the device is removed.
>
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> ---
> On 22/11/15 21:59, Rob Herring wrote:
>>> >> + * "brcm,nand-bcm63268"
>>> >> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>> >
>> > vendor,<soc>-device is preferred.
>
> The existing two bindings use brcm,nand-<soc>, but I've changed this one.
>
>  drivers/mtd/nand/brcmnand/Makefile        |   1 +
>  drivers/mtd/nand/brcmnand/bcm63268_nand.c | 174 ++++++++++++++++++++++++++++++
>  drivers/mtd/nand/brcmnand/brcmnand.c      |   3 +
>  drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
>  4 files changed, 179 insertions(+)
>  create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c
>
> diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
> index 3b1fbfd..b83a9ae 100644
> --- a/drivers/mtd/nand/brcmnand/Makefile
> +++ b/drivers/mtd/nand/brcmnand/Makefile
> @@ -2,5 +2,6 @@
>  # more specific iproc_nand.o, for instance
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)                += iproc_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)                += bcm63138_nand.o
> +obj-$(CONFIG_MTD_NAND_BRCMNAND)                += bcm63268_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)                += brcmstb_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)                += brcmnand.o
> diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
> new file mode 100644
> index 0000000..88b32fa
> --- /dev/null
> +++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
> @@ -0,0 +1,174 @@
> +/*
> + * Copyright 2015 Simon Arlott
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Derived from bcm63138_nand.c:
> + * Copyright © 2015 Broadcom Corporation
> + *
> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
> + * Copyright 2000-2010 Broadcom Corporation
> + *
> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
> + * Copyright 2000-2010 Broadcom Corporation
> + */
> +
> +#include <linux/device.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/ioport.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include "brcmnand.h"
> +
> +struct bcm63268_nand_soc {
> +       struct brcmnand_soc soc;
> +       void __iomem *base;
> +       struct clk *clk;
> +};
> +
> +#define BCM63268_NAND_INT              0x00
> +#define  BCM63268_NAND_STATUS_SHIFT    0
> +#define  BCM63268_NAND_STATUS_MASK     (0xfff << BCM63268_NAND_STATUS_SHIFT)
> +#define  BCM63268_NAND_ENABLE_SHIFT    16
> +#define  BCM63268_NAND_ENABLE_MASK     (0xffff << BCM63268_NAND_ENABLE_SHIFT)
> +#define BCM63268_NAND_BASE_ADDR0       0x04
> +#define BCM63268_NAND_BASE_ADDR1       0x0c
> +
> +enum {
> +       BCM63268_NP_READ        = BIT(0),
> +       BCM63268_BLOCK_ERASE    = BIT(1),
> +       BCM63268_COPY_BACK      = BIT(2),
> +       BCM63268_PAGE_PGM       = BIT(3),
> +       BCM63268_CTRL_READY     = BIT(4),
> +       BCM63268_DEV_RBPIN      = BIT(5),
> +       BCM63268_ECC_ERR_UNC    = BIT(6),
> +       BCM63268_ECC_ERR_CORR   = BIT(7),
> +};
> +
> +static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
> +{
> +       struct bcm63268_nand_soc *priv =
> +                       container_of(soc, struct bcm63268_nand_soc, soc);
> +       void __iomem *mmio = priv->base + BCM63268_NAND_INT;
> +       u32 val = brcmnand_readl(mmio);
> +
> +       if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
> +               /* Ack interrupt */
> +               val &= ~BCM63268_NAND_STATUS_MASK;
> +               val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
> +               brcmnand_writel(val, mmio);
> +               return true;
> +       }
> +
> +       return false;
> +}
> +
> +static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
> +{
> +       struct bcm63268_nand_soc *priv =
> +                       container_of(soc, struct bcm63268_nand_soc, soc);
> +       void __iomem *mmio = priv->base + BCM63268_NAND_INT;
> +       u32 val = brcmnand_readl(mmio);
> +
> +       /* Don't ack any interrupts */
> +       val &= ~BCM63268_NAND_STATUS_MASK;
> +
> +       if (en)
> +               val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
> +       else
> +               val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
> +
> +       brcmnand_writel(val, mmio);
> +}
> +
> +static void bcm63268_nand_remove(struct brcmnand_soc *soc)
> +{
> +       struct bcm63268_nand_soc *priv =
> +                       container_of(soc, struct bcm63268_nand_soc, soc);
> +
> +       clk_disable_unprepare(priv->clk);
> +       clk_put(priv->clk);
> +}
> +
> +static int bcm63268_nand_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct bcm63268_nand_soc *priv;
> +       struct brcmnand_soc *soc;
> +       struct resource *res;
> +       int ret;
> +
> +       priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +       if (!priv)
> +               return -ENOMEM;
> +       soc = &priv->soc;
> +
> +       res = platform_get_resource_byname(pdev,
> +               IORESOURCE_MEM, "nand-intr-base");
> +       if (!res)
> +               return -EINVAL;
> +
> +       priv->base = devm_ioremap_resource(dev, res);
> +       if (IS_ERR(priv->base))
> +               return PTR_ERR(priv->base);
> +
> +       priv->clk = of_clk_get(dev->of_node, 0);


Why not use a named clock here? That way you can make use of
devm_clk_get and don't need to care about putting it.

> +       if (IS_ERR(priv->clk))
> +               return PTR_ERR(priv->clk);
> +
> +       ret = clk_prepare_enable(priv->clk);
> +       if (ret) {
> +               clk_put(priv->clk);
> +               return ret;
> +       }
> +
> +       soc->ctlrdy_ack = bcm63268_nand_intc_ack;
> +       soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
> +       soc->remove_device = bcm63268_nand_remove;
> +
> +       /* Disable and ack all interrupts  */
> +       brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
> +       brcmnand_writel(BCM63268_NAND_STATUS_MASK,
> +                       priv->base + BCM63268_NAND_INT);
> +
> +       ret = brcmnand_probe(pdev, soc);
> +       if (ret) {
> +               clk_disable_unprepare(priv->clk);
> +               clk_put(priv->clk);
> +       }
> +
> +       return ret;
> +}
> +
> +static const struct of_device_id bcm63268_nand_of_match[] = {
> +       { .compatible = "brcm,bcm63268-nand" },
> +       {},
> +};
> +MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
> +
> +static struct platform_driver bcm63268_nand_driver = {
> +       .probe                  = bcm63268_nand_probe,
> +       .remove                 = brcmnand_remove,
> +       .driver = {
> +               .name           = "bcm63268_nand",
> +               .pm             = &brcmnand_pm_ops,
> +               .of_match_table = bcm63268_nand_of_match,
> +       }
> +};
> +module_platform_driver(bcm63268_nand_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Simon Arlott");
> +MODULE_DESCRIPTION("NAND driver for BCM63268");
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> index 2c8f67f..7b4988f 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> @@ -2270,6 +2270,9 @@ int brcmnand_remove(struct platform_device *pdev)
>         list_for_each_entry(host, &ctrl->host_list, node)
>                 nand_release(&host->mtd);
>
> +       if (ctrl->soc && ctrl->soc->remove_device)
> +               ctrl->soc->remove_device(ctrl->soc);
> +

This is a bit weird, why don't you just use your own .remove callback
for the driver that like you did for .probe? then you won't need to
add a remove_device callback at all.

>         dev_set_drvdata(&pdev->dev, NULL);
>
>         return 0;
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
> index ef5eabb..5c5dc2d 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.h
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.h
> @@ -24,6 +24,7 @@ struct brcmnand_soc {
>         bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
>         void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
>         void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare);
> +       void (*remove_device)(struct brcmnand_soc *soc);
>  };
>
>  static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc)


Jonas

Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

On 23/11/15 15:42, Jonas Gorski wrote:
> On Sun, Nov 22, 2015 at 11:17 PM, Simon Arlott <simon@fire.lp0.eu> wrote:
>> +       priv->clk = of_clk_get(dev->of_node, 0);
> 
> 
> Why not use a named clock here? That way you can make use of
> devm_clk_get and don't need to care about putting it.

Ok.

>> +
>> +static struct platform_driver bcm63268_nand_driver = {
>> +       .probe                  = bcm63268_nand_probe,
>> +       .remove                 = brcmnand_remove,
>> +       .driver = {
>> +               .name           = "bcm63268_nand",
>> +               .pm             = &brcmnand_pm_ops,
>> +               .of_match_table = bcm63268_nand_of_match,
>> +       }
>> +};
>> +module_platform_driver(bcm63268_nand_driver);
>> +
>> +MODULE_LICENSE("GPL");
>> +MODULE_AUTHOR("Simon Arlott");
>> +MODULE_DESCRIPTION("NAND driver for BCM63268");
>> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
>> index 2c8f67f..7b4988f 100644
>> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
>> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
>> @@ -2270,6 +2270,9 @@ int brcmnand_remove(struct platform_device *pdev)
>>         list_for_each_entry(host, &ctrl->host_list, node)
>>                 nand_release(&host->mtd);
>>
>> +       if (ctrl->soc && ctrl->soc->remove_device)
>> +               ctrl->soc->remove_device(ctrl->soc);
>> +
> 
> This is a bit weird, why don't you just use your own .remove callback
> for the driver that like you did for .probe? then you won't need to
> add a remove_device callback at all.

I don't have access to the struct brcmnand_soc which is stored by
brcmnand_probe() as the containing struct is defined in brcmnand.c.

I could move that struct out to a header file and use it directly from a
bcm63268_nand_remove() function but I'd have to move a few other defines
too.

>>         dev_set_drvdata(&pdev->dev, NULL);
>>
>>         return 0;
>> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
>> index ef5eabb..5c5dc2d 100644
>> --- a/drivers/mtd/nand/brcmnand/brcmnand.h
>> +++ b/drivers/mtd/nand/brcmnand/brcmnand.h
>> @@ -24,6 +24,7 @@ struct brcmnand_soc {
>>         bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
>>         void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
>>         void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare);
>> +       void (*remove_device)(struct brcmnand_soc *soc);
>>  };
>>
>>  static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc)
> 
> 
> Jonas
> 


-- 
Simon Arlott

Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

[Florian Fainelli]

On 22/11/15 14:17, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
> 
> Set up the device by enabling the clock, disabling and acking all
> interrupts, then handle the CTRL_READY interrupt.
> 
> Add a "device_remove" function to struct brcmnand_soc so that the clock
> can be disabled when the device is removed.
> 
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> ---
> On 22/11/15 21:59, Rob Herring wrote:
>>>>> + * "brcm,nand-bcm63268"
>>>>> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>>>
>>> vendor,<soc>-device is preferred.
> 
> The existing two bindings use brcm,nand-<soc>, but I've changed this one.

Could we stick with the existing binding naming convention of using:

brcm,nand-<soc> just so automated tools or other things can match this
one too, and +1 for consistency?

Other than, that, same comment as Jonas, why do we we need the
device_remove callback to be called from the main driver down to this one?
-- 
Florian

Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

[Florian Fainelli]

On 22/11/15 14:17, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
> 
> Set up the device by enabling the clock, disabling and acking all
> interrupts, then handle the CTRL_READY interrupt.
> 
> Add a "device_remove" function to struct brcmnand_soc so that the clock
> can be disabled when the device is removed.
> 
> Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
> ---
> On 22/11/15 21:59, Rob Herring wrote:
>>>>> + * "brcm,nand-bcm63268"
>>>>> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>>>
>>> vendor,<soc>-device is preferred.
> 
> The existing two bindings use brcm,nand-<soc>, but I've changed this one.

Could we stick with the existing binding naming convention of using:

brcm,nand-<soc> just so automated tools or other things can match this
one too, and +1 for consistency?

Other than, that, same comment as Jonas, why do we we need the
device_remove callback to be called from the main driver down to this one?
-- 
Florian
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Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

On 23/11/15 18:22, Florian Fainelli wrote:
> On 22/11/15 14:17, Simon Arlott wrote:
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers. It also has a clock for the NAND controller that needs to be
>> enabled.
>> 
>> Set up the device by enabling the clock, disabling and acking all
>> interrupts, then handle the CTRL_READY interrupt.
>> 
>> Add a "device_remove" function to struct brcmnand_soc so that the clock
>> can be disabled when the device is removed.
>> 
>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>> ---
>> On 22/11/15 21:59, Rob Herring wrote:
>>>>>> + * "brcm,nand-bcm63268"
>>>>>> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>>>>
>>>> vendor,<soc>-device is preferred.
>> 
>> The existing two bindings use brcm,nand-<soc>, but I've changed this one.
> 
> Could we stick with the existing binding naming convention of using:
> 
> brcm,nand-<soc> just so automated tools or other things can match this
> one too, and +1 for consistency?

I could submit another patch renaming the existing bindings to
brcm,<soc>-nand, and add that to the drivers? Then they'd be consistent.

> Other than, that, same comment as Jonas, why do we we need the
> device_remove callback to be called from the main driver down to this one?

I'll add a "struct brcmnand_soc *brcmnand_get_socdata(struct device *)"
instead so that I can access the soc data before calling brcmnand_remove.

-- 
Simon Arlott

[PATCH (v5) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
data and disable the clock when the device is removed.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   7 ++
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 188 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..91d8e4d
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = devm_clk_get(&pdev->dev, "nand");
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret)
+		return ret;
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret)
+		clk_disable_unprepare(priv->clk);
+
+	return ret;
+}
+
+static int bcm63268_nand_remove(struct platform_device *pdev)
+{
+	struct brcmnand_soc *soc = brcmnand_get_socdata(pdev);
+	struct bcm63268_nand_soc *priv = NULL;
+	int ret;
+
+	if (soc)
+		priv = container_of(soc, struct bcm63268_nand_soc, soc);
+
+	ret = brcmnand_remove(pdev);
+	if (ret)
+		return ret;
+
+	if (priv)
+		clk_disable_unprepare(priv->clk);
+
+	return 0;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,bcm63268-nand" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= bcm63268_nand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..99ca69e 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2262,6 +2262,13 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
 }
 EXPORT_SYMBOL_GPL(brcmnand_probe);
 
+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
+
+	return ctrl ? ctrl->soc : NULL;
+}
+
 int brcmnand_remove(struct platform_device *pdev)
 {
 	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..6680419 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -65,6 +65,7 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr)
 
 int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
 int brcmnand_remove(struct platform_device *pdev);
+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev);
 
 extern const struct dev_pm_ops brcmnand_pm_ops;
 
-- 
2.1.4

-- 
Simon Arlott

[PATCH (v5) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
data and disable the clock when the device is removed.

Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
---
 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   7 ++
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 188 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..91d8e4d
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = devm_clk_get(&pdev->dev, "nand");
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret)
+		return ret;
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret)
+		clk_disable_unprepare(priv->clk);
+
+	return ret;
+}
+
+static int bcm63268_nand_remove(struct platform_device *pdev)
+{
+	struct brcmnand_soc *soc = brcmnand_get_socdata(pdev);
+	struct bcm63268_nand_soc *priv = NULL;
+	int ret;
+
+	if (soc)
+		priv = container_of(soc, struct bcm63268_nand_soc, soc);
+
+	ret = brcmnand_remove(pdev);
+	if (ret)
+		return ret;
+
+	if (priv)
+		clk_disable_unprepare(priv->clk);
+
+	return 0;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,bcm63268-nand" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= bcm63268_nand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..99ca69e 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2262,6 +2262,13 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
 }
 EXPORT_SYMBOL_GPL(brcmnand_probe);
 
+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
+
+	return ctrl ? ctrl->soc : NULL;
+}
+
 int brcmnand_remove(struct platform_device *pdev)
 {
 	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..6680419 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -65,6 +65,7 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr)
 
 int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
 int brcmnand_remove(struct platform_device *pdev);
+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev);
 
 extern const struct dev_pm_ops brcmnand_pm_ops;
 
-- 
2.1.4

-- 
Simon Arlott
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Re: [PATCH (v4) 2/2] mtd: brcmnand: Add support for the BCM63268

[Florian Fainelli]

On 24/11/15 00:12, Simon Arlott wrote:
> On 23/11/15 18:22, Florian Fainelli wrote:
>> On 22/11/15 14:17, Simon Arlott wrote:
>>> The BCM63268 has a NAND interrupt register with combined status and enable
>>> registers. It also has a clock for the NAND controller that needs to be
>>> enabled.
>>>
>>> Set up the device by enabling the clock, disabling and acking all
>>> interrupts, then handle the CTRL_READY interrupt.
>>>
>>> Add a "device_remove" function to struct brcmnand_soc so that the clock
>>> can be disabled when the device is removed.
>>>
>>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>>> ---
>>> On 22/11/15 21:59, Rob Herring wrote:
>>>>>>> + * "brcm,nand-bcm63268"
>>>>>>> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>>>>>
>>>>> vendor,<soc>-device is preferred.
>>>
>>> The existing two bindings use brcm,nand-<soc>, but I've changed this one.
>>
>> Could we stick with the existing binding naming convention of using:
>>
>> brcm,nand-<soc> just so automated tools or other things can match this
>> one too, and +1 for consistency?
> 
> I could submit another patch renaming the existing bindings to
> brcm,<soc>-nand, and add that to the drivers? Then they'd be consistent.

No, let's not create unnecessary churn because of a minor mistake. So,
yes we *should* have used brcm,<soc>-nand in the first place, but now
that there are DTSes out there using "brcm,nand-<soc>" there is not
really any point in doing this, so please update your patches so they
match the existing convention.

> 
>> Other than, that, same comment as Jonas, why do we we need the
>> device_remove callback to be called from the main driver down to this one?
> 
> I'll add a "struct brcmnand_soc *brcmnand_get_socdata(struct device *)"
> instead so that I can access the soc data before calling brcmnand_remove.
> 


-- 
Florian

[PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

Add device tree binding for NAND on the BCM63268.

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
 .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
index 4ff7128..f2a71c8 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
@@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
        and enable registers
      - reg-names: (required) "nand-int-base"

+   * "brcm,nand-bcm63268"
+     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
+     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
+       and enable registers, and boot address registers
+     - reg-names: (required) "nand-intr-base"
+     - clock: (required) reference to the clock for the NAND controller
+     - clock-names: (required) "nand"
+
    * "brcm,nand-iproc"
      - reg: (required) the "IDM" register range, for interrupt enable and APB
        bus access endianness configuration, and the "EXT" register range,
@@ -148,3 +156,30 @@ nand@f0442800 {
 		};
 	};
 };
+
+nand@10000200 {
+	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
+		"brcm,brcmnand-v4.0", "brcm,brcmnand";
+	reg = <0x10000200 0x180>,
+	      <0x10000600 0x200>,
+	      <0x100000b0 0x10>;
+	reg-names = "nand", "nand-cache", "nand-intr-base";
+	interrupt-parent = <&periph_intc>;
+	interrupts = <50>;
+	clocks = <&periph_clk 20>;
+	clock-names = "nand";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand0: nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <1>;
+		nand-ecc-step-size = <512>;
+
+		#address-cells = <0>;
+		#size-cells = <0>;
+	};
+};
-- 
2.1.4

-- 
Simon Arlott

[PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

Add device tree binding for NAND on the BCM63268.

The BCM63268 has a NAND interrupt register with combined status and enable
registers.

Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
---
 .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
index 4ff7128..f2a71c8 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
@@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
        and enable registers
      - reg-names: (required) "nand-int-base"

+   * "brcm,nand-bcm63268"
+     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
+     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
+       and enable registers, and boot address registers
+     - reg-names: (required) "nand-intr-base"
+     - clock: (required) reference to the clock for the NAND controller
+     - clock-names: (required) "nand"
+
    * "brcm,nand-iproc"
      - reg: (required) the "IDM" register range, for interrupt enable and APB
        bus access endianness configuration, and the "EXT" register range,
@@ -148,3 +156,30 @@ nand@f0442800 {
 		};
 	};
 };
+
+nand@10000200 {
+	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
+		"brcm,brcmnand-v4.0", "brcm,brcmnand";
+	reg = <0x10000200 0x180>,
+	      <0x10000600 0x200>,
+	      <0x100000b0 0x10>;
+	reg-names = "nand", "nand-cache", "nand-intr-base";
+	interrupt-parent = <&periph_intc>;
+	interrupts = <50>;
+	clocks = <&periph_clk 20>;
+	clock-names = "nand";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	nand0: nandcs@0 {
+		compatible = "brcm,nandcs";
+		reg = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <1>;
+		nand-ecc-step-size = <512>;
+
+		#address-cells = <0>;
+		#size-cells = <0>;
+	};
+};
-- 
2.1.4

-- 
Simon Arlott
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[PATCH (v6) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
data and disable the clock when the device is removed.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   7 ++
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 188 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..70ad907
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = devm_clk_get(&pdev->dev, "nand");
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret)
+		return ret;
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret)
+		clk_disable_unprepare(priv->clk);
+
+	return ret;
+}
+
+static int bcm63268_nand_remove(struct platform_device *pdev)
+{
+	struct brcmnand_soc *soc = brcmnand_get_socdata(pdev);
+	struct bcm63268_nand_soc *priv = NULL;
+	int ret;
+
+	if (soc)
+		priv = container_of(soc, struct bcm63268_nand_soc, soc);
+
+	ret = brcmnand_remove(pdev);
+	if (ret)
+		return ret;
+
+	if (priv)
+		clk_disable_unprepare(priv->clk);
+
+	return 0;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,nand-bcm63268" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= bcm63268_nand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..99ca69e 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2262,6 +2262,13 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
 }
 EXPORT_SYMBOL_GPL(brcmnand_probe);

+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
+
+	return ctrl ? ctrl->soc : NULL;
+}
+
 int brcmnand_remove(struct platform_device *pdev)
 {
 	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..6680419 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -65,6 +65,7 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr)

 int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
 int brcmnand_remove(struct platform_device *pdev);
+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev);

 extern const struct dev_pm_ops brcmnand_pm_ops;

-- 
2.1.4

-- 
Simon Arlott

Re: [PATCH (v6) 2/2] mtd: brcmnand: Add support for the BCM63268

[Jonas Gorski]

Hi,

On Tue, Nov 24, 2015 at 9:21 PM, Simon Arlott <simon@fire.lp0.eu> wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
>
> Set up the device by enabling the clock, disabling and acking all
> interrupts, then handle the CTRL_READY interrupt.
>
> Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
> data and disable the clock when the device is removed.

To me this now mostly looks good, one thing though ...

>
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> ---
>  drivers/mtd/nand/brcmnand/Makefile        |   1 +
>  drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
>  drivers/mtd/nand/brcmnand/brcmnand.c      |   7 ++
>  drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
>  4 files changed, 188 insertions(+)
>  create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c
>

(snip)

> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> index 2c8f67f..99ca69e 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> @@ -2262,6 +2262,13 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
>  }
>  EXPORT_SYMBOL_GPL(brcmnand_probe);
>
> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
> +{
> +       struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
> +
> +       return ctrl ? ctrl->soc : NULL;
> +}
> +

Don't you need to EXPORT_SYMBOL_GPL this one in case you build
brcmnand as module?


Jonas

Re: [PATCH (v6) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

On Wed, November 25, 2015 10:44, Jonas Gorski wrote:
> On Tue, Nov 24, 2015 at 9:21 PM, Simon Arlott <simon@fire.lp0.eu> wrote:
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers. It also has a clock for the NAND controller that needs to be
>> enabled.
>>
>> Set up the device by enabling the clock, disabling and acking all
>> interrupts, then handle the CTRL_READY interrupt.
>>
>> Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
>> data and disable the clock when the device is removed.
>
> To me this now mostly looks good, one thing though ...
> (snip)
>> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
>> index 2c8f67f..99ca69e 100644
>> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
>> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
>> @@ -2262,6 +2262,13 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
>>  }
>>  EXPORT_SYMBOL_GPL(brcmnand_probe);
>>
>> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
>> +{
>> +       struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
>> +
>> +       return ctrl ? ctrl->soc : NULL;
>> +}
>> +
>
> Don't you need to EXPORT_SYMBOL_GPL this one in case you build
> brcmnand as module?

No, because all of the code is built into the one object file:
obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o

They almost have to be otherwise you could load separate parts as different
modules in the wrong order.

The existing exported symbols are not required either.

-- 
Simon Arlott

Re: [PATCH (v6) 2/2] mtd: brcmnand: Add support for the BCM63268

[Jonas Gorski]

On Wed, Nov 25, 2015 at 1:37 PM, Simon Arlott <simon@fire.lp0.eu> wrote:
> On Wed, November 25, 2015 10:44, Jonas Gorski wrote:
>> On Tue, Nov 24, 2015 at 9:21 PM, Simon Arlott <simon@fire.lp0.eu> wrote:
>>> The BCM63268 has a NAND interrupt register with combined status and enable
>>> registers. It also has a clock for the NAND controller that needs to be
>>> enabled.
>>>
>>> Set up the device by enabling the clock, disabling and acking all
>>> interrupts, then handle the CTRL_READY interrupt.
>>>
>>> Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
>>> data and disable the clock when the device is removed.
>>
>> To me this now mostly looks good, one thing though ...
>> (snip)
>>> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
>>> index 2c8f67f..99ca69e 100644
>>> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
>>> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
>>> @@ -2262,6 +2262,13 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
>>>  }
>>>  EXPORT_SYMBOL_GPL(brcmnand_probe);
>>>
>>> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
>>> +{
>>> +       struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
>>> +
>>> +       return ctrl ? ctrl->soc : NULL;
>>> +}
>>> +
>>
>> Don't you need to EXPORT_SYMBOL_GPL this one in case you build
>> brcmnand as module?
>
> No, because all of the code is built into the one object file:

No it is not:

$ grep BRCMNAND .config
CONFIG_MTD_NAND_BRCMNAND=m
$ make
...
  LD      drivers/mtd/nand/brcmnand/built-in.o
  CC [M]  drivers/mtd/nand/brcmnand/iproc_nand.o
  CC [M]  drivers/mtd/nand/brcmnand/bcm63138_nand.o
  CC [M]  drivers/mtd/nand/brcmnand/brcmstb_nand.o
  CC [M]  drivers/mtd/nand/brcmnand/brcmnand.o
...
  Building modules, stage 2.
  MODPOST 6 modules
  CC      drivers/mtd/nand/brcmnand/bcm63138_nand.mod.o
  LD [M]  drivers/mtd/nand/brcmnand/bcm63138_nand.ko
  CC      drivers/mtd/nand/brcmnand/brcmnand.mod.o
  LD [M]  drivers/mtd/nand/brcmnand/brcmnand.ko
  CC      drivers/mtd/nand/brcmnand/brcmstb_nand.mod.o
  LD [M]  drivers/mtd/nand/brcmnand/brcmstb_nand.ko
  CC      drivers/mtd/nand/brcmnand/iproc_nand.mod.o
  LD [M]  drivers/mtd/nand/brcmnand/iproc_nand.ko

$

> obj-$(CONFIG_MTD_NAND_BRCMNAND)         += iproc_nand.o
> obj-$(CONFIG_MTD_NAND_BRCMNAND)         += bcm63138_nand.o
> obj-$(CONFIG_MTD_NAND_BRCMNAND)         += bcm63268_nand.o
> obj-$(CONFIG_MTD_NAND_BRCMNAND)         += brcmstb_nand.o
> obj-$(CONFIG_MTD_NAND_BRCMNAND)         += brcmnand.o

for this to be built into one it would have to look like:

obj-$(CONFIG_MTD_NAND_BRCMNAND)            += brcmnand_all.o
brcmnand_all-y         += iproc_nand.o
brcmnand_all-y         += bcm63138_nand.o
brcmnand_all-y         += bcm63268_nand.o
brcmnand_all-y         += brcmstb_nand.o
brcmnand_all-y         += brcmnand.o



Jonas

[PATCH (v7) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

The BCM63268 has a NAND interrupt register with combined status and enable
registers. It also has a clock for the NAND controller that needs to be
enabled.

Set up the device by enabling the clock, disabling and acking all
interrupts, then handle the CTRL_READY interrupt.

Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
data and disable the clock when the device is removed.

Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
Added EXPORT_SYMBOL_GPL(brcmnand_get_socdata)

(As the brcmnand module must be loaded first its compatible string will
apply to any existing devices before the soc-specific module can be
loaded.)

 drivers/mtd/nand/brcmnand/Makefile        |   1 +
 drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
 drivers/mtd/nand/brcmnand/brcmnand.c      |   8 ++
 drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
 4 files changed, 189 insertions(+)
 create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c

diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
index 3b1fbfd..b83a9ae 100644
--- a/drivers/mtd/nand/brcmnand/Makefile
+++ b/drivers/mtd/nand/brcmnand/Makefile
@@ -2,5 +2,6 @@
 # more specific iproc_nand.o, for instance
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
+obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
 obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
new file mode 100644
index 0000000..70ad907
--- /dev/null
+++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright 2015 Simon Arlott
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Derived from bcm63138_nand.c:
+ * Copyright © 2015 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
+ * Copyright 2000-2010 Broadcom Corporation
+ *
+ * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
+ * Copyright 2000-2010 Broadcom Corporation
+ */
+
+#include <linux/device.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#include "brcmnand.h"
+
+struct bcm63268_nand_soc {
+	struct brcmnand_soc soc;
+	void __iomem *base;
+	struct clk *clk;
+};
+
+#define BCM63268_NAND_INT		0x00
+#define  BCM63268_NAND_STATUS_SHIFT	0
+#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
+#define  BCM63268_NAND_ENABLE_SHIFT	16
+#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
+#define BCM63268_NAND_BASE_ADDR0	0x04
+#define BCM63268_NAND_BASE_ADDR1	0x0c
+
+enum {
+	BCM63268_NP_READ	= BIT(0),
+	BCM63268_BLOCK_ERASE	= BIT(1),
+	BCM63268_COPY_BACK	= BIT(2),
+	BCM63268_PAGE_PGM	= BIT(3),
+	BCM63268_CTRL_READY	= BIT(4),
+	BCM63268_DEV_RBPIN	= BIT(5),
+	BCM63268_ECC_ERR_UNC	= BIT(6),
+	BCM63268_ECC_ERR_CORR	= BIT(7),
+};
+
+static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
+		/* Ack interrupt */
+		val &= ~BCM63268_NAND_STATUS_MASK;
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
+		brcmnand_writel(val, mmio);
+		return true;
+	}
+
+	return false;
+}
+
+static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
+{
+	struct bcm63268_nand_soc *priv =
+			container_of(soc, struct bcm63268_nand_soc, soc);
+	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
+	u32 val = brcmnand_readl(mmio);
+
+	/* Don't ack any interrupts */
+	val &= ~BCM63268_NAND_STATUS_MASK;
+
+	if (en)
+		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
+	else
+		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
+
+	brcmnand_writel(val, mmio);
+}
+
+static int bcm63268_nand_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct bcm63268_nand_soc *priv;
+	struct brcmnand_soc *soc;
+	struct resource *res;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+	soc = &priv->soc;
+
+	res = platform_get_resource_byname(pdev,
+		IORESOURCE_MEM, "nand-intr-base");
+	if (!res)
+		return -EINVAL;
+
+	priv->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(priv->base))
+		return PTR_ERR(priv->base);
+
+	priv->clk = devm_clk_get(&pdev->dev, "nand");
+	if (IS_ERR(priv->clk))
+		return PTR_ERR(priv->clk);
+
+	ret = clk_prepare_enable(priv->clk);
+	if (ret)
+		return ret;
+
+	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
+	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
+
+	/* Disable and ack all interrupts  */
+	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
+	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
+			priv->base + BCM63268_NAND_INT);
+
+	ret = brcmnand_probe(pdev, soc);
+	if (ret)
+		clk_disable_unprepare(priv->clk);
+
+	return ret;
+}
+
+static int bcm63268_nand_remove(struct platform_device *pdev)
+{
+	struct brcmnand_soc *soc = brcmnand_get_socdata(pdev);
+	struct bcm63268_nand_soc *priv = NULL;
+	int ret;
+
+	if (soc)
+		priv = container_of(soc, struct bcm63268_nand_soc, soc);
+
+	ret = brcmnand_remove(pdev);
+	if (ret)
+		return ret;
+
+	if (priv)
+		clk_disable_unprepare(priv->clk);
+
+	return 0;
+}
+
+static const struct of_device_id bcm63268_nand_of_match[] = {
+	{ .compatible = "brcm,nand-bcm63268" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
+
+static struct platform_driver bcm63268_nand_driver = {
+	.probe			= bcm63268_nand_probe,
+	.remove			= bcm63268_nand_remove,
+	.driver = {
+		.name		= "bcm63268_nand",
+		.pm		= &brcmnand_pm_ops,
+		.of_match_table	= bcm63268_nand_of_match,
+	}
+};
+module_platform_driver(bcm63268_nand_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Simon Arlott");
+MODULE_DESCRIPTION("NAND driver for BCM63268");
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
index 2c8f67f..5f26b8a 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -2262,6 +2262,14 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
 }
 EXPORT_SYMBOL_GPL(brcmnand_probe);
 
+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
+{
+	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
+
+	return ctrl ? ctrl->soc : NULL;
+}
+EXPORT_SYMBOL_GPL(brcmnand_get_socdata);
+
 int brcmnand_remove(struct platform_device *pdev)
 {
 	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
index ef5eabb..6680419 100644
--- a/drivers/mtd/nand/brcmnand/brcmnand.h
+++ b/drivers/mtd/nand/brcmnand/brcmnand.h
@@ -65,6 +65,7 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr)
 
 int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
 int brcmnand_remove(struct platform_device *pdev);
+struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev);
 
 extern const struct dev_pm_ops brcmnand_pm_ops;
 
-- 
2.1.4

-- 
Simon Arlott

Re: [PATCH (v7) 2/2] mtd: brcmnand: Add support for the BCM63268

[Brian Norris]

+ Broadcom list + Kamal

Hi Simon,

On Wed, Nov 25, 2015 at 07:49:13PM +0000, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
> 
> Set up the device by enabling the clock, disabling and acking all
> interrupts, then handle the CTRL_READY interrupt.
> 
> Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
> data and disable the clock when the device is removed.
> 
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> ---
> Added EXPORT_SYMBOL_GPL(brcmnand_get_socdata)
> 
> (As the brcmnand module must be loaded first its compatible string will
> apply to any existing devices before the soc-specific module can be
> loaded.)

What's this comment supposed to mean? The brcmnand module will not
directly probe any devices. It doesn't register any driver structs by
itself.

(BTW given that, it probably doesn't need its MODULE_DEVICE_TABLE.)

>  drivers/mtd/nand/brcmnand/Makefile        |   1 +
>  drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
>  drivers/mtd/nand/brcmnand/brcmnand.c      |   8 ++
>  drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
>  4 files changed, 189 insertions(+)
>  create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c
> 
> diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
> index 3b1fbfd..b83a9ae 100644
> --- a/drivers/mtd/nand/brcmnand/Makefile
> +++ b/drivers/mtd/nand/brcmnand/Makefile
> @@ -2,5 +2,6 @@
>  # more specific iproc_nand.o, for instance
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
> +obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
> diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
> new file mode 100644
> index 0000000..70ad907
> --- /dev/null
> +++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
> @@ -0,0 +1,179 @@
> +/*
> + * Copyright 2015 Simon Arlott
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Derived from bcm63138_nand.c:
> + * Copyright © 2015 Broadcom Corporation
> + *
> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
> + * Copyright 2000-2010 Broadcom Corporation
> + *
> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
> + * Copyright 2000-2010 Broadcom Corporation
> + */
> +
> +#include <linux/device.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/ioport.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include "brcmnand.h"
> +
> +struct bcm63268_nand_soc {
> +	struct brcmnand_soc soc;
> +	void __iomem *base;
> +	struct clk *clk;
> +};
> +
> +#define BCM63268_NAND_INT		0x00
> +#define  BCM63268_NAND_STATUS_SHIFT	0
> +#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
> +#define  BCM63268_NAND_ENABLE_SHIFT	16
> +#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
> +#define BCM63268_NAND_BASE_ADDR0	0x04
> +#define BCM63268_NAND_BASE_ADDR1	0x0c
> +
> +enum {
> +	BCM63268_NP_READ	= BIT(0),
> +	BCM63268_BLOCK_ERASE	= BIT(1),
> +	BCM63268_COPY_BACK	= BIT(2),
> +	BCM63268_PAGE_PGM	= BIT(3),
> +	BCM63268_CTRL_READY	= BIT(4),
> +	BCM63268_DEV_RBPIN	= BIT(5),
> +	BCM63268_ECC_ERR_UNC	= BIT(6),
> +	BCM63268_ECC_ERR_CORR	= BIT(7),
> +};
> +
> +static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
> +{
> +	struct bcm63268_nand_soc *priv =
> +			container_of(soc, struct bcm63268_nand_soc, soc);
> +	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
> +	u32 val = brcmnand_readl(mmio);
> +
> +	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
> +		/* Ack interrupt */
> +		val &= ~BCM63268_NAND_STATUS_MASK;
> +		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
> +		brcmnand_writel(val, mmio);
> +		return true;
> +	}
> +
> +	return false;
> +}
> +
> +static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
> +{
> +	struct bcm63268_nand_soc *priv =
> +			container_of(soc, struct bcm63268_nand_soc, soc);
> +	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
> +	u32 val = brcmnand_readl(mmio);
> +
> +	/* Don't ack any interrupts */
> +	val &= ~BCM63268_NAND_STATUS_MASK;
> +
> +	if (en)
> +		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
> +	else
> +		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
> +
> +	brcmnand_writel(val, mmio);
> +}
> +
> +static int bcm63268_nand_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct bcm63268_nand_soc *priv;
> +	struct brcmnand_soc *soc;
> +	struct resource *res;
> +	int ret;
> +
> +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +	soc = &priv->soc;
> +
> +	res = platform_get_resource_byname(pdev,
> +		IORESOURCE_MEM, "nand-intr-base");
> +	if (!res)
> +		return -EINVAL;
> +
> +	priv->base = devm_ioremap_resource(dev, res);
> +	if (IS_ERR(priv->base))
> +		return PTR_ERR(priv->base);
> +
> +	priv->clk = devm_clk_get(&pdev->dev, "nand");
> +	if (IS_ERR(priv->clk))
> +		return PTR_ERR(priv->clk);

Perhaps we should put this clock handling in brcmnand.c? Just have it
treat the clock as optional (i.e., ignore errors except for
EPROBE_DEFER?), so we don't fail if no clock was provided? This could
help other platforms too, if they gain clock support.

If we do this, you'll want to document the clock in the common binding,
not the bcm63268-specific part.

Also, could it help to disable/enable the clock during suspend/resume?
If you move it to brcmnand.c, this would also be pretty simple.

> +
> +	ret = clk_prepare_enable(priv->clk);
> +	if (ret)
> +		return ret;
> +
> +	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
> +	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
> +
> +	/* Disable and ack all interrupts  */
> +	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
> +	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
> +			priv->base + BCM63268_NAND_INT);
> +
> +	ret = brcmnand_probe(pdev, soc);
> +	if (ret)
> +		clk_disable_unprepare(priv->clk);
> +
> +	return ret;
> +}
> +
> +static int bcm63268_nand_remove(struct platform_device *pdev)
> +{
> +	struct brcmnand_soc *soc = brcmnand_get_socdata(pdev);
> +	struct bcm63268_nand_soc *priv = NULL;
> +	int ret;
> +
> +	if (soc)
> +		priv = container_of(soc, struct bcm63268_nand_soc, soc);
> +
> +	ret = brcmnand_remove(pdev);
> +	if (ret)
> +		return ret;
> +
> +	if (priv)
> +		clk_disable_unprepare(priv->clk);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id bcm63268_nand_of_match[] = {
> +	{ .compatible = "brcm,nand-bcm63268" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
> +
> +static struct platform_driver bcm63268_nand_driver = {
> +	.probe			= bcm63268_nand_probe,
> +	.remove			= bcm63268_nand_remove,
> +	.driver = {
> +		.name		= "bcm63268_nand",
> +		.pm		= &brcmnand_pm_ops,
> +		.of_match_table	= bcm63268_nand_of_match,
> +	}
> +};
> +module_platform_driver(bcm63268_nand_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Simon Arlott");
> +MODULE_DESCRIPTION("NAND driver for BCM63268");
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> index 2c8f67f..5f26b8a 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> @@ -2262,6 +2262,14 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
>  }
>  EXPORT_SYMBOL_GPL(brcmnand_probe);
>  
> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
> +{
> +	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
> +
> +	return ctrl ? ctrl->soc : NULL;
> +}
> +EXPORT_SYMBOL_GPL(brcmnand_get_socdata);

If you move the clk handling to the core brcmnand.c, then you won't need
this still.

> +
>  int brcmnand_remove(struct platform_device *pdev)
>  {
>  	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
> index ef5eabb..6680419 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.h
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.h
> @@ -65,6 +65,7 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr)
>  
>  int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
>  int brcmnand_remove(struct platform_device *pdev);
> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev);
>  
>  extern const struct dev_pm_ops brcmnand_pm_ops;
>  

Brian

Re: [PATCH (v7) 2/2] mtd: brcmnand: Add support for the BCM63268

[Brian Norris]

+ Broadcom list + Kamal

Hi Simon,

On Wed, Nov 25, 2015 at 07:49:13PM +0000, Simon Arlott wrote:
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers. It also has a clock for the NAND controller that needs to be
> enabled.
> 
> Set up the device by enabling the clock, disabling and acking all
> interrupts, then handle the CTRL_READY interrupt.
> 
> Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
> data and disable the clock when the device is removed.
> 
> Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
> ---
> Added EXPORT_SYMBOL_GPL(brcmnand_get_socdata)
> 
> (As the brcmnand module must be loaded first its compatible string will
> apply to any existing devices before the soc-specific module can be
> loaded.)

What's this comment supposed to mean? The brcmnand module will not
directly probe any devices. It doesn't register any driver structs by
itself.

(BTW given that, it probably doesn't need its MODULE_DEVICE_TABLE.)

>  drivers/mtd/nand/brcmnand/Makefile        |   1 +
>  drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
>  drivers/mtd/nand/brcmnand/brcmnand.c      |   8 ++
>  drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
>  4 files changed, 189 insertions(+)
>  create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c
> 
> diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
> index 3b1fbfd..b83a9ae 100644
> --- a/drivers/mtd/nand/brcmnand/Makefile
> +++ b/drivers/mtd/nand/brcmnand/Makefile
> @@ -2,5 +2,6 @@
>  # more specific iproc_nand.o, for instance
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
> +obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
> diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
> new file mode 100644
> index 0000000..70ad907
> --- /dev/null
> +++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
> @@ -0,0 +1,179 @@
> +/*
> + * Copyright 2015 Simon Arlott
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Derived from bcm63138_nand.c:
> + * Copyright © 2015 Broadcom Corporation
> + *
> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
> + * Copyright 2000-2010 Broadcom Corporation
> + *
> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
> + * Copyright 2000-2010 Broadcom Corporation
> + */
> +
> +#include <linux/device.h>
> +#include <linux/clk.h>
> +#include <linux/io.h>
> +#include <linux/ioport.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include "brcmnand.h"
> +
> +struct bcm63268_nand_soc {
> +	struct brcmnand_soc soc;
> +	void __iomem *base;
> +	struct clk *clk;
> +};
> +
> +#define BCM63268_NAND_INT		0x00
> +#define  BCM63268_NAND_STATUS_SHIFT	0
> +#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
> +#define  BCM63268_NAND_ENABLE_SHIFT	16
> +#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
> +#define BCM63268_NAND_BASE_ADDR0	0x04
> +#define BCM63268_NAND_BASE_ADDR1	0x0c
> +
> +enum {
> +	BCM63268_NP_READ	= BIT(0),
> +	BCM63268_BLOCK_ERASE	= BIT(1),
> +	BCM63268_COPY_BACK	= BIT(2),
> +	BCM63268_PAGE_PGM	= BIT(3),
> +	BCM63268_CTRL_READY	= BIT(4),
> +	BCM63268_DEV_RBPIN	= BIT(5),
> +	BCM63268_ECC_ERR_UNC	= BIT(6),
> +	BCM63268_ECC_ERR_CORR	= BIT(7),
> +};
> +
> +static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
> +{
> +	struct bcm63268_nand_soc *priv =
> +			container_of(soc, struct bcm63268_nand_soc, soc);
> +	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
> +	u32 val = brcmnand_readl(mmio);
> +
> +	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
> +		/* Ack interrupt */
> +		val &= ~BCM63268_NAND_STATUS_MASK;
> +		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
> +		brcmnand_writel(val, mmio);
> +		return true;
> +	}
> +
> +	return false;
> +}
> +
> +static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
> +{
> +	struct bcm63268_nand_soc *priv =
> +			container_of(soc, struct bcm63268_nand_soc, soc);
> +	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
> +	u32 val = brcmnand_readl(mmio);
> +
> +	/* Don't ack any interrupts */
> +	val &= ~BCM63268_NAND_STATUS_MASK;
> +
> +	if (en)
> +		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
> +	else
> +		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
> +
> +	brcmnand_writel(val, mmio);
> +}
> +
> +static int bcm63268_nand_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct bcm63268_nand_soc *priv;
> +	struct brcmnand_soc *soc;
> +	struct resource *res;
> +	int ret;
> +
> +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +	soc = &priv->soc;
> +
> +	res = platform_get_resource_byname(pdev,
> +		IORESOURCE_MEM, "nand-intr-base");
> +	if (!res)
> +		return -EINVAL;
> +
> +	priv->base = devm_ioremap_resource(dev, res);
> +	if (IS_ERR(priv->base))
> +		return PTR_ERR(priv->base);
> +
> +	priv->clk = devm_clk_get(&pdev->dev, "nand");
> +	if (IS_ERR(priv->clk))
> +		return PTR_ERR(priv->clk);

Perhaps we should put this clock handling in brcmnand.c? Just have it
treat the clock as optional (i.e., ignore errors except for
EPROBE_DEFER?), so we don't fail if no clock was provided? This could
help other platforms too, if they gain clock support.

If we do this, you'll want to document the clock in the common binding,
not the bcm63268-specific part.

Also, could it help to disable/enable the clock during suspend/resume?
If you move it to brcmnand.c, this would also be pretty simple.

> +
> +	ret = clk_prepare_enable(priv->clk);
> +	if (ret)
> +		return ret;
> +
> +	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
> +	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
> +
> +	/* Disable and ack all interrupts  */
> +	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
> +	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
> +			priv->base + BCM63268_NAND_INT);
> +
> +	ret = brcmnand_probe(pdev, soc);
> +	if (ret)
> +		clk_disable_unprepare(priv->clk);
> +
> +	return ret;
> +}
> +
> +static int bcm63268_nand_remove(struct platform_device *pdev)
> +{
> +	struct brcmnand_soc *soc = brcmnand_get_socdata(pdev);
> +	struct bcm63268_nand_soc *priv = NULL;
> +	int ret;
> +
> +	if (soc)
> +		priv = container_of(soc, struct bcm63268_nand_soc, soc);
> +
> +	ret = brcmnand_remove(pdev);
> +	if (ret)
> +		return ret;
> +
> +	if (priv)
> +		clk_disable_unprepare(priv->clk);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id bcm63268_nand_of_match[] = {
> +	{ .compatible = "brcm,nand-bcm63268" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
> +
> +static struct platform_driver bcm63268_nand_driver = {
> +	.probe			= bcm63268_nand_probe,
> +	.remove			= bcm63268_nand_remove,
> +	.driver = {
> +		.name		= "bcm63268_nand",
> +		.pm		= &brcmnand_pm_ops,
> +		.of_match_table	= bcm63268_nand_of_match,
> +	}
> +};
> +module_platform_driver(bcm63268_nand_driver);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR("Simon Arlott");
> +MODULE_DESCRIPTION("NAND driver for BCM63268");
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> index 2c8f67f..5f26b8a 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> @@ -2262,6 +2262,14 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
>  }
>  EXPORT_SYMBOL_GPL(brcmnand_probe);
>  
> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
> +{
> +	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
> +
> +	return ctrl ? ctrl->soc : NULL;
> +}
> +EXPORT_SYMBOL_GPL(brcmnand_get_socdata);

If you move the clk handling to the core brcmnand.c, then you won't need
this still.

> +
>  int brcmnand_remove(struct platform_device *pdev)
>  {
>  	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
> index ef5eabb..6680419 100644
> --- a/drivers/mtd/nand/brcmnand/brcmnand.h
> +++ b/drivers/mtd/nand/brcmnand/brcmnand.h
> @@ -65,6 +65,7 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr)
>  
>  int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
>  int brcmnand_remove(struct platform_device *pdev);
> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev);
>  
>  extern const struct dev_pm_ops brcmnand_pm_ops;
>  

Brian
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Re: [PATCH (v7) 2/2] mtd: brcmnand: Add support for the BCM63268

[Simon Arlott]

On 02/12/15 19:18, Brian Norris wrote:
> + Broadcom list + Kamal
> 
> Hi Simon,
> 
> On Wed, Nov 25, 2015 at 07:49:13PM +0000, Simon Arlott wrote:
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers. It also has a clock for the NAND controller that needs to be
>> enabled.
>> 
>> Set up the device by enabling the clock, disabling and acking all
>> interrupts, then handle the CTRL_READY interrupt.
>> 
>> Add a brcmnand_get_socdata() function so that bcm63268_nand can obtain its
>> data and disable the clock when the device is removed.
>> 
>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>> ---
>> Added EXPORT_SYMBOL_GPL(brcmnand_get_socdata)
>> 
>> (As the brcmnand module must be loaded first its compatible string will
>> apply to any existing devices before the soc-specific module can be
>> loaded.)
> 
> What's this comment supposed to mean? The brcmnand module will not
> directly probe any devices. It doesn't register any driver structs by
> itself.

I didn't notice that it didn't actually probe devices. In that case the
documentation should not require "brcm,brcmnand" for soc-specific
variants because the hardware's not really compatible with it.

> (BTW given that, it probably doesn't need its MODULE_DEVICE_TABLE.)
> 
>>  drivers/mtd/nand/brcmnand/Makefile        |   1 +
>>  drivers/mtd/nand/brcmnand/bcm63268_nand.c | 179 ++++++++++++++++++++++++++++++
>>  drivers/mtd/nand/brcmnand/brcmnand.c      |   8 ++
>>  drivers/mtd/nand/brcmnand/brcmnand.h      |   1 +
>>  4 files changed, 189 insertions(+)
>>  create mode 100644 drivers/mtd/nand/brcmnand/bcm63268_nand.c
>> 
>> diff --git a/drivers/mtd/nand/brcmnand/Makefile b/drivers/mtd/nand/brcmnand/Makefile
>> index 3b1fbfd..b83a9ae 100644
>> --- a/drivers/mtd/nand/brcmnand/Makefile
>> +++ b/drivers/mtd/nand/brcmnand/Makefile
>> @@ -2,5 +2,6 @@
>>  # more specific iproc_nand.o, for instance
>>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= iproc_nand.o
>>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63138_nand.o
>> +obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= bcm63268_nand.o
>>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmstb_nand.o
>>  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand.o
>> diff --git a/drivers/mtd/nand/brcmnand/bcm63268_nand.c b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
>> new file mode 100644
>> index 0000000..70ad907
>> --- /dev/null
>> +++ b/drivers/mtd/nand/brcmnand/bcm63268_nand.c
>> @@ -0,0 +1,179 @@
>> +/*
>> + * Copyright 2015 Simon Arlott
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * Derived from bcm63138_nand.c:
>> + * Copyright © 2015 Broadcom Corporation
>> + *
>> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
>> + * Copyright 2000-2010 Broadcom Corporation
>> + *
>> + * Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
>> + * Copyright 2000-2010 Broadcom Corporation
>> + */
>> +
>> +#include <linux/device.h>
>> +#include <linux/clk.h>
>> +#include <linux/io.h>
>> +#include <linux/ioport.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/of_address.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/slab.h>
>> +
>> +#include "brcmnand.h"
>> +
>> +struct bcm63268_nand_soc {
>> +	struct brcmnand_soc soc;
>> +	void __iomem *base;
>> +	struct clk *clk;
>> +};
>> +
>> +#define BCM63268_NAND_INT		0x00
>> +#define  BCM63268_NAND_STATUS_SHIFT	0
>> +#define  BCM63268_NAND_STATUS_MASK	(0xfff << BCM63268_NAND_STATUS_SHIFT)
>> +#define  BCM63268_NAND_ENABLE_SHIFT	16
>> +#define  BCM63268_NAND_ENABLE_MASK	(0xffff << BCM63268_NAND_ENABLE_SHIFT)
>> +#define BCM63268_NAND_BASE_ADDR0	0x04
>> +#define BCM63268_NAND_BASE_ADDR1	0x0c
>> +
>> +enum {
>> +	BCM63268_NP_READ	= BIT(0),
>> +	BCM63268_BLOCK_ERASE	= BIT(1),
>> +	BCM63268_COPY_BACK	= BIT(2),
>> +	BCM63268_PAGE_PGM	= BIT(3),
>> +	BCM63268_CTRL_READY	= BIT(4),
>> +	BCM63268_DEV_RBPIN	= BIT(5),
>> +	BCM63268_ECC_ERR_UNC	= BIT(6),
>> +	BCM63268_ECC_ERR_CORR	= BIT(7),
>> +};
>> +
>> +static bool bcm63268_nand_intc_ack(struct brcmnand_soc *soc)
>> +{
>> +	struct bcm63268_nand_soc *priv =
>> +			container_of(soc, struct bcm63268_nand_soc, soc);
>> +	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
>> +	u32 val = brcmnand_readl(mmio);
>> +
>> +	if (val & (BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT)) {
>> +		/* Ack interrupt */
>> +		val &= ~BCM63268_NAND_STATUS_MASK;
>> +		val |= BCM63268_CTRL_READY << BCM63268_NAND_STATUS_SHIFT;
>> +		brcmnand_writel(val, mmio);
>> +		return true;
>> +	}
>> +
>> +	return false;
>> +}
>> +
>> +static void bcm63268_nand_intc_set(struct brcmnand_soc *soc, bool en)
>> +{
>> +	struct bcm63268_nand_soc *priv =
>> +			container_of(soc, struct bcm63268_nand_soc, soc);
>> +	void __iomem *mmio = priv->base + BCM63268_NAND_INT;
>> +	u32 val = brcmnand_readl(mmio);
>> +
>> +	/* Don't ack any interrupts */
>> +	val &= ~BCM63268_NAND_STATUS_MASK;
>> +
>> +	if (en)
>> +		val |= BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT;
>> +	else
>> +		val &= ~(BCM63268_CTRL_READY << BCM63268_NAND_ENABLE_SHIFT);
>> +
>> +	brcmnand_writel(val, mmio);
>> +}
>> +
>> +static int bcm63268_nand_probe(struct platform_device *pdev)
>> +{
>> +	struct device *dev = &pdev->dev;
>> +	struct bcm63268_nand_soc *priv;
>> +	struct brcmnand_soc *soc;
>> +	struct resource *res;
>> +	int ret;
>> +
>> +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
>> +	if (!priv)
>> +		return -ENOMEM;
>> +	soc = &priv->soc;
>> +
>> +	res = platform_get_resource_byname(pdev,
>> +		IORESOURCE_MEM, "nand-intr-base");
>> +	if (!res)
>> +		return -EINVAL;
>> +
>> +	priv->base = devm_ioremap_resource(dev, res);
>> +	if (IS_ERR(priv->base))
>> +		return PTR_ERR(priv->base);
>> +
>> +	priv->clk = devm_clk_get(&pdev->dev, "nand");
>> +	if (IS_ERR(priv->clk))
>> +		return PTR_ERR(priv->clk);
> 
> Perhaps we should put this clock handling in brcmnand.c? Just have it
> treat the clock as optional (i.e., ignore errors except for
> EPROBE_DEFER?), so we don't fail if no clock was provided? This could
> help other platforms too, if they gain clock support.

Unless most soc variants have clocks I'd prefer to leave it in this
module.

> If we do this, you'll want to document the clock in the common binding,
> not the bcm63268-specific part.
> 
> Also, could it help to disable/enable the clock during suspend/resume?
> If you move it to brcmnand.c, this would also be pretty simple.

Alternatively, it could proxy the brcmnand_pm_ops functions. I don't
have any way to test suspend/resume.

>> +
>> +	ret = clk_prepare_enable(priv->clk);
>> +	if (ret)
>> +		return ret;
>> +
>> +	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
>> +	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
>> +
>> +	/* Disable and ack all interrupts  */
>> +	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
>> +	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
>> +			priv->base + BCM63268_NAND_INT);
>> +
>> +	ret = brcmnand_probe(pdev, soc);
>> +	if (ret)
>> +		clk_disable_unprepare(priv->clk);
>> +
>> +	return ret;
>> +}
>> +
>> +static int bcm63268_nand_remove(struct platform_device *pdev)
>> +{
>> +	struct brcmnand_soc *soc = brcmnand_get_socdata(pdev);
>> +	struct bcm63268_nand_soc *priv = NULL;
>> +	int ret;
>> +
>> +	if (soc)
>> +		priv = container_of(soc, struct bcm63268_nand_soc, soc);
>> +
>> +	ret = brcmnand_remove(pdev);
>> +	if (ret)
>> +		return ret;
>> +
>> +	if (priv)
>> +		clk_disable_unprepare(priv->clk);
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct of_device_id bcm63268_nand_of_match[] = {
>> +	{ .compatible = "brcm,nand-bcm63268" },
>> +	{},
>> +};
>> +MODULE_DEVICE_TABLE(of, bcm63268_nand_of_match);
>> +
>> +static struct platform_driver bcm63268_nand_driver = {
>> +	.probe			= bcm63268_nand_probe,
>> +	.remove			= bcm63268_nand_remove,
>> +	.driver = {
>> +		.name		= "bcm63268_nand",
>> +		.pm		= &brcmnand_pm_ops,
>> +		.of_match_table	= bcm63268_nand_of_match,
>> +	}
>> +};
>> +module_platform_driver(bcm63268_nand_driver);
>> +
>> +MODULE_LICENSE("GPL");
>> +MODULE_AUTHOR("Simon Arlott");
>> +MODULE_DESCRIPTION("NAND driver for BCM63268");
>> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
>> index 2c8f67f..5f26b8a 100644
>> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
>> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
>> @@ -2262,6 +2262,14 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
>>  }
>>  EXPORT_SYMBOL_GPL(brcmnand_probe);
>>  
>> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
>> +{
>> +	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
>> +
>> +	return ctrl ? ctrl->soc : NULL;
>> +}
>> +EXPORT_SYMBOL_GPL(brcmnand_get_socdata);
> 
> If you move the clk handling to the core brcmnand.c, then you won't need
> this still.

Would you prefer a clock name in the soc data structure that is used to
call devm_clk_get()?

>> +
>>  int brcmnand_remove(struct platform_device *pdev)
>>  {
>>  	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
>> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.h b/drivers/mtd/nand/brcmnand/brcmnand.h
>> index ef5eabb..6680419 100644
>> --- a/drivers/mtd/nand/brcmnand/brcmnand.h
>> +++ b/drivers/mtd/nand/brcmnand/brcmnand.h
>> @@ -65,6 +65,7 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr)
>>  
>>  int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
>>  int brcmnand_remove(struct platform_device *pdev);
>> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev);
>>  
>>  extern const struct dev_pm_ops brcmnand_pm_ops;
>>  
> 
> Brian
> 


-- 
Simon Arlott

Re: [PATCH (v7) 2/2] mtd: brcmnand: Add support for the BCM63268

[Brian Norris]

Hi,

On Wed, Dec 02, 2015 at 07:54:49PM +0000, Simon Arlott wrote:
> On 02/12/15 19:18, Brian Norris wrote:
> > On Wed, Nov 25, 2015 at 07:49:13PM +0000, Simon Arlott wrote:
> >> +static int bcm63268_nand_probe(struct platform_device *pdev)
> >> +{
> >> +	struct device *dev = &pdev->dev;
> >> +	struct bcm63268_nand_soc *priv;
> >> +	struct brcmnand_soc *soc;
> >> +	struct resource *res;
> >> +	int ret;
> >> +
> >> +	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
> >> +	if (!priv)
> >> +		return -ENOMEM;
> >> +	soc = &priv->soc;
> >> +
> >> +	res = platform_get_resource_byname(pdev,
> >> +		IORESOURCE_MEM, "nand-intr-base");
> >> +	if (!res)
> >> +		return -EINVAL;
> >> +
> >> +	priv->base = devm_ioremap_resource(dev, res);
> >> +	if (IS_ERR(priv->base))
> >> +		return PTR_ERR(priv->base);
> >> +
> >> +	priv->clk = devm_clk_get(&pdev->dev, "nand");
> >> +	if (IS_ERR(priv->clk))
> >> +		return PTR_ERR(priv->clk);
> > 
> > Perhaps we should put this clock handling in brcmnand.c? Just have it
> > treat the clock as optional (i.e., ignore errors except for
> > EPROBE_DEFER?), so we don't fail if no clock was provided? This could
> > help other platforms too, if they gain clock support.
> 
> Unless most soc variants have clocks I'd prefer to leave it in this
> module.

I'm quite confident your SoC is not the only one with clocks.

> > If we do this, you'll want to document the clock in the common binding,
> > not the bcm63268-specific part.
> > 
> > Also, could it help to disable/enable the clock during suspend/resume?
> > If you move it to brcmnand.c, this would also be pretty simple.
> 
> Alternatively, it could proxy the brcmnand_pm_ops functions. I don't
> have any way to test suspend/resume.

OK, no need to add it now then. It can be added if/when it's needed.

> >> +
> >> +	ret = clk_prepare_enable(priv->clk);
> >> +	if (ret)
> >> +		return ret;
> >> +
> >> +	soc->ctlrdy_ack = bcm63268_nand_intc_ack;
> >> +	soc->ctlrdy_set_enabled = bcm63268_nand_intc_set;
> >> +
> >> +	/* Disable and ack all interrupts  */
> >> +	brcmnand_writel(0, priv->base + BCM63268_NAND_INT);
> >> +	brcmnand_writel(BCM63268_NAND_STATUS_MASK,
> >> +			priv->base + BCM63268_NAND_INT);
> >> +
> >> +	ret = brcmnand_probe(pdev, soc);
> >> +	if (ret)
> >> +		clk_disable_unprepare(priv->clk);
> >> +
> >> +	return ret;
> >> +}

> >> diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
> >> index 2c8f67f..5f26b8a 100644
> >> --- a/drivers/mtd/nand/brcmnand/brcmnand.c
> >> +++ b/drivers/mtd/nand/brcmnand/brcmnand.c
> >> @@ -2262,6 +2262,14 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc)
> >>  }
> >>  EXPORT_SYMBOL_GPL(brcmnand_probe);
> >>  
> >> +struct brcmnand_soc *brcmnand_get_socdata(struct platform_device *pdev)
> >> +{
> >> +	struct brcmnand_controller *ctrl = dev_get_drvdata(&pdev->dev);
> >> +
> >> +	return ctrl ? ctrl->soc : NULL;
> >> +}
> >> +EXPORT_SYMBOL_GPL(brcmnand_get_socdata);
> > 
> > If you move the clk handling to the core brcmnand.c, then you won't need
> > this still.
> 
> Would you prefer a clock name in the soc data structure that is used to
> call devm_clk_get()?

Not really. If we specify a clock name now, we can suggest other SoC's
to use the same name (where possible). So we wouldn't need any new code
or documentation, and we definitely don't need each snowflake sub-driver
to pass a new name.

Brian

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Rob Herring]

On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
> 
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
> 
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>

Acked-by: Rob Herring <robh@kernel.org>

> ---
>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> index 4ff7128..f2a71c8 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>         and enable registers
>       - reg-names: (required) "nand-int-base"
> 
> +   * "brcm,nand-bcm63268"
> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
> +     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
> +       and enable registers, and boot address registers
> +     - reg-names: (required) "nand-intr-base"
> +     - clock: (required) reference to the clock for the NAND controller
> +     - clock-names: (required) "nand"
> +
>     * "brcm,nand-iproc"
>       - reg: (required) the "IDM" register range, for interrupt enable and APB
>         bus access endianness configuration, and the "EXT" register range,
> @@ -148,3 +156,30 @@ nand@f0442800 {
>  		};
>  	};
>  };
> +
> +nand@10000200 {
> +	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
> +		"brcm,brcmnand-v4.0", "brcm,brcmnand";
> +	reg = <0x10000200 0x180>,
> +	      <0x10000600 0x200>,
> +	      <0x100000b0 0x10>;
> +	reg-names = "nand", "nand-cache", "nand-intr-base";
> +	interrupt-parent = <&periph_intc>;
> +	interrupts = <50>;
> +	clocks = <&periph_clk 20>;
> +	clock-names = "nand";
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	nand0: nandcs@0 {
> +		compatible = "brcm,nandcs";
> +		reg = <0>;
> +		nand-on-flash-bbt;
> +		nand-ecc-strength = <1>;
> +		nand-ecc-step-size = <512>;
> +
> +		#address-cells = <0>;
> +		#size-cells = <0>;
> +	};
> +};
> -- 
> 2.1.4
> 
> -- 
> Simon Arlott

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Brian Norris]

+ Broadcom list + Kamal

On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
> 
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
> 
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> ---
>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> index 4ff7128..f2a71c8 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>         and enable registers
>       - reg-names: (required) "nand-int-base"
> 
> +   * "brcm,nand-bcm63268"
> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"

Looks like you're aiming to support bcm63168? Is bcm63268 the first
chip to include this style of register then? The numbering seems
backwards, but that may just be reality.

> +     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
> +       and enable registers, and boot address registers
> +     - reg-names: (required) "nand-intr-base"
> +     - clock: (required) reference to the clock for the NAND controller
> +     - clock-names: (required) "nand"
> +
>     * "brcm,nand-iproc"
>       - reg: (required) the "IDM" register range, for interrupt enable and APB
>         bus access endianness configuration, and the "EXT" register range,
> @@ -148,3 +156,30 @@ nand@f0442800 {
>  		};
>  	};
>  };
> +
> +nand@10000200 {
> +	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
> +		"brcm,brcmnand-v4.0", "brcm,brcmnand";
> +	reg = <0x10000200 0x180>,
> +	      <0x10000600 0x200>,
> +	      <0x100000b0 0x10>;
> +	reg-names = "nand", "nand-cache", "nand-intr-base";
> +	interrupt-parent = <&periph_intc>;
> +	interrupts = <50>;
> +	clocks = <&periph_clk 20>;
> +	clock-names = "nand";
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	nand0: nandcs@0 {
> +		compatible = "brcm,nandcs";
> +		reg = <0>;
> +		nand-on-flash-bbt;
> +		nand-ecc-strength = <1>;
> +		nand-ecc-step-size = <512>;
> +
> +		#address-cells = <0>;
> +		#size-cells = <0>;

What are these {address,size}-cells for? If you need them for
partitioning, then those are wrong -- they shouldn't be zero. Maybe just
drop them? (I can cut them out when applying, if that's the only change
to make.)

> +	};
> +};

Brian

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Brian Norris]

+ Broadcom list + Kamal

On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
> 
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
> 
> Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
> ---
>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> index 4ff7128..f2a71c8 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>         and enable registers
>       - reg-names: (required) "nand-int-base"
> 
> +   * "brcm,nand-bcm63268"
> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"

Looks like you're aiming to support bcm63168? Is bcm63268 the first
chip to include this style of register then? The numbering seems
backwards, but that may just be reality.

> +     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
> +       and enable registers, and boot address registers
> +     - reg-names: (required) "nand-intr-base"
> +     - clock: (required) reference to the clock for the NAND controller
> +     - clock-names: (required) "nand"
> +
>     * "brcm,nand-iproc"
>       - reg: (required) the "IDM" register range, for interrupt enable and APB
>         bus access endianness configuration, and the "EXT" register range,
> @@ -148,3 +156,30 @@ nand@f0442800 {
>  		};
>  	};
>  };
> +
> +nand@10000200 {
> +	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
> +		"brcm,brcmnand-v4.0", "brcm,brcmnand";
> +	reg = <0x10000200 0x180>,
> +	      <0x10000600 0x200>,
> +	      <0x100000b0 0x10>;
> +	reg-names = "nand", "nand-cache", "nand-intr-base";
> +	interrupt-parent = <&periph_intc>;
> +	interrupts = <50>;
> +	clocks = <&periph_clk 20>;
> +	clock-names = "nand";
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	nand0: nandcs@0 {
> +		compatible = "brcm,nandcs";
> +		reg = <0>;
> +		nand-on-flash-bbt;
> +		nand-ecc-strength = <1>;
> +		nand-ecc-step-size = <512>;
> +
> +		#address-cells = <0>;
> +		#size-cells = <0>;

What are these {address,size}-cells for? If you need them for
partitioning, then those are wrong -- they shouldn't be zero. Maybe just
drop them? (I can cut them out when applying, if that's the only change
to make.)

> +	};
> +};

Brian
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Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Jonas Gorski]

On Wed, Dec 2, 2015 at 8:05 PM, Brian Norris
<computersforpeace@gmail.com> wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>> ---
>>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>>  1 file changed, 35 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> index 4ff7128..f2a71c8 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>>         and enable registers
>>       - reg-names: (required) "nand-int-base"
>>
>> +   * "brcm,nand-bcm63268"
>> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>
> Looks like you're aiming to support bcm63168? Is bcm63268 the first
> chip to include this style of register then? The numbering seems
> backwards, but that may just be reality.

There are four chip variants, bcm63168, bcm63268, bcm63169 and
bcm63269, and they were all introduced at the same time. the *16x have
less features than *26x (IIRC only two rgmii ports instead of four, no
hw crypto, maybe no dect?), and the *9 ones have no xDSL support.

>From a registers location/layout, clocks, etc standpoint, there is no
difference between bcm63168 and bcm63268 (and the x9's).

As a reference, Broadcom uses bcm63268 as the "generic" name for the
chip family in their code, but on their website only advertise the
bcm63168. Both chips do exist though, and at least the bcm63169, I
have devices with these three here.


Jonas

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Jonas Gorski]

On Wed, Dec 2, 2015 at 8:05 PM, Brian Norris
<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>> Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
>> ---
>>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>>  1 file changed, 35 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> index 4ff7128..f2a71c8 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>>         and enable registers
>>       - reg-names: (required) "nand-int-base"
>>
>> +   * "brcm,nand-bcm63268"
>> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>
> Looks like you're aiming to support bcm63168? Is bcm63268 the first
> chip to include this style of register then? The numbering seems
> backwards, but that may just be reality.

There are four chip variants, bcm63168, bcm63268, bcm63169 and
bcm63269, and they were all introduced at the same time. the *16x have
less features than *26x (IIRC only two rgmii ports instead of four, no
hw crypto, maybe no dect?), and the *9 ones have no xDSL support.

>From a registers location/layout, clocks, etc standpoint, there is no
difference between bcm63168 and bcm63268 (and the x9's).

As a reference, Broadcom uses bcm63268 as the "generic" name for the
chip family in their code, but on their website only advertise the
bcm63168. Both chips do exist though, and at least the bcm63169, I
have devices with these three here.


Jonas
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Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Florian Fainelli]

2015-12-02 11:05 GMT-08:00 Brian Norris <computersforpeace@gmail.com>:
> + Broadcom list + Kamal
>
> On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>>
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>>
>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>> ---
>>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>>  1 file changed, 35 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> index 4ff7128..f2a71c8 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>>         and enable registers
>>       - reg-names: (required) "nand-int-base"
>>
>> +   * "brcm,nand-bcm63268"
>> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>
> Looks like you're aiming to support bcm63168? Is bcm63268 the first
> chip to include this style of register then? The numbering seems
> backwards, but that may just be reality.

6362 (NAND rev 2.1, ann. Sep 8, 2009), 6368 (v0.1?!?, ann. Jan 7,
2009) and 6328 (v2.1, can't find release date) are earlier chips that
have an identical combined interrupt enable + status register and a
NAND controller within the same 32-bits word, so these would qualify
as a better compatible string for this specific addition integration
stub here. I would gowith 6368 here then?
-- 
Florian

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

On 02/12/15 19:38, Florian Fainelli wrote:
> 2015-12-02 11:05 GMT-08:00 Brian Norris <computersforpeace@gmail.com>:
>> + Broadcom list + Kamal
>>
>> On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
>>> Add device tree binding for NAND on the BCM63268.
>>>
>>> The BCM63268 has a NAND interrupt register with combined status and enable
>>> registers.
>>>
>>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>>> ---
>>>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>>>  1 file changed, 35 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>> index 4ff7128..f2a71c8 100644
>>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>>>         and enable registers
>>>       - reg-names: (required) "nand-int-base"
>>>
>>> +   * "brcm,nand-bcm63268"
>>> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>>
>> Looks like you're aiming to support bcm63168? Is bcm63268 the first
>> chip to include this style of register then? The numbering seems
>> backwards, but that may just be reality.
> 
> 6362 (NAND rev 2.1, ann. Sep 8, 2009), 6368 (v0.1?!?, ann. Jan 7,
> 2009) and 6328 (v2.1, can't find release date) are earlier chips that
> have an identical combined interrupt enable + status register and a
> NAND controller within the same 32-bits word, so these would qualify
> as a better compatible string for this specific addition integration
> stub here. I would gowith 6368 here then?
> 

I could change it to 6368 but there's no documented NAND_INTR_BASE for
it. Only the 63268 and 6818 have a #define for NAND_INTR_BASE.

-- 
Simon Arlott

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Florian Fainelli]

On 02/12/15 12:02, Simon Arlott wrote:
> On 02/12/15 19:38, Florian Fainelli wrote:
>> 2015-12-02 11:05 GMT-08:00 Brian Norris <computersforpeace@gmail.com>:
>>> + Broadcom list + Kamal
>>>
>>> On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
>>>> Add device tree binding for NAND on the BCM63268.
>>>>
>>>> The BCM63268 has a NAND interrupt register with combined status and enable
>>>> registers.
>>>>
>>>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>>>> ---
>>>>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>>>>  1 file changed, 35 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> index 4ff7128..f2a71c8 100644
>>>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>>>>         and enable registers
>>>>       - reg-names: (required) "nand-int-base"
>>>>
>>>> +   * "brcm,nand-bcm63268"
>>>> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>>>
>>> Looks like you're aiming to support bcm63168? Is bcm63268 the first
>>> chip to include this style of register then? The numbering seems
>>> backwards, but that may just be reality.
>>
>> 6362 (NAND rev 2.1, ann. Sep 8, 2009), 6368 (v0.1?!?, ann. Jan 7,
>> 2009) and 6328 (v2.1, can't find release date) are earlier chips that
>> have an identical combined interrupt enable + status register and a
>> NAND controller within the same 32-bits word, so these would qualify
>> as a better compatible string for this specific addition integration
>> stub here. I would gowith 6368 here then?
>>
> 
> I could change it to 6368 but there's no documented NAND_INTR_BASE for
> it. Only the 63268 and 6818 have a #define for NAND_INTR_BASE.
> 

It looks exactly the same as the 63268 layout, and double checking, this
appears to be a v2.1 controller as well, it was not just properly
documented as such.
-- 
Florian

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Florian Fainelli]

On 02/12/15 12:02, Simon Arlott wrote:
> On 02/12/15 19:38, Florian Fainelli wrote:
>> 2015-12-02 11:05 GMT-08:00 Brian Norris <computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>:
>>> + Broadcom list + Kamal
>>>
>>> On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
>>>> Add device tree binding for NAND on the BCM63268.
>>>>
>>>> The BCM63268 has a NAND interrupt register with combined status and enable
>>>> registers.
>>>>
>>>> Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>
>>>> ---
>>>>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>>>>  1 file changed, 35 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> index 4ff7128..f2a71c8 100644
>>>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>>>> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>>>>         and enable registers
>>>>       - reg-names: (required) "nand-int-base"
>>>>
>>>> +   * "brcm,nand-bcm63268"
>>>> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
>>>
>>> Looks like you're aiming to support bcm63168? Is bcm63268 the first
>>> chip to include this style of register then? The numbering seems
>>> backwards, but that may just be reality.
>>
>> 6362 (NAND rev 2.1, ann. Sep 8, 2009), 6368 (v0.1?!?, ann. Jan 7,
>> 2009) and 6328 (v2.1, can't find release date) are earlier chips that
>> have an identical combined interrupt enable + status register and a
>> NAND controller within the same 32-bits word, so these would qualify
>> as a better compatible string for this specific addition integration
>> stub here. I would gowith 6368 here then?
>>
> 
> I could change it to 6368 but there's no documented NAND_INTR_BASE for
> it. Only the 63268 and 6818 have a #define for NAND_INTR_BASE.
> 

It looks exactly the same as the 63268 layout, and double checking, this
appears to be a v2.1 controller as well, it was not just properly
documented as such.
-- 
Florian
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Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

On 02/12/15 19:05, Brian Norris wrote:
> + Broadcom list + Kamal
> 
> On Tue, Nov 24, 2015 at 08:19:37PM -0000, Simon Arlott wrote:
>> Add device tree binding for NAND on the BCM63268.
>> 
>> The BCM63268 has a NAND interrupt register with combined status and enable
>> registers.
>> 
>> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
>> ---
>>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 35 ++++++++++++++++++++++
>>  1 file changed, 35 insertions(+)
>> 
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> index 4ff7128..f2a71c8 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>> @@ -72,6 +72,14 @@ we define additional 'compatible' properties and associated register resources w
>>         and enable registers
>>       - reg-names: (required) "nand-int-base"
>> 
>> +   * "brcm,nand-bcm63268"
>> +     - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
> 
> Looks like you're aiming to support bcm63168? Is bcm63268 the first
> chip to include this style of register then? The numbering seems
> backwards, but that may just be reality.

Yes, I have a BCM963168VX (BCM63168) but all the Broadcom code refers to
this SoC as BCM63268. This is the only one with these registers in the
source code of similar MIPS that I have.


https://github.com/lp0/bcm963xx_4.12L.06B_consumer/blob/master/bcmdrivers/opensource/char/board/bcm963xx/impl1/board.c#L6595

int kerSysGetChipId() {
...
        /* Force BCM63168, BCM63169, and BCM63269 to be BCM63268) */
        if( ( (r & 0xffffe) == 0x63168 )
          || ( (r & 0xffffe) == 0x63268 ))
            r = 0x63268;

>> +     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
>> +       and enable registers, and boot address registers
>> +     - reg-names: (required) "nand-intr-base"
>> +     - clock: (required) reference to the clock for the NAND controller
>> +     - clock-names: (required) "nand"
>> +
>>     * "brcm,nand-iproc"
>>       - reg: (required) the "IDM" register range, for interrupt enable and APB
>>         bus access endianness configuration, and the "EXT" register range,
>> @@ -148,3 +156,30 @@ nand@f0442800 {
>>  		};
>>  	};
>>  };
>> +
>> +nand@10000200 {
>> +	compatible = "brcm,nand-bcm63168", "brcm,nand-bcm63268",
>> +		"brcm,brcmnand-v4.0", "brcm,brcmnand";
>> +	reg = <0x10000200 0x180>,
>> +	      <0x10000600 0x200>,
>> +	      <0x100000b0 0x10>;
>> +	reg-names = "nand", "nand-cache", "nand-intr-base";
>> +	interrupt-parent = <&periph_intc>;
>> +	interrupts = <50>;
>> +	clocks = <&periph_clk 20>;
>> +	clock-names = "nand";
>> +
>> +	#address-cells = <1>;
>> +	#size-cells = <0>;
>> +
>> +	nand0: nandcs@0 {
>> +		compatible = "brcm,nandcs";
>> +		reg = <0>;
>> +		nand-on-flash-bbt;
>> +		nand-ecc-strength = <1>;
>> +		nand-ecc-step-size = <512>;
>> +
>> +		#address-cells = <0>;
>> +		#size-cells = <0>;
> 
> What are these {address,size}-cells for? If you need them for
> partitioning, then those are wrong -- they shouldn't be zero. Maybe just
> drop them? (I can cut them out when applying, if that's the only change
> to make.)

This is the correct way to do partitioning, there would be a
"partitions" block with no address/size that contains the partitions as
child nodes. [Documentation/devicetree/bindings/mtd/partition.txt]

I think they're also implicit so you can just remove those two lines.

I've created a bcm963268part driver so there won't need to be any
partitions in DT for bcm63268.

>> +	};
>> +};
> 
> Brian
> 


-- 
Simon Arlott

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Brian Norris]

Hi,

On Wed, Dec 02, 2015 at 07:41:07PM +0000, Simon Arlott wrote:
> >> +	nand0: nandcs@0 {
> >> +		compatible = "brcm,nandcs";
> >> +		reg = <0>;
> >> +		nand-on-flash-bbt;
> >> +		nand-ecc-strength = <1>;
> >> +		nand-ecc-step-size = <512>;
> >> +
> >> +		#address-cells = <0>;
> >> +		#size-cells = <0>;
> > 
> > What are these {address,size}-cells for? If you need them for
> > partitioning, then those are wrong -- they shouldn't be zero. Maybe just
> > drop them? (I can cut them out when applying, if that's the only change
> > to make.)
> 
> This is the correct way to do partitioning, there would be a
> "partitions" block with no address/size that contains the partitions as
> child nodes. [Documentation/devicetree/bindings/mtd/partition.txt]

That doc says nothing about {address,size}-cells = 0. When using the new
binding with a 'partitions' subnode, I'm not sure the address
translation specification really matters anyway; the flash space is a
new address space unrelated to the parents, and we don't do any
translation from the 'flash' node to the 'partitions' node. So you don't
need #{address,size}-cells in the flash node, but you do in the
'partitions' node.

> I think they're also implicit so you can just remove those two lines.

>From ePAPR: "The #address-cells and #size-cells properties are not
inherited from ancestors in the device tree. They shall be explicitly
defined."

But we don't want to define them. I'd drop them, at least from the
example, as they're not relevant.

> I've created a bcm963268part driver so there won't need to be any
> partitions in DT for bcm63268.

Just curious, do you plan to submit this driver? We're working on
matching up partition parsers to flash devices via device tree
of_match_table's, so you could do something like this:

	nand0: nandcs@0 {
		compatible = "brcm,nandcs";
		...

		partitions {
			compatible = "brcm,bcm963268-partitions";
			...
		};
	};

FYI.

> >> +	};
> >> +};

Brian

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

On 02/12/15 20:00, Brian Norris wrote:
> Hi,
> 
> On Wed, Dec 02, 2015 at 07:41:07PM +0000, Simon Arlott wrote:
>> >> +	nand0: nandcs@0 {
>> >> +		compatible = "brcm,nandcs";
>> >> +
>> >> +		#address-cells = <0>;
>> >> +		#size-cells = <0>;
> 
>> I think they're also implicit so you can just remove those two lines.
> 
> From ePAPR: "The #address-cells and #size-cells properties are not
> inherited from ancestors in the device tree. They shall be explicitly
> defined."
> 
> But we don't want to define them. I'd drop them, at least from the
> example, as they're not relevant.

Ok.

>> I've created a bcm963268part driver so there won't need to be any
>> partitions in DT for bcm63268.
> 
> Just curious, do you plan to submit this driver? We're working on

Yes, it's just the most recent one I've been working on. I still have
USBH and IUDMA to submit

> matching up partition parsers to flash devices via device tree
> of_match_table's, so you could do something like this:
> 
> 	nand0: nandcs@0 {
> 		compatible = "brcm,nandcs";
> 		...
> 
> 		partitions {
> 			compatible = "brcm,bcm963268-partitions";
> 			...
> 		};
> 	};

I modified brcmnand to look for a machine matching "brcm,bcm963268", but
that way is ok with me. Presumably "ofpart" defers to another matching
partition parser?

Is there a patch for that method of parser detection available?

-- 
Simon Arlott

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Brian Norris]

Hi Simon,

On Wed, Dec 02, 2015 at 08:12:32PM +0000, Simon Arlott wrote:
> On 02/12/15 20:00, Brian Norris wrote:
> > On Wed, Dec 02, 2015 at 07:41:07PM +0000, Simon Arlott wrote:
> >> I've created a bcm963268part driver so there won't need to be any
> >> partitions in DT for bcm63268.
> > 
> > Just curious, do you plan to submit this driver? We're working on
> 
> Yes, it's just the most recent one I've been working on. I still have
> USBH and IUDMA to submit
> 
> > matching up partition parsers to flash devices via device tree
> > of_match_table's, so you could do something like this:
> > 
> > 	nand0: nandcs@0 {
> > 		compatible = "brcm,nandcs";
> > 		...
> > 
> > 		partitions {
> > 			compatible = "brcm,bcm963268-partitions";
> > 			...
> > 		};
> > 	};
> 
> I modified brcmnand to look for a machine matching "brcm,bcm963268", but

Like this?

http://patchwork.ozlabs.org/patch/473180/

I'd like to avoid that (hence the "Rejected" status).

> that way is ok with me. Presumably "ofpart" defers to another matching
> partition parser?

Yes, "ofpart" is for specifying the entire partition table in the device
tree as subnodes of either the flash node or of the flash's "partitions"
subnode. It's not the most flexible, but it does work generically.

> Is there a patch for that method of parser detection available?

I have something working here, but I haven't had time to finish cleaning
it up and submitting it. There's an older patch that works similarly,
though it has some deficiencies:

http://patchwork.ozlabs.org/patch/475988/

The main difference between that and my (yet-to-be-submitted) proposal
is that I'd like parsers to opt in by adding a proper of_match_table
with non-Linux-specific DT bindings, and then we can drop the
"linux,..." naming and make it a reasonably generic property.

Regards,
Brian

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Brian Norris]

On Wed, Dec 02, 2015 at 12:21:27PM -0800, Brian Norris wrote:
> On Wed, Dec 02, 2015 at 08:12:32PM +0000, Simon Arlott wrote:
> > Is there a patch for that method of parser detection available?
> 
> I have something working here, but I haven't had time to finish cleaning
> it up and submitting it. There's an older patch that works similarly,
> though it has some deficiencies:
> 
> http://patchwork.ozlabs.org/patch/475988/
> 
> The main difference between that and my (yet-to-be-submitted) proposal
> is that I'd like parsers to opt in by adding a proper of_match_table
> with non-Linux-specific DT bindings, and then we can drop the
> "linux,..." naming and make it a reasonably generic property.

For other related work: Linus Walleij attempted something similar here:

http://lists.infradead.org/pipermail/linux-mtd/2015-October/062899.html

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

On 02/12/15 20:21, Brian Norris wrote:
> Hi Simon,
> 
> On Wed, Dec 02, 2015 at 08:12:32PM +0000, Simon Arlott wrote:
>> On 02/12/15 20:00, Brian Norris wrote:
>> > On Wed, Dec 02, 2015 at 07:41:07PM +0000, Simon Arlott wrote:
>> >> I've created a bcm963268part driver so there won't need to be any
>> >> partitions in DT for bcm63268.
>> > 
>> > Just curious, do you plan to submit this driver? We're working on
>> 
>> Yes, it's just the most recent one I've been working on. I still have
>> USBH and IUDMA to submit
>> 
>> > matching up partition parsers to flash devices via device tree
>> > of_match_table's, so you could do something like this:
>> > 
>> > 	nand0: nandcs@0 {
>> > 		compatible = "brcm,nandcs";
>> > 		...
>> > 
>> > 		partitions {
>> > 			compatible = "brcm,bcm963268-partitions";
>> > 			...
>> > 		};
>> > 	};
>> 
>> I modified brcmnand to look for a machine matching "brcm,bcm963268", but
> 
> Like this?
> 
> http://patchwork.ozlabs.org/patch/473180/
> 
> I'd like to avoid that (hence the "Rejected" status).

I exported default_mtd_part_types, copied it, and then added to it:
+	for (i = 0; i < nr_types; i++)
+		part_types[i] = default_mtd_part_types[i];
+
+	/* Add partition type based on machine */
+	if (of_machine_is_compatible("brcm,bcm963268"))
+		part_types[i++] = "bcm963268part";
+	else
+		part_types[i++] = NULL;
+
+	part_types[i++] = NULL;

>> that way is ok with me. Presumably "ofpart" defers to another matching
>> partition parser?
> 
> Yes, "ofpart" is for specifying the entire partition table in the device
> tree as subnodes of either the flash node or of the flash's "partitions"
> subnode. It's not the most flexible, but it does work generically.
> 
>> Is there a patch for that method of parser detection available?
> 
> I have something working here, but I haven't had time to finish cleaning
> it up and submitting it. There's an older patch that works similarly,
> though it has some deficiencies:
> 
> http://patchwork.ozlabs.org/patch/475988/
> 
> The main difference between that and my (yet-to-be-submitted) proposal
> is that I'd like parsers to opt in by adding a proper of_match_table
> with non-Linux-specific DT bindings, and then we can drop the
> "linux,..." naming and make it a reasonably generic property.

I'll submit my parser without any means of using it, let me know if you
want me to work on a patch for a match table.

> Regards,
> Brian
> 


-- 
Simon Arlott

Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Simon Arlott]

On 02/12/15 20:21, Brian Norris wrote:
> Hi Simon,
> 
> On Wed, Dec 02, 2015 at 08:12:32PM +0000, Simon Arlott wrote:
>> On 02/12/15 20:00, Brian Norris wrote:
>> > On Wed, Dec 02, 2015 at 07:41:07PM +0000, Simon Arlott wrote:
>> >> I've created a bcm963268part driver so there won't need to be any
>> >> partitions in DT for bcm63268.
>> > 
>> > Just curious, do you plan to submit this driver? We're working on
>> 
>> Yes, it's just the most recent one I've been working on. I still have
>> USBH and IUDMA to submit
>> 
>> > matching up partition parsers to flash devices via device tree
>> > of_match_table's, so you could do something like this:
>> > 
>> > 	nand0: nandcs@0 {
>> > 		compatible = "brcm,nandcs";
>> > 		...
>> > 
>> > 		partitions {
>> > 			compatible = "brcm,bcm963268-partitions";
>> > 			...
>> > 		};
>> > 	};
>> 
>> I modified brcmnand to look for a machine matching "brcm,bcm963268", but
> 
> Like this?
> 
> http://patchwork.ozlabs.org/patch/473180/
> 
> I'd like to avoid that (hence the "Rejected" status).

I exported default_mtd_part_types, copied it, and then added to it:
+	for (i = 0; i < nr_types; i++)
+		part_types[i] = default_mtd_part_types[i];
+
+	/* Add partition type based on machine */
+	if (of_machine_is_compatible("brcm,bcm963268"))
+		part_types[i++] = "bcm963268part";
+	else
+		part_types[i++] = NULL;
+
+	part_types[i++] = NULL;

>> that way is ok with me. Presumably "ofpart" defers to another matching
>> partition parser?
> 
> Yes, "ofpart" is for specifying the entire partition table in the device
> tree as subnodes of either the flash node or of the flash's "partitions"
> subnode. It's not the most flexible, but it does work generically.
> 
>> Is there a patch for that method of parser detection available?
> 
> I have something working here, but I haven't had time to finish cleaning
> it up and submitting it. There's an older patch that works similarly,
> though it has some deficiencies:
> 
> http://patchwork.ozlabs.org/patch/475988/
> 
> The main difference between that and my (yet-to-be-submitted) proposal
> is that I'd like parsers to opt in by adding a proper of_match_table
> with non-Linux-specific DT bindings, and then we can drop the
> "linux,..." naming and make it a reasonably generic property.

I'll submit my parser without any means of using it, let me know if you
want me to work on a patch for a match table.

> Regards,
> Brian
> 


-- 
Simon Arlott
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Re: [PATCH (v6) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Brian Norris]

On Wed, Dec 02, 2015 at 08:34:38PM +0000, Simon Arlott wrote:
> On 02/12/15 20:21, Brian Norris wrote:
> > On Wed, Dec 02, 2015 at 08:12:32PM +0000, Simon Arlott wrote:
> >> On 02/12/15 20:00, Brian Norris wrote:
> >> > On Wed, Dec 02, 2015 at 07:41:07PM +0000, Simon Arlott wrote:
> >> >> I've created a bcm963268part driver so there won't need to be any
> >> >> partitions in DT for bcm63268.
> >> > 
> >> > Just curious, do you plan to submit this driver? We're working on
> >> 
> >> Yes, it's just the most recent one I've been working on. I still have
> >> USBH and IUDMA to submit
> >> 
> >> > matching up partition parsers to flash devices via device tree
> >> > of_match_table's, so you could do something like this:
> >> > 
> >> > 	nand0: nandcs@0 {
> >> > 		compatible = "brcm,nandcs";
> >> > 		...
> >> > 
> >> > 		partitions {
> >> > 			compatible = "brcm,bcm963268-partitions";
> >> > 			...
> >> > 		};
> >> > 	};
> >> 
> >> I modified brcmnand to look for a machine matching "brcm,bcm963268", but
> > 
> > Like this?
> > 
> > http://patchwork.ozlabs.org/patch/473180/
> > 
> > I'd like to avoid that (hence the "Rejected" status).
> 
> I exported default_mtd_part_types, copied it, and then added to it:
> +	for (i = 0; i < nr_types; i++)
> +		part_types[i] = default_mtd_part_types[i];
> +
> +	/* Add partition type based on machine */
> +	if (of_machine_is_compatible("brcm,bcm963268"))
> +		part_types[i++] = "bcm963268part";
> +	else
> +		part_types[i++] = NULL;
> +
> +	part_types[i++] = NULL;

OK, so even uglier :)

> >> that way is ok with me. Presumably "ofpart" defers to another matching
> >> partition parser?
> > 
> > Yes, "ofpart" is for specifying the entire partition table in the device
> > tree as subnodes of either the flash node or of the flash's "partitions"
> > subnode. It's not the most flexible, but it does work generically.
> > 
> >> Is there a patch for that method of parser detection available?
> > 
> > I have something working here, but I haven't had time to finish cleaning
> > it up and submitting it. There's an older patch that works similarly,
> > though it has some deficiencies:
> > 
> > http://patchwork.ozlabs.org/patch/475988/
> > 
> > The main difference between that and my (yet-to-be-submitted) proposal
> > is that I'd like parsers to opt in by adding a proper of_match_table
> > with non-Linux-specific DT bindings, and then we can drop the
> > "linux,..." naming and make it a reasonably generic property.
> 
> I'll submit my parser without any means of using it,

Sounds fine.

> let me know if you
> want me to work on a patch for a match table.

If you're interested, I may CC you on my patches for testing/review.

Brian

Re: [PATCH (v4) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Rob Herring]

On Sun, Nov 22, 2015 at 10:15:33PM +0000, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
> 
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
> 
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>

Acked-by: Rob Herring <robh@kernel.org>

> ---
> On 22/11/15 21:59, Rob Herring wrote:
> >> + * "brcm,nand-bcm63268"
> >> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
> >
> > vendor,<soc>-device is preferred.
> 
> The existing two bindings use brcm,nand-<soc>, but I've changed this one.
> 
>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> index 4ff7128..2644d6c 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> @@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
>         and enable registers
>       - reg-names: (required) "nand-int-base"
>  
> +   * "brcm,bcm63268-nand"
> +     - compatible: should contain "brcm,bcm<soc>-nand", "brcm,bcm63268-nand"
> +     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
> +       and enable registers, and boot address registers
> +     - reg-names: (required) "nand-intr-base"
> +     - clock: (required) reference to the clock for NAND controller
> +
>     * "brcm,nand-iproc"
>       - reg: (required) the "IDM" register range, for interrupt enable and APB
>         bus access endianness configuration, and the "EXT" register range,
> @@ -148,3 +155,29 @@ nand@f0442800 {
>  		};
>  	};
>  };
> +
> +nand@0x10000200 {
> +	compatible = "brcm,bcm63168-nand", "brcm,bcm63268-nand",
> +		"brcm,brcmnand-v4.0", "brcm,brcmnand";
> +	reg = <0x10000200 0x180>,
> +	      <0x10000600 0x200>,
> +	      <0x100000b0 0x10>;
> +	reg-names = "nand", "nand-cache", "nand-intr-base";
> +	interrupt-parent = <&periph_intc>;
> +	interrupts = <50>;
> +	clocks = <&periph_clk 20>;
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	nand0: nandcs@0 {
> +		compatible = "brcm,nandcs";
> +		reg = <0>;
> +		nand-on-flash-bbt;
> +		nand-ecc-strength = <1>;
> +		nand-ecc-step-size = <512>;
> +
> +		#address-cells = <0>;
> +		#size-cells = <0>;
> +	};
> +};
> -- 
> 2.1.4
> 
> -- 
> Simon Arlott
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH (v4) 1/2] mtd: brcmnand: Add brcm,bcm63268-nand device tree binding

[Rob Herring]

On Sun, Nov 22, 2015 at 10:15:33PM +0000, Simon Arlott wrote:
> Add device tree binding for NAND on the BCM63268.
> 
> The BCM63268 has a NAND interrupt register with combined status and enable
> registers.
> 
> Signed-off-by: Simon Arlott <simon-A6De1vDTPLDsq35pWSNszA@public.gmane.org>

Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>

> ---
> On 22/11/15 21:59, Rob Herring wrote:
> >> + * "brcm,nand-bcm63268"
> >> + - compatible: should contain "brcm,nand-bcm<soc>", "brcm,nand-bcm63268"
> >
> > vendor,<soc>-device is preferred.
> 
> The existing two bindings use brcm,nand-<soc>, but I've changed this one.
> 
>  .../devicetree/bindings/mtd/brcm,brcmnand.txt      | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> index 4ff7128..2644d6c 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
> @@ -72,6 +72,13 @@ we define additional 'compatible' properties and associated register resources w
>         and enable registers
>       - reg-names: (required) "nand-int-base"
>  
> +   * "brcm,bcm63268-nand"
> +     - compatible: should contain "brcm,bcm<soc>-nand", "brcm,bcm63268-nand"
> +     - reg: (required) the 'NAND_INTR_BASE' register range, with combined status
> +       and enable registers, and boot address registers
> +     - reg-names: (required) "nand-intr-base"
> +     - clock: (required) reference to the clock for NAND controller
> +
>     * "brcm,nand-iproc"
>       - reg: (required) the "IDM" register range, for interrupt enable and APB
>         bus access endianness configuration, and the "EXT" register range,
> @@ -148,3 +155,29 @@ nand@f0442800 {
>  		};
>  	};
>  };
> +
> +nand@0x10000200 {
> +	compatible = "brcm,bcm63168-nand", "brcm,bcm63268-nand",
> +		"brcm,brcmnand-v4.0", "brcm,brcmnand";
> +	reg = <0x10000200 0x180>,
> +	      <0x10000600 0x200>,
> +	      <0x100000b0 0x10>;
> +	reg-names = "nand", "nand-cache", "nand-intr-base";
> +	interrupt-parent = <&periph_intc>;
> +	interrupts = <50>;
> +	clocks = <&periph_clk 20>;
> +
> +	#address-cells = <1>;
> +	#size-cells = <0>;
> +
> +	nand0: nandcs@0 {
> +		compatible = "brcm,nandcs";
> +		reg = <0>;
> +		nand-on-flash-bbt;
> +		nand-ecc-strength = <1>;
> +		nand-ecc-step-size = <512>;
> +
> +		#address-cells = <0>;
> +		#size-cells = <0>;
> +	};
> +};
> -- 
> 2.1.4
> 
> -- 
> Simon Arlott
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
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