* [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg
@ 2016-01-06 3:06 Peng Fan
2016-01-06 3:06 ` [U-Boot] [PATCH V2 2/2] imx: mx6ul/sx: fix mmdc_ch0 clk calculation Peng Fan
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Peng Fan @ 2016-01-06 3:06 UTC (permalink / raw)
To: u-boot
From: Peng Fan <peng.fan@nxp.com>
Add more entries for structure mxc_ccm_reg.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes V2:
Address Eric'c comments. Add Comments and rename registers from PMU with
prefix pmu.
arch/arm/include/asm/arch-mx6/crm_regs.h | 91 ++++++++++++++++++++++++++++++++
1 file changed, 91 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index 13e0a3d..f6ec09d 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -103,6 +103,97 @@ struct mxc_ccm_reg {
u32 analog_pfd_528_set;
u32 analog_pfd_528_clr;
u32 analog_pfd_528_tog;
+ /* PMU Memory Map/Register Definition */
+ u32 pmu_reg_1p1;
+ u32 pmu_reg_1p1_set;
+ u32 pmu_reg_1p1_clr;
+ u32 pmu_reg_1p1_tog;
+ u32 pmu_reg_3p0;
+ u32 pmu_reg_3p0_set;
+ u32 pmu_reg_3p0_clr;
+ u32 pmu_reg_3p0_tog;
+ u32 pmu_reg_2p5;
+ u32 pmu_reg_2p5_set;
+ u32 pmu_reg_2p5_clr;
+ u32 pmu_reg_2p5_tog;
+ u32 pmu_reg_core;
+ u32 pmu_reg_core_set;
+ u32 pmu_reg_core_clr;
+ u32 pmu_reg_core_tog;
+ u32 pmu_misc0;
+ u32 pmu_misc0_set;
+ u32 pmu_misc0_clr;
+ u32 pmu_misc0_tog;
+ u32 pmu_misc1;
+ u32 pmu_misc1_set;
+ u32 pmu_misc1_clr;
+ u32 pmu_misc1_tog;
+ u32 pmu_misc2;
+ u32 pmu_misc2_set;
+ u32 pmu_misc2_clr;
+ u32 pmu_misc2_tog;
+ /* TEMPMON Memory Map/Register Definition */
+ u32 tempsense0;
+ u32 tempsense0_set;
+ u32 tempsense0_clr;
+ u32 tempsense0_tog;
+ u32 tempsense1;
+ u32 tempsense1_set;
+ u32 tempsense1_clr;
+ u32 tempsense1_tog;
+ /* USB Analog Memory Map/Register Definition */
+ u32 usb1_vbus_detect;
+ u32 usb1_vbus_detect_set;
+ u32 usb1_vbus_detect_clr;
+ u32 usb1_vbus_detect_tog;
+ u32 usb1_chrg_detect;
+ u32 usb1_chrg_detect_set;
+ u32 usb1_chrg_detect_clr;
+ u32 usb1_chrg_detect_tog;
+ u32 usb1_vbus_det_stat;
+ u32 usb1_vbus_det_stat_set;
+ u32 usb1_vbus_det_stat_clr;
+ u32 usb1_vbus_det_stat_tog;
+ u32 usb1_chrg_det_stat;
+ u32 usb1_chrg_det_stat_set;
+ u32 usb1_chrg_det_stat_clr;
+ u32 usb1_chrg_det_stat_tog;
+ u32 usb1_loopback;
+ u32 usb1_loopback_set;
+ u32 usb1_loopback_clr;
+ u32 usb1_loopback_tog;
+ u32 usb1_misc;
+ u32 usb1_misc_set;
+ u32 usb1_misc_clr;
+ u32 usb1_misc_tog;
+ u32 usb2_vbus_detect;
+ u32 usb2_vbus_detect_set;
+ u32 usb2_vbus_detect_clr;
+ u32 usb2_vbus_detect_tog;
+ u32 usb2_chrg_detect;
+ u32 usb2_chrg_detect_set;
+ u32 usb2_chrg_detect_clr;
+ u32 usb2_chrg_detect_tog;
+ u32 usb2_vbus_det_stat;
+ u32 usb2_vbus_det_stat_set;
+ u32 usb2_vbus_det_stat_clr;
+ u32 usb2_vbus_det_stat_tog;
+ u32 usb2_chrg_det_stat;
+ u32 usb2_chrg_det_stat_set;
+ u32 usb2_chrg_det_stat_clr;
+ u32 usb2_chrg_det_stat_tog;
+ u32 usb2_loopback;
+ u32 usb2_loopback_set;
+ u32 usb2_loopback_clr;
+ u32 usb2_loopback_tog;
+ u32 usb2_misc;
+ u32 usb2_misc_set;
+ u32 usb2_misc_clr;
+ u32 usb2_misc_tog;
+ u32 digprog;
+ u32 reserved1[7];
+ /* For i.MX 6SoloLite */
+ u32 digprog_sololite;
};
#endif
--
2.6.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH V2 2/2] imx: mx6ul/sx: fix mmdc_ch0 clk calculation
2016-01-06 3:06 [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg Peng Fan
@ 2016-01-06 3:06 ` Peng Fan
2016-01-24 11:13 ` Stefano Babic
2016-01-06 3:28 ` [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg Eric Nelson
2016-01-24 11:13 ` Stefano Babic
2 siblings, 1 reply; 5+ messages in thread
From: Peng Fan @ 2016-01-06 3:06 UTC (permalink / raw)
To: u-boot
From: Peng Fan <peng.fan@nxp.com>
Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications
Processor Reference Manual and "Figure 18-5. BUS clock generation" of
i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk
sources from pll4_main_clk(pll_audio), the calculation is wrong.
Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support
for decode_pll.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
Changes V2:
Address Eric's comemnts about indent format. Use pmu_misc2_audio_div, but not
misc2_audio_div.
Define macro to simplify c code.
arch/arm/cpu/armv7/mx6/clock.c | 61 +++++++++++++++++++++++++++++---
arch/arm/include/asm/arch-mx6/crm_regs.h | 12 +++++++
2 files changed, 69 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 64514b1..27a3f2f 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -18,6 +18,8 @@ enum pll_clocks {
PLL_BUS, /* System Bus PLL*/
PLL_USBOTG, /* OTG USB PLL */
PLL_ENET, /* ENET PLL */
+ PLL_AUDIO, /* AUDIO PLL */
+ PLL_VIDEO, /* AUDIO PLL */
};
struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -204,7 +206,7 @@ int enable_spi_clk(unsigned char enable, unsigned spi_num)
}
static u32 decode_pll(enum pll_clocks pll, u32 infreq)
{
- u32 div;
+ u32 div, test_div, pll_num, pll_denom;
switch (pll) {
case PLL_SYS:
@@ -227,6 +229,44 @@ static u32 decode_pll(enum pll_clocks pll, u32 infreq)
div &= BM_ANADIG_PLL_ENET_DIV_SELECT;
return 25000000 * (div + (div >> 1) + 1);
+ case PLL_AUDIO:
+ div = __raw_readl(&imx_ccm->analog_pll_audio);
+ if (!(div & BM_ANADIG_PLL_AUDIO_ENABLE))
+ return 0;
+ /* BM_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC is ignored */
+ if (div & BM_ANADIG_PLL_AUDIO_BYPASS)
+ return MXC_HCLK;
+ pll_num = __raw_readl(&imx_ccm->analog_pll_audio_num);
+ pll_denom = __raw_readl(&imx_ccm->analog_pll_audio_denom);
+ test_div = (div & BM_ANADIG_PLL_AUDIO_TEST_DIV_SELECT) >>
+ BP_ANADIG_PLL_AUDIO_TEST_DIV_SELECT;
+ div &= BM_ANADIG_PLL_AUDIO_DIV_SELECT;
+ if (test_div == 3) {
+ debug("Error test_div\n");
+ return 0;
+ }
+ test_div = 1 << (2 - test_div);
+
+ return infreq * (div + pll_num / pll_denom) / test_div;
+ case PLL_VIDEO:
+ div = __raw_readl(&imx_ccm->analog_pll_video);
+ if (!(div & BM_ANADIG_PLL_VIDEO_ENABLE))
+ return 0;
+ /* BM_ANADIG_PLL_AUDIO_BYPASS_CLK_SRC is ignored */
+ if (div & BM_ANADIG_PLL_VIDEO_BYPASS)
+ return MXC_HCLK;
+ pll_num = __raw_readl(&imx_ccm->analog_pll_video_num);
+ pll_denom = __raw_readl(&imx_ccm->analog_pll_video_denom);
+ test_div = (div & BM_ANADIG_PLL_VIDEO_POST_DIV_SELECT) >>
+ BP_ANADIG_PLL_VIDEO_POST_DIV_SELECT;
+ div &= BM_ANADIG_PLL_VIDEO_DIV_SELECT;
+ if (test_div == 3) {
+ debug("Error test_div\n");
+ return 0;
+ }
+ test_div = 1 << (2 - test_div);
+
+ return infreq * (div + pll_num / pll_denom) / test_div;
default:
return 0;
}
@@ -437,7 +477,7 @@ static u32 get_mmdc_ch0_clk(void)
u32 cbcmr = __raw_readl(&imx_ccm->cbcmr);
u32 cbcdr = __raw_readl(&imx_ccm->cbcdr);
- u32 freq, podf, per2_clk2_podf;
+ u32 freq, podf, per2_clk2_podf, pmu_misc2_audio_div;
if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) ||
is_cpu_type(MXC_CPU_MX6SL)) {
@@ -472,8 +512,21 @@ static u32 get_mmdc_ch0_clk(void)
freq = mxc_get_pll_pfd(PLL_BUS, 0);
break;
case 3:
- /* static / 2 divider */
- freq = mxc_get_pll_pfd(PLL_BUS, 2) / 2;
+ pmu_misc2_audio_div = PMU_MISC2_AUDIO_DIV(__raw_readl(&imx_ccm->pmu_misc2));
+ switch (pmu_misc2_audio_div) {
+ case 0:
+ case 2:
+ pmu_misc2_audio_div = 1;
+ break;
+ case 1:
+ pmu_misc2_audio_div = 2;
+ break;
+ case 3:
+ pmu_misc2_audio_div = 4;
+ break;
+ }
+ freq = decode_pll(PLL_AUDIO, MXC_HCLK) /
+ pmu_misc2_audio_div;
break;
}
}
diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index f6ec09d..d9254ba 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -1227,4 +1227,16 @@ struct mxc_ccm_reg {
#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008
+#define BM_PMU_MISC2_AUDIO_DIV_MSB (1 << 23)
+#define BP_PMU_MISC2_AUDIO_DIV_MSB 23
+
+#define BM_PMU_MISC2_AUDIO_DIV_LSB (1 << 15)
+#define BP_PMU_MISC2_AUDIO_DIV_LSB 15
+
+#define PMU_MISC2_AUDIO_DIV(v) \
+ (((v & BM_PMU_MISC2_AUDIO_DIV_MSB) >> \
+ (BP_PMU_MISC2_AUDIO_DIV_MSB - 1)) | \
+ ((v & BM_PMU_MISC2_AUDIO_DIV_LSB) >> \
+ BP_PMU_MISC2_AUDIO_DIV_LSB))
+
#endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */
--
2.6.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg
2016-01-06 3:06 [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg Peng Fan
2016-01-06 3:06 ` [U-Boot] [PATCH V2 2/2] imx: mx6ul/sx: fix mmdc_ch0 clk calculation Peng Fan
@ 2016-01-06 3:28 ` Eric Nelson
2016-01-24 11:13 ` Stefano Babic
2 siblings, 0 replies; 5+ messages in thread
From: Eric Nelson @ 2016-01-06 3:28 UTC (permalink / raw)
To: u-boot
On 01/05/2016 08:06 PM, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Add more entries for structure mxc_ccm_reg.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Eric Nelson <eric@nelint.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>
> Changes V2:
> Address Eric'c comments. Add Comments and rename registers from PMU with
> prefix pmu.
>
Nice. Thanks.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg
2016-01-06 3:06 [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg Peng Fan
2016-01-06 3:06 ` [U-Boot] [PATCH V2 2/2] imx: mx6ul/sx: fix mmdc_ch0 clk calculation Peng Fan
2016-01-06 3:28 ` [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg Eric Nelson
@ 2016-01-24 11:13 ` Stefano Babic
2 siblings, 0 replies; 5+ messages in thread
From: Stefano Babic @ 2016-01-24 11:13 UTC (permalink / raw)
To: u-boot
On 06/01/2016 04:06, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Add more entries for structure mxc_ccm_reg.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Eric Nelson <eric@nelint.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
>
Applied to u-boot-imx, thanks!
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH V2 2/2] imx: mx6ul/sx: fix mmdc_ch0 clk calculation
2016-01-06 3:06 ` [U-Boot] [PATCH V2 2/2] imx: mx6ul/sx: fix mmdc_ch0 clk calculation Peng Fan
@ 2016-01-24 11:13 ` Stefano Babic
0 siblings, 0 replies; 5+ messages in thread
From: Stefano Babic @ 2016-01-24 11:13 UTC (permalink / raw)
To: u-boot
On 06/01/2016 04:06, Peng Fan wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications
> Processor Reference Manual and "Figure 18-5. BUS clock generation" of
> i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk
> sources from pll4_main_clk(pll_audio), the calculation is wrong.
>
> Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support
> for decode_pll.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
Applied to u-boot-imx, thanks!
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 5+ messages in thread
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-- links below jump to the message on this page --
2016-01-06 3:06 [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg Peng Fan
2016-01-06 3:06 ` [U-Boot] [PATCH V2 2/2] imx: mx6ul/sx: fix mmdc_ch0 clk calculation Peng Fan
2016-01-24 11:13 ` Stefano Babic
2016-01-06 3:28 ` [U-Boot] [PATCH V2 1/2] imx: mx6: add more entry for mxc_ccm_reg Eric Nelson
2016-01-24 11:13 ` Stefano Babic
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