* [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model
@ 2016-01-14 23:59 Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 01/25] exynos: video: Move driver files into their own directory Simon Glass
` (24 more replies)
0 siblings, 25 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
This series converts the exynos LCD driver to work with driver model. Only
the eDP display is converted - the MIPI display is left mostly alone as I
do not have a device to test with.
The conversion involves some refactoring to simplify the code, reduce the
amount of global/static data and allow boards to be built without LCD
support.
The series is tested with snow, spring, pit and pi. It disables LCD on other
exynos boards so that they will still build with these changes. Further work
will be needed (by someone with a board) to convert the others. I am not
sure when this series can be applied.
The series also brings in device tree features from Linux v4.4. It would be
useful to do a full sync with the kernel on these files, but this is really
a job for the Samsung maintainer :-)
The series is available at u-boot-dm/rkg-working.
Simon Glass (25):
exynos: video: Move driver files into their own directory
exynos: video: Drop dead code
exynos: video: Remove use of vidinfo_t typedef
exynos: video: Drop the static lcd_base_addr variable
exynos: video: Drop static variables in exynos_fimd.c
exynos: video: Drop static variables in exynos_fb.c
exynos: video: Drop static variables in exynos_dp_lowlevel.c
exynos: video: Move dsim_config_dt into a function
exynos: video: Move struct exynos_platform_mipi_dsim into vidinfo
exynos: video: Move mipi_lcd_device_dt into a function
exynos: video: Combine LCD driver into one file
exynos: pwm: Add a driver for the exynos5 PWM
video: Add an enum for active low/high
exynos: dts: Add pwm device tree node
exynos: Allow tizen to be built without an LCD
exynos: Allow CONFIG_MISC_COMMON to be build without an LCD
exynos: Disable LCD display for boards we can't convert
dts: Add clock and regulator binding files for max77802
exynos: Allow PWM0 pinmux to be set up
exynos: Simplify calling of exynos_dp_phy_ctrl()
exynos: dts: Add display-related device tree fragments
exynos: video: Rename edp_device_info to exynos_dp_priv
exynos: video: Rename variables for driver model
exynos: video: Convert several boards to driver model for video
exynos: video: Drop old unused code
arch/arm/cpu/armv7/s5p-common/timer.c | 3 +
arch/arm/dts/exynos5.dtsi | 3 +-
arch/arm/dts/exynos5250-snow.dts | 44 ++
arch/arm/dts/exynos5250-spring.dts | 53 ++
arch/arm/dts/exynos5250.dtsi | 7 +
arch/arm/dts/exynos5420-peach-pit.dts | 55 ++
arch/arm/dts/exynos54xx.dtsi | 11 +-
arch/arm/dts/exynos5800-peach-pi.dts | 40 ++
arch/arm/mach-exynos/include/mach/cpu.h | 2 -
arch/arm/mach-exynos/include/mach/dp_info.h | 5 +-
arch/arm/mach-exynos/include/mach/mipi_dsim.h | 10 +-
arch/arm/mach-exynos/include/mach/power.h | 2 +-
arch/arm/mach-exynos/pinmux.c | 6 +
arch/arm/mach-exynos/power.c | 2 +-
board/samsung/common/board.c | 15 -
board/samsung/common/exynos5-dt.c | 158 -----
board/samsung/common/misc.c | 10 +
board/samsung/trats/trats.c | 2 +
board/samsung/universal_c210/universal.c | 2 +
configs/peach-pi_defconfig | 3 +
configs/peach-pit_defconfig | 3 +
configs/snow_defconfig | 3 +
configs/spring_defconfig | 3 +
drivers/pwm/Kconfig | 9 +
drivers/pwm/Makefile | 1 +
drivers/pwm/exynos_pwm.c | 120 ++++
drivers/video/Makefile | 6 +-
drivers/video/exynos/Makefile | 12 +
drivers/video/{ => exynos}/exynos_dp.c | 599 ++++++++++-------
drivers/video/{ => exynos}/exynos_dp_lowlevel.c | 268 ++++----
drivers/video/exynos/exynos_dp_lowlevel.h | 89 +++
drivers/video/exynos/exynos_fb.c | 720 +++++++++++++++++++++
drivers/video/{ => exynos}/exynos_mipi_dsi.c | 71 +-
.../video/{ => exynos}/exynos_mipi_dsi_common.c | 6 +-
.../video/{ => exynos}/exynos_mipi_dsi_common.h | 0
.../video/{ => exynos}/exynos_mipi_dsi_lowlevel.c | 0
.../video/{ => exynos}/exynos_mipi_dsi_lowlevel.h | 0
drivers/video/{ => exynos}/exynos_pwm_bl.c | 0
drivers/video/exynos_dp_lowlevel.h | 68 --
drivers/video/exynos_fb.c | 330 ----------
drivers/video/exynos_fb.h | 41 --
drivers/video/exynos_fimd.c | 409 ------------
drivers/video/s6e8ax0.c | 4 +-
drivers/video/simple_panel.c | 2 +
include/configs/exynos5-dt-common.h | 5 +-
include/configs/s5pc210_universal.h | 3 -
include/configs/smdk5250.h | 3 +
include/configs/smdk5420.h | 4 +
include/configs/trats.h | 4 -
include/configs/trats2.h | 4 -
include/dt-bindings/clock/maxim,max77802.h | 22 +
include/dt-bindings/regulator/maxim,max77802.h | 18 +
include/exynos_lcd.h | 4 +-
include/libtizen.h | 2 +
include/video.h | 5 +
lib/tizen/tizen.c | 2 +
56 files changed, 1800 insertions(+), 1473 deletions(-)
create mode 100644 drivers/pwm/exynos_pwm.c
create mode 100644 drivers/video/exynos/Makefile
rename drivers/video/{ => exynos}/exynos_dp.c (50%)
rename drivers/video/{ => exynos}/exynos_dp_lowlevel.c (77%)
create mode 100644 drivers/video/exynos/exynos_dp_lowlevel.h
create mode 100644 drivers/video/exynos/exynos_fb.c
rename drivers/video/{ => exynos}/exynos_mipi_dsi.c (80%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_common.c (99%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_common.h (100%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.c (100%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.h (100%)
rename drivers/video/{ => exynos}/exynos_pwm_bl.c (100%)
delete mode 100644 drivers/video/exynos_dp_lowlevel.h
delete mode 100644 drivers/video/exynos_fb.c
delete mode 100644 drivers/video/exynos_fb.h
delete mode 100644 drivers/video/exynos_fimd.c
create mode 100644 include/dt-bindings/clock/maxim,max77802.h
create mode 100644 include/dt-bindings/regulator/maxim,max77802.h
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 01/25] exynos: video: Move driver files into their own directory
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 02/25] exynos: video: Drop dead code Simon Glass
` (23 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
Move all the exynos video drivers into one place for ease of maintenance.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/Makefile | 6 +-----
drivers/video/exynos/Makefile | 12 ++++++++++++
drivers/video/{ => exynos}/exynos_dp.c | 0
drivers/video/{ => exynos}/exynos_dp_lowlevel.c | 0
drivers/video/{ => exynos}/exynos_dp_lowlevel.h | 0
drivers/video/{ => exynos}/exynos_fb.c | 0
drivers/video/{ => exynos}/exynos_fb.h | 0
drivers/video/{ => exynos}/exynos_fimd.c | 0
drivers/video/{ => exynos}/exynos_mipi_dsi.c | 0
drivers/video/{ => exynos}/exynos_mipi_dsi_common.c | 0
drivers/video/{ => exynos}/exynos_mipi_dsi_common.h | 0
drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.c | 0
drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.h | 0
drivers/video/{ => exynos}/exynos_pwm_bl.c | 0
drivers/video/s6e8ax0.c | 4 ++--
15 files changed, 15 insertions(+), 7 deletions(-)
create mode 100644 drivers/video/exynos/Makefile
rename drivers/video/{ => exynos}/exynos_dp.c (100%)
rename drivers/video/{ => exynos}/exynos_dp_lowlevel.c (100%)
rename drivers/video/{ => exynos}/exynos_dp_lowlevel.h (100%)
rename drivers/video/{ => exynos}/exynos_fb.c (100%)
rename drivers/video/{ => exynos}/exynos_fb.h (100%)
rename drivers/video/{ => exynos}/exynos_fimd.c (100%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi.c (100%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_common.c (100%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_common.h (100%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.c (100%)
rename drivers/video/{ => exynos}/exynos_mipi_dsi_lowlevel.h (100%)
rename drivers/video/{ => exynos}/exynos_pwm_bl.c (100%)
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 084219e..f6f1106 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -21,11 +21,6 @@ obj-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o
-obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
-obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
-obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
- exynos_mipi_dsi_lowlevel.o
-obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
obj-$(CONFIG_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o
obj-$(CONFIG_L5F31188) += l5f31188.o
@@ -62,6 +57,7 @@ obj-$(CONFIG_LG4573) += lg4573.o
obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
+obj-${CONFIG_EXYNOS_FB} += exynos/
obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/
obj-y += bridge/
diff --git a/drivers/video/exynos/Makefile b/drivers/video/exynos/Makefile
new file mode 100644
index 0000000..d4bdf32
--- /dev/null
+++ b/drivers/video/exynos/Makefile
@@ -0,0 +1,12 @@
+#
+# (C) Copyright 2000-2007
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
+obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
+obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
+ exynos_mipi_dsi_lowlevel.o
+obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
diff --git a/drivers/video/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
similarity index 100%
rename from drivers/video/exynos_dp.c
rename to drivers/video/exynos/exynos_dp.c
diff --git a/drivers/video/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
similarity index 100%
rename from drivers/video/exynos_dp_lowlevel.c
rename to drivers/video/exynos/exynos_dp_lowlevel.c
diff --git a/drivers/video/exynos_dp_lowlevel.h b/drivers/video/exynos/exynos_dp_lowlevel.h
similarity index 100%
rename from drivers/video/exynos_dp_lowlevel.h
rename to drivers/video/exynos/exynos_dp_lowlevel.h
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
similarity index 100%
rename from drivers/video/exynos_fb.c
rename to drivers/video/exynos/exynos_fb.c
diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos/exynos_fb.h
similarity index 100%
rename from drivers/video/exynos_fb.h
rename to drivers/video/exynos/exynos_fb.h
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c
similarity index 100%
rename from drivers/video/exynos_fimd.c
rename to drivers/video/exynos/exynos_fimd.c
diff --git a/drivers/video/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
similarity index 100%
rename from drivers/video/exynos_mipi_dsi.c
rename to drivers/video/exynos/exynos_mipi_dsi.c
diff --git a/drivers/video/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c
similarity index 100%
rename from drivers/video/exynos_mipi_dsi_common.c
rename to drivers/video/exynos/exynos_mipi_dsi_common.c
diff --git a/drivers/video/exynos_mipi_dsi_common.h b/drivers/video/exynos/exynos_mipi_dsi_common.h
similarity index 100%
rename from drivers/video/exynos_mipi_dsi_common.h
rename to drivers/video/exynos/exynos_mipi_dsi_common.h
diff --git a/drivers/video/exynos_mipi_dsi_lowlevel.c b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
similarity index 100%
rename from drivers/video/exynos_mipi_dsi_lowlevel.c
rename to drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
diff --git a/drivers/video/exynos_mipi_dsi_lowlevel.h b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.h
similarity index 100%
rename from drivers/video/exynos_mipi_dsi_lowlevel.h
rename to drivers/video/exynos/exynos_mipi_dsi_lowlevel.h
diff --git a/drivers/video/exynos_pwm_bl.c b/drivers/video/exynos/exynos_pwm_bl.c
similarity index 100%
rename from drivers/video/exynos_pwm_bl.c
rename to drivers/video/exynos/exynos_pwm_bl.c
diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c
index 8494817..1bd49ee 100644
--- a/drivers/video/s6e8ax0.c
+++ b/drivers/video/s6e8ax0.c
@@ -9,8 +9,8 @@
#include <common.h>
#include <asm/arch/mipi_dsim.h>
-#include "exynos_mipi_dsi_lowlevel.h"
-#include "exynos_mipi_dsi_common.h"
+#include "exynos/exynos_mipi_dsi_lowlevel.h"
+#include "exynos/exynos_mipi_dsi_common.h"
static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
{
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 02/25] exynos: video: Drop dead code
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 01/25] exynos: video: Move driver files into their own directory Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 03/25] exynos: video: Remove use of vidinfo_t typedef Simon Glass
` (22 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
We always use device tree with video, so can drop these #ifdefs. Some of the
hardware addresses are not needed either.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/include/mach/cpu.h | 2 --
drivers/video/exynos/exynos_dp_lowlevel.c | 4 ----
drivers/video/exynos/exynos_fb.c | 11 -----------
drivers/video/exynos/exynos_fimd.c | 7 -------
drivers/video/exynos/exynos_mipi_dsi.c | 4 ----
include/exynos_lcd.h | 2 --
6 files changed, 30 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/cpu.h b/arch/arm/mach-exynos/include/mach/cpu.h
index 14a1692..abcfcf3 100644
--- a/arch/arm/mach-exynos/include/mach/cpu.h
+++ b/arch/arm/mach-exynos/include/mach/cpu.h
@@ -288,9 +288,7 @@ static inline unsigned int __attribute__((no_instrument_function)) \
SAMSUNG_BASE(adc, ADC_BASE)
SAMSUNG_BASE(clock, CLOCK_BASE)
SAMSUNG_BASE(ace_sfr, ACE_SFR_BASE)
-SAMSUNG_BASE(dp, DP_BASE)
SAMSUNG_BASE(sysreg, SYSREG_BASE)
-SAMSUNG_BASE(fimd, FIMD_BASE)
SAMSUNG_BASE(i2c, I2C_BASE)
SAMSUNG_BASE(i2s, I2S_BASE)
SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE)
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index e9b461a..4931509 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -22,7 +22,6 @@ struct exynos_dp *dp_regs;
void exynos_dp_set_base_addr(void)
{
-#if CONFIG_IS_ENABLED(OF_CONTROL)
unsigned int node = fdtdec_next_compatible(gd->fdt_blob,
0, COMPAT_SAMSUNG_EXYNOS5_DP);
if (node <= 0)
@@ -32,9 +31,6 @@ void exynos_dp_set_base_addr(void)
node, "reg");
if (dp_regs == NULL)
debug("Can't get the DP base address\n");
-#else
- dp_regs = (struct exynos_dp *)samsung_get_base_dp();
-#endif
}
static void exynos_dp_enable_video_input(unsigned int enable)
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 69edc3a..39e3ade 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -28,7 +28,6 @@ DECLARE_GLOBAL_DATA_PTR;
static unsigned int panel_width, panel_height;
-#if CONFIG_IS_ENABLED(OF_CONTROL)
vidinfo_t panel_info = {
/*
* Insert a value here so that we don't end up in the BSS
@@ -36,7 +35,6 @@ vidinfo_t panel_info = {
*/
.vl_col = -1,
};
-#endif
ushort *configuration_get_cmap(void)
{
@@ -126,7 +124,6 @@ static void lcd_panel_on(vidinfo_t *vid)
exynos_backlight_on(1);
-#if CONFIG_IS_ENABLED(OF_CONTROL)
node = fdtdec_next_compatible(gd->fdt_blob, 0,
COMPAT_SAMSUNG_EXYNOS_FIMD);
if (node <= 0) {
@@ -141,7 +138,6 @@ static void lcd_panel_on(vidinfo_t *vid)
&bl_en_gpio,
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
-#endif
exynos_cfg_ldo();
exynos_enable_ldo(1);
@@ -150,7 +146,6 @@ static void lcd_panel_on(vidinfo_t *vid)
exynos_mipi_dsi_init();
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
int exynos_lcd_early_init(const void *blob)
{
unsigned int node;
@@ -288,22 +283,16 @@ int exynos_lcd_early_init(const void *blob)
return 0;
}
-#endif
void lcd_ctrl_init(void *lcdbase)
{
set_system_display_ctrl();
set_lcd_clk();
-#if CONFIG_IS_ENABLED(OF_CONTROL)
#ifdef CONFIG_EXYNOS_MIPI_DSIM
exynos_init_dsim_platform_data(&panel_info);
#endif
exynos_lcd_misc_init(&panel_info);
-#else
- /* initialize parameters which is specific to panel. */
- init_panel_info(&panel_info);
-#endif
panel_width = panel_info.vl_width;
panel_height = panel_info.vl_height;
diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c
index ac001a8..019d88f 100644
--- a/drivers/video/exynos/exynos_fimd.c
+++ b/drivers/video/exynos/exynos_fimd.c
@@ -251,7 +251,6 @@ void exynos_fimd_window_off(unsigned int win_id)
writel(cfg, &fimd_ctrl->winshmap);
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
/*
* The reset value for FIMD SYSMMU register MMU_CTRL is 3
* on Exynos5420 and newer versions.
@@ -289,13 +288,11 @@ void exynos_fimd_disable_sysmmu(void)
writel(0x0, sysmmufimd);
}
}
-#endif
void exynos_fimd_lcd_init(vidinfo_t *vid)
{
unsigned int cfg = 0, rgb_mode;
unsigned int offset;
-#if CONFIG_IS_ENABLED(OF_CONTROL)
unsigned int node;
node = fdtdec_next_compatible(gd->fdt_blob,
@@ -311,10 +308,6 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu"))
exynos_fimd_disable_sysmmu();
-#else
- fimd_ctrl = (struct exynos_fb *)samsung_get_base_fimd();
-#endif
-
offset = exynos_fimd_get_base_offset();
/* store panel info to global variable */
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index b597acc..5001e16 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -28,11 +28,9 @@
DECLARE_GLOBAL_DATA_PTR;
static struct exynos_platform_mipi_dsim *dsim_pd;
-#if CONFIG_IS_ENABLED(OF_CONTROL)
static struct mipi_dsim_config dsim_config_dt;
static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
-#endif
struct mipi_dsim_ddi {
int bus_id;
@@ -249,7 +247,6 @@ void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd)
dsim_pd = pd;
}
-#if CONFIG_IS_ENABLED(OF_CONTROL)
int exynos_dsim_config_parse_dt(const void *blob)
{
int node;
@@ -334,4 +331,3 @@ void exynos_init_dsim_platform_data(vidinfo_t *vid)
dsim_pd = &dsim_platform_data_dt;
}
-#endif
diff --git a/include/exynos_lcd.h b/include/exynos_lcd.h
index 3969a6a..e1769f0 100644
--- a/include/exynos_lcd.h
+++ b/include/exynos_lcd.h
@@ -77,6 +77,4 @@ typedef struct vidinfo {
unsigned int dual_lcd_enabled;
} vidinfo_t;
-void init_panel_info(vidinfo_t *vid);
-
#endif
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 03/25] exynos: video: Remove use of vidinfo_t typedef
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 01/25] exynos: video: Move driver files into their own directory Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 02/25] exynos: video: Drop dead code Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 04/25] exynos: video: Drop the static lcd_base_addr variable Simon Glass
` (21 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
Use 'struct vidinfo' instead so that we can change this to a struct with a
different name in future.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/include/mach/mipi_dsim.h | 3 ++-
drivers/video/exynos/exynos_fb.c | 10 +++++-----
drivers/video/exynos/exynos_fimd.c | 6 +++---
drivers/video/exynos/exynos_mipi_dsi_common.c | 6 +++---
4 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/mipi_dsim.h b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
index c9e8e06..a77b5c8 100644
--- a/arch/arm/mach-exynos/include/mach/mipi_dsim.h
+++ b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
@@ -369,7 +369,8 @@ int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
*lcd_dev);
void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd);
-void exynos_init_dsim_platform_data(vidinfo_t *vid);
+struct vidinfo;
+void exynos_init_dsim_platform_data(struct vidinfo *vid);
/* panel driver init based on mipi dsi interface */
void s6e8ax0_init(void);
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 39e3ade..90d2038 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
static unsigned int panel_width, panel_height;
-vidinfo_t panel_info = {
+struct vidinfo panel_info = {
/*
* Insert a value here so that we don't end up in the BSS
* Reference: drivers/video/tegra.c
@@ -45,7 +45,7 @@ ushort *configuration_get_cmap(void)
#endif
}
-static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
+static void exynos_lcd_init_mem(void *lcdbase, struct vidinfo *vid)
{
unsigned long palette_size;
unsigned int fb_size;
@@ -58,7 +58,7 @@ static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
(unsigned long)fb_size, palette_size);
}
-static void exynos_lcd_init(vidinfo_t *vid)
+static void exynos_lcd_init(struct vidinfo *vid)
{
exynos_fimd_lcd_init(vid);
@@ -94,12 +94,12 @@ __weak void exynos_backlight_reset(void)
{
}
-__weak int exynos_lcd_misc_init(vidinfo_t *vid)
+__weak int exynos_lcd_misc_init(struct vidinfo *vid)
{
return 0;
}
-static void lcd_panel_on(vidinfo_t *vid)
+static void lcd_panel_on(struct vidinfo *vid)
{
struct gpio_desc pwm_out_gpio;
struct gpio_desc bl_en_gpio;
diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c
index 019d88f..e6fb5d1 100644
--- a/drivers/video/exynos/exynos_fimd.c
+++ b/drivers/video/exynos/exynos_fimd.c
@@ -22,7 +22,7 @@
DECLARE_GLOBAL_DATA_PTR;
static unsigned long *lcd_base_addr;
-static vidinfo_t *pvid;
+static struct vidinfo *pvid;
static struct exynos_fb *fimd_ctrl;
void exynos_fimd_lcd_init_mem(u_long screen_base, u_long fb_size,
@@ -123,7 +123,7 @@ static void exynos_fimd_set_buffer_address(unsigned int win_id)
EXYNOS_BUFFER_OFFSET(win_id));
}
-static void exynos_fimd_set_clock(vidinfo_t *pvid)
+static void exynos_fimd_set_clock(struct vidinfo *pvid)
{
unsigned int cfg = 0, div = 0, remainder, remainder_div;
unsigned long pixel_clock;
@@ -289,7 +289,7 @@ void exynos_fimd_disable_sysmmu(void)
}
}
-void exynos_fimd_lcd_init(vidinfo_t *vid)
+void exynos_fimd_lcd_init(struct vidinfo *vid)
{
unsigned int cfg = 0, rgb_mode;
unsigned int offset;
diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c
index 925d515..85c5e0d 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos/exynos_mipi_dsi_common.c
@@ -465,7 +465,7 @@ int exynos_mipi_dsi_enable_frame_done_int(struct mipi_dsim_device *dsim,
}
static void convert_to_fb_videomode(struct fb_videomode *mode1,
- vidinfo_t *mode2)
+ struct vidinfo *mode2)
{
mode1->xres = mode2->vl_width;
mode1->yres = mode2->vl_height;
@@ -482,10 +482,10 @@ int exynos_mipi_dsi_set_display_mode(struct mipi_dsim_device *dsim,
{
struct exynos_platform_mipi_dsim *dsim_pd;
struct fb_videomode lcd_video;
- vidinfo_t *vid;
+ struct vidinfo *vid;
dsim_pd = (struct exynos_platform_mipi_dsim *)dsim->pd;
- vid = (vidinfo_t *)dsim_pd->lcd_panel_info;
+ vid = (struct vidinfo *)dsim_pd->lcd_panel_info;
convert_to_fb_videomode(&lcd_video, vid);
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 04/25] exynos: video: Drop the static lcd_base_addr variable
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (2 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 03/25] exynos: video: Remove use of vidinfo_t typedef Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 05/25] exynos: video: Drop static variables in exynos_fimd.c Simon Glass
` (20 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
Drop this and use parameters instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/exynos/exynos_fb.c | 21 +++------------------
drivers/video/exynos/exynos_fb.h | 2 +-
drivers/video/exynos/exynos_fimd.c | 26 +++++++++++---------------
3 files changed, 15 insertions(+), 34 deletions(-)
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 90d2038..a3acdcc 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -45,22 +45,9 @@ ushort *configuration_get_cmap(void)
#endif
}
-static void exynos_lcd_init_mem(void *lcdbase, struct vidinfo *vid)
+static void exynos_lcd_init(struct vidinfo *vid, ulong lcd_base)
{
- unsigned long palette_size;
- unsigned int fb_size;
-
- fb_size = vid->vl_row * vid->vl_col * (NBITS(vid->vl_bpix) >> 3);
-
- palette_size = NBITS(vid->vl_bpix) == 8 ? 256 : 16;
-
- exynos_fimd_lcd_init_mem((unsigned long)lcdbase,
- (unsigned long)fb_size, palette_size);
-}
-
-static void exynos_lcd_init(struct vidinfo *vid)
-{
- exynos_fimd_lcd_init(vid);
+ exynos_fimd_lcd_init(vid, lcd_base);
/* Enable flushing after LCD writes if requested */
lcd_set_flush_dcache(1);
@@ -297,9 +284,7 @@ void lcd_ctrl_init(void *lcdbase)
panel_width = panel_info.vl_width;
panel_height = panel_info.vl_height;
- exynos_lcd_init_mem(lcdbase, &panel_info);
-
- exynos_lcd_init(&panel_info);
+ exynos_lcd_init(&panel_info, (ulong)lcdbase);
}
void lcd_enable(void)
diff --git a/drivers/video/exynos/exynos_fb.h b/drivers/video/exynos/exynos_fb.h
index 2c2f94b..833be6a 100644
--- a/drivers/video/exynos/exynos_fb.h
+++ b/drivers/video/exynos/exynos_fb.h
@@ -35,7 +35,7 @@ enum exynos_cpu_auto_cmd_rate {
void exynos_fimd_lcd_init_mem(unsigned long screen_base, unsigned long fb_size,
unsigned long palette_size);
-void exynos_fimd_lcd_init(vidinfo_t *vid);
+void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address);
unsigned long exynos_fimd_calc_fbsize(void);
#endif
diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c
index e6fb5d1..a1de9ac 100644
--- a/drivers/video/exynos/exynos_fimd.c
+++ b/drivers/video/exynos/exynos_fimd.c
@@ -21,16 +21,9 @@
DECLARE_GLOBAL_DATA_PTR;
-static unsigned long *lcd_base_addr;
static struct vidinfo *pvid;
static struct exynos_fb *fimd_ctrl;
-void exynos_fimd_lcd_init_mem(u_long screen_base, u_long fb_size,
- u_long palette_size)
-{
- lcd_base_addr = (unsigned long *)screen_base;
-}
-
static void exynos_fimd_set_dualrgb(unsigned int enabled)
{
unsigned int cfg = 0;
@@ -47,7 +40,8 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled)
writel(cfg, &fimd_ctrl->dualrgb);
}
-static void exynos_fimd_set_dp_clkcon(unsigned int enabled)
+static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid,
+ unsigned int enabled)
{
unsigned int cfg = 0;
@@ -57,7 +51,7 @@ static void exynos_fimd_set_dp_clkcon(unsigned int enabled)
writel(cfg, &fimd_ctrl->dp_mie_clkcon);
}
-static void exynos_fimd_set_par(unsigned int win_id)
+static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id)
{
unsigned int cfg = 0;
@@ -109,11 +103,13 @@ static void exynos_fimd_set_par(unsigned int win_id)
EXYNOS_VIDOSD(win_id));
}
-static void exynos_fimd_set_buffer_address(unsigned int win_id)
+static void exynos_fimd_set_buffer_address(struct vidinfo *pvid,
+ unsigned int win_id,
+ ulong lcd_base_addr)
{
unsigned long start_addr, end_addr;
- start_addr = (unsigned long)lcd_base_addr;
+ start_addr = lcd_base_addr;
end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) *
pvid->vl_row);
@@ -289,7 +285,7 @@ void exynos_fimd_disable_sysmmu(void)
}
}
-void exynos_fimd_lcd_init(struct vidinfo *vid)
+void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address)
{
unsigned int cfg = 0, rgb_mode;
unsigned int offset;
@@ -367,10 +363,10 @@ void exynos_fimd_lcd_init(struct vidinfo *vid)
writel(cfg, &fimd_ctrl->vidcon0);
/* set par */
- exynos_fimd_set_par(pvid->win_id);
+ exynos_fimd_set_par(pvid, pvid->win_id);
/* set memory address */
- exynos_fimd_set_buffer_address(pvid->win_id);
+ exynos_fimd_set_buffer_address(pvid, pvid->win_id, lcd_base_address);
/* set buffer size */
cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * NBITS(pvid->vl_bpix) / 8) |
@@ -393,7 +389,7 @@ void exynos_fimd_lcd_init(struct vidinfo *vid)
/* window on */
exynos_fimd_window_on(pvid->win_id);
- exynos_fimd_set_dp_clkcon(pvid->dp_enabled);
+ exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled);
}
unsigned long exynos_fimd_calc_fbsize(void)
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 05/25] exynos: video: Drop static variables in exynos_fimd.c
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (3 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 04/25] exynos: video: Drop the static lcd_base_addr variable Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 06/25] exynos: video: Drop static variables in exynos_fb.c Simon Glass
` (19 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
Drop these and use parameters instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/exynos/exynos_fb.h | 2 +-
drivers/video/exynos/exynos_fimd.c | 51 ++++++++++++++++++++++----------------
include/exynos_lcd.h | 1 +
3 files changed, 31 insertions(+), 23 deletions(-)
diff --git a/drivers/video/exynos/exynos_fb.h b/drivers/video/exynos/exynos_fb.h
index 833be6a..f59cce0 100644
--- a/drivers/video/exynos/exynos_fb.h
+++ b/drivers/video/exynos/exynos_fb.h
@@ -36,6 +36,6 @@ enum exynos_cpu_auto_cmd_rate {
void exynos_fimd_lcd_init_mem(unsigned long screen_base, unsigned long fb_size,
unsigned long palette_size);
void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address);
-unsigned long exynos_fimd_calc_fbsize(void);
+unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid);
#endif
diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c
index a1de9ac..039d4c5 100644
--- a/drivers/video/exynos/exynos_fimd.c
+++ b/drivers/video/exynos/exynos_fimd.c
@@ -21,11 +21,9 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct vidinfo *pvid;
-static struct exynos_fb *fimd_ctrl;
-
-static void exynos_fimd_set_dualrgb(unsigned int enabled)
+static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
if (enabled) {
@@ -43,6 +41,7 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled)
static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid,
unsigned int enabled)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
if (enabled)
@@ -53,6 +52,7 @@ static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid,
static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
/* set window control */
@@ -107,6 +107,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *pvid,
unsigned int win_id,
ulong lcd_base_addr)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned long start_addr, end_addr;
start_addr = lcd_base_addr;
@@ -121,6 +122,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *pvid,
static void exynos_fimd_set_clock(struct vidinfo *pvid)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0, div = 0, remainder, remainder_div;
unsigned long pixel_clock;
unsigned long long src_clock;
@@ -172,8 +174,9 @@ static void exynos_fimd_set_clock(struct vidinfo *pvid)
writel(cfg, &fimd_ctrl->vidcon0);
}
-void exynos_set_trigger(void)
+void exynos_set_trigger(struct vidinfo *pvid)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
cfg = readl(&fimd_ctrl->trigcon);
@@ -183,8 +186,9 @@ void exynos_set_trigger(void)
writel(cfg, &fimd_ctrl->trigcon);
}
-int exynos_is_i80_frame_done(void)
+int exynos_is_i80_frame_done(struct vidinfo *pvid)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
int status;
@@ -197,8 +201,9 @@ int exynos_is_i80_frame_done(void)
return status;
}
-static void exynos_fimd_lcd_on(void)
+static void exynos_fimd_lcd_on(struct vidinfo *pvid)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
/* display on */
@@ -207,8 +212,9 @@ static void exynos_fimd_lcd_on(void)
writel(cfg, &fimd_ctrl->vidcon0);
}
-static void exynos_fimd_window_on(unsigned int win_id)
+static void exynos_fimd_window_on(struct vidinfo *pvid, unsigned int win_id)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
/* enable window */
@@ -223,8 +229,9 @@ static void exynos_fimd_window_on(unsigned int win_id)
writel(cfg, &fimd_ctrl->winshmap);
}
-void exynos_fimd_lcd_off(void)
+void exynos_fimd_lcd_off(struct vidinfo *pvid)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
cfg = readl(&fimd_ctrl->vidcon0);
@@ -232,8 +239,9 @@ void exynos_fimd_lcd_off(void)
writel(cfg, &fimd_ctrl->vidcon0);
}
-void exynos_fimd_window_off(unsigned int win_id)
+void exynos_fimd_window_off(struct vidinfo *pvid, unsigned int win_id)
{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
unsigned int cfg = 0;
cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
@@ -285,8 +293,9 @@ void exynos_fimd_disable_sysmmu(void)
}
}
-void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address)
+void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address)
{
+ struct exynos_fb *fimd_ctrl;
unsigned int cfg = 0, rgb_mode;
unsigned int offset;
unsigned int node;
@@ -296,22 +305,20 @@ void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address)
if (node <= 0)
debug("exynos_fb: Can't get device node for fimd\n");
- fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob,
- node, "reg");
+ fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node,
+ "reg");
if (fimd_ctrl == NULL)
debug("Can't get the FIMD base address\n");
+ pvid->fimd_ctrl = fimd_ctrl;
if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu"))
exynos_fimd_disable_sysmmu();
offset = exynos_fimd_get_base_offset();
- /* store panel info to global variable */
- pvid = vid;
-
- rgb_mode = vid->rgb_mode;
+ rgb_mode = pvid->rgb_mode;
- if (vid->interface_mode == FIMD_RGB_INTERFACE) {
+ if (pvid->interface_mode == FIMD_RGB_INTERFACE) {
cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
writel(cfg, &fimd_ctrl->vidcon0);
@@ -381,18 +388,18 @@ void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address)
exynos_fimd_set_clock(pvid);
/* set rgb mode to dual lcd. */
- exynos_fimd_set_dualrgb(pvid->dual_lcd_enabled);
+ exynos_fimd_set_dualrgb(pvid, pvid->dual_lcd_enabled);
/* display on */
- exynos_fimd_lcd_on();
+ exynos_fimd_lcd_on(pvid);
/* window on */
- exynos_fimd_window_on(pvid->win_id);
+ exynos_fimd_window_on(pvid, pvid->win_id);
exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled);
}
-unsigned long exynos_fimd_calc_fbsize(void)
+unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid)
{
return pvid->vl_col * pvid->vl_row * (NBITS(pvid->vl_bpix) / 8);
}
diff --git a/include/exynos_lcd.h b/include/exynos_lcd.h
index e1769f0..1f6c6c7 100644
--- a/include/exynos_lcd.h
+++ b/include/exynos_lcd.h
@@ -75,6 +75,7 @@ typedef struct vidinfo {
unsigned int sclk_div;
unsigned int dual_lcd_enabled;
+ struct exynos_fb *fimd_ctrl;
} vidinfo_t;
#endif
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 06/25] exynos: video: Drop static variables in exynos_fb.c
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (4 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 05/25] exynos: video: Drop static variables in exynos_fimd.c Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 07/25] exynos: video: Drop static variables in exynos_dp_lowlevel.c Simon Glass
` (18 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
Drop these and use the existing variables instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/exynos/exynos_fb.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index a3acdcc..abc6091 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -26,8 +26,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static unsigned int panel_width, panel_height;
-
struct vidinfo panel_info = {
/*
* Insert a value here so that we don't end up in the BSS
@@ -281,16 +279,14 @@ void lcd_ctrl_init(void *lcdbase)
#endif
exynos_lcd_misc_init(&panel_info);
- panel_width = panel_info.vl_width;
- panel_height = panel_info.vl_height;
-
exynos_lcd_init(&panel_info, (ulong)lcdbase);
}
void lcd_enable(void)
{
if (panel_info.logo_on) {
- memset((void *) gd->fb_base, 0, panel_width * panel_height *
+ memset((void *)gd->fb_base, 0,
+ panel_info.vl_width * panel_info.vl_height *
(NBITS(panel_info.vl_bpix) >> 3));
}
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 07/25] exynos: video: Drop static variables in exynos_dp_lowlevel.c
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (5 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 06/25] exynos: video: Drop static variables in exynos_fb.c Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 08/25] exynos: video: Move dsim_config_dt into a function Simon Glass
` (17 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
Drop these and use parameters instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/exynos/exynos_dp.c | 310 +++++++++++++++++-------------
drivers/video/exynos/exynos_dp_lowlevel.c | 195 ++++++++++---------
drivers/video/exynos/exynos_dp_lowlevel.h | 131 +++++++------
3 files changed, 351 insertions(+), 285 deletions(-)
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 5b6fc14..0319d99 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -38,20 +38,20 @@ static void exynos_dp_disp_info(struct edp_disp_info *disp_info)
return;
}
-static int exynos_dp_init_dp(void)
+static int exynos_dp_init_dp(struct exynos_dp *dp_regs)
{
int ret;
- exynos_dp_reset();
+ exynos_dp_reset(dp_regs);
/* SW defined function Normal operation */
- exynos_dp_enable_sw_func(DP_ENABLE);
+ exynos_dp_enable_sw_func(dp_regs, DP_ENABLE);
- ret = exynos_dp_init_analog_func();
+ ret = exynos_dp_init_analog_func(dp_regs);
if (ret != EXYNOS_DP_SUCCESS)
return ret;
- exynos_dp_init_hpd();
- exynos_dp_init_aux();
+ exynos_dp_init_hpd(dp_regs);
+ exynos_dp_init_aux(dp_regs);
return ret;
}
@@ -67,7 +67,7 @@ static unsigned char exynos_dp_calc_edid_check_sum(unsigned char *edid_data)
return sum;
}
-static unsigned int exynos_dp_read_edid(void)
+static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
{
unsigned char edid[EDID_BLOCK_LENGTH * 2];
unsigned int extend_block = 0;
@@ -82,14 +82,15 @@ static unsigned int exynos_dp_read_edid(void)
*/
/* Read Extension Flag, Number of 128-byte EDID extension blocks */
- exynos_dp_read_byte_from_i2c(I2C_EDID_DEVICE_ADDR, EDID_EXTENSION_FLAG,
- &extend_block);
+ exynos_dp_read_byte_from_i2c(dp_regs, I2C_EDID_DEVICE_ADDR,
+ EDID_EXTENSION_FLAG, &extend_block);
if (extend_block > 0) {
printf("DP EDID data includes a single extension!\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(I2C_EDID_DEVICE_ADDR,
+ retval = exynos_dp_read_bytes_from_i2c(dp_regs,
+ I2C_EDID_DEVICE_ADDR,
EDID_HEADER_PATTERN,
EDID_BLOCK_LENGTH,
&edid[EDID_HEADER_PATTERN]);
@@ -104,7 +105,8 @@ static unsigned int exynos_dp_read_edid(void)
}
/* Read additional EDID data */
- retval = exynos_dp_read_bytes_from_i2c(I2C_EDID_DEVICE_ADDR,
+ retval = exynos_dp_read_bytes_from_i2c(dp_regs,
+ I2C_EDID_DEVICE_ADDR,
EDID_BLOCK_LENGTH,
EDID_BLOCK_LENGTH,
&edid[EDID_BLOCK_LENGTH]);
@@ -118,19 +120,22 @@ static unsigned int exynos_dp_read_edid(void)
return -1;
}
- exynos_dp_read_byte_from_dpcd(DPCD_TEST_REQUEST,
- &test_vector);
+ exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST,
+ &test_vector);
if (test_vector & DPCD_TEST_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(DPCD_TEST_EDID_CHECKSUM,
+ exynos_dp_write_byte_to_dpcd(dp_regs,
+ DPCD_TEST_EDID_CHECKSUM,
edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(DPCD_TEST_RESPONSE,
+ exynos_dp_write_byte_to_dpcd(dp_regs,
+ DPCD_TEST_RESPONSE,
DPCD_TEST_EDID_CHECKSUM_WRITE);
}
} else {
debug("DP EDID data does not include any extensions.\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(I2C_EDID_DEVICE_ADDR,
+ retval = exynos_dp_read_bytes_from_i2c(dp_regs,
+ I2C_EDID_DEVICE_ADDR,
EDID_HEADER_PATTERN,
EDID_BLOCK_LENGTH,
&edid[EDID_HEADER_PATTERN]);
@@ -145,12 +150,13 @@ static unsigned int exynos_dp_read_edid(void)
return -1;
}
- exynos_dp_read_byte_from_dpcd(DPCD_TEST_REQUEST,
+ exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST,
&test_vector);
if (test_vector & DPCD_TEST_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(DPCD_TEST_EDID_CHECKSUM,
- edid[EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(DPCD_TEST_RESPONSE,
+ exynos_dp_write_byte_to_dpcd(dp_regs,
+ DPCD_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]);
+ exynos_dp_write_byte_to_dpcd(dp_regs,
+ DPCD_TEST_RESPONSE,
DPCD_TEST_EDID_CHECKSUM_WRITE);
}
}
@@ -160,7 +166,8 @@ static unsigned int exynos_dp_read_edid(void)
return 0;
}
-static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info)
+static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
unsigned char buf[12];
unsigned int ret;
@@ -178,8 +185,8 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info)
retry_cnt = 5;
while (retry_cnt) {
/* Read DPCD 0x0000-0x000b */
- ret = exynos_dp_read_bytes_from_dpcd(DPCD_DPCD_REV, 12,
- buf);
+ ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_DPCD_REV, 12,
+ buf);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
printf("DP read_byte_from_dpcd() failed\n");
@@ -227,7 +234,7 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info)
return -EINVAL;
}
- ret = exynos_dp_read_edid();
+ ret = exynos_dp_read_edid(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP exynos_dp_read_edid() failed\n");
return -EINVAL;
@@ -236,19 +243,20 @@ static unsigned int exynos_dp_handle_edid(struct edp_device_info *edp_info)
return ret;
}
-static void exynos_dp_init_training(void)
+static void exynos_dp_init_training(struct exynos_dp *dp_regs)
{
/*
* MACRO_RST must be applied after the PLL_LOCK to avoid
* the DP inter pair skew issue for at least 10 us
*/
- exynos_dp_reset_macro();
+ exynos_dp_reset_macro(dp_regs);
/* All DP analog module power up */
- exynos_dp_set_analog_power_down(POWER_ALL, 0);
+ exynos_dp_set_analog_power_down(dp_regs, POWER_ALL, 0);
}
-static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info)
+static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
unsigned char buf[5];
unsigned int ret = 0;
@@ -263,33 +271,32 @@ static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info)
edp_info->lt_info.cr_loop[3] = 0;
/* Set sink to D0 (Sink Not Ready) mode. */
- ret = exynos_dp_write_byte_to_dpcd(DPCD_SINK_POWER_STATE,
- DPCD_SET_POWER_STATE_D0);
+ ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_SINK_POWER_STATE,
+ DPCD_SET_POWER_STATE_D0);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_dpcd_byte failed\n");
return ret;
}
/* Set link rate and count as you want to establish*/
- exynos_dp_set_link_bandwidth(edp_info->lane_bw);
- exynos_dp_set_lane_count(edp_info->lane_cnt);
+ exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw);
+ exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt);
/* Setup RX configuration */
buf[0] = edp_info->lane_bw;
buf[1] = edp_info->lane_cnt;
- ret = exynos_dp_write_bytes_to_dpcd(DPCD_LINK_BW_SET, 2,
- buf);
+ ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_LINK_BW_SET, 2, buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_dpcd_byte failed\n");
return ret;
}
- exynos_dp_set_lane_pre_emphasis(PRE_EMPHASIS_LEVEL_0,
+ exynos_dp_set_lane_pre_emphasis(dp_regs, PRE_EMPHASIS_LEVEL_0,
edp_info->lane_cnt);
/* Set training pattern 1 */
- exynos_dp_set_training_pattern(TRAINING_PTN1);
+ exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN1);
/* Set RX training pattern */
buf[0] = DPCD_SCRAMBLING_DISABLED | DPCD_TRAINING_PATTERN_1;
@@ -303,8 +310,8 @@ static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info)
buf[4] = DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0 |
DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0;
- ret = exynos_dp_write_bytes_to_dpcd(DPCD_TRAINING_PATTERN_SET,
- 5, buf);
+ ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
+ 5, buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_dpcd_byte failed\n");
return ret;
@@ -313,14 +320,14 @@ static unsigned int exynos_dp_link_start(struct edp_device_info *edp_info)
return ret;
}
-static unsigned int exynos_dp_training_pattern_dis(void)
+static unsigned int exynos_dp_training_pattern_dis(struct exynos_dp *dp_regs)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
- exynos_dp_set_training_pattern(DP_NONE);
+ exynos_dp_set_training_pattern(dp_regs, DP_NONE);
- ret = exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET,
- DPCD_TRAINING_PATTERN_DISABLED);
+ ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
+ DPCD_TRAINING_PATTERN_DISABLED);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP requst_link_traninig_req failed\n");
return -EAGAIN;
@@ -329,13 +336,14 @@ static unsigned int exynos_dp_training_pattern_dis(void)
return ret;
}
-static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable)
+static unsigned int exynos_dp_enable_rx_to_enhanced_mode(
+ struct exynos_dp *dp_regs, unsigned char enable)
{
unsigned char data;
unsigned int ret = EXYNOS_DP_SUCCESS;
- ret = exynos_dp_read_byte_from_dpcd(DPCD_LANE_COUNT_SET,
- &data);
+ ret = exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_LANE_COUNT_SET,
+ &data);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read_from_dpcd failed\n");
return -EAGAIN;
@@ -346,8 +354,7 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable)
else
data = DPCD_LN_COUNT_SET(data);
- ret = exynos_dp_write_byte_to_dpcd(DPCD_LANE_COUNT_SET,
- data);
+ ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_LANE_COUNT_SET, data);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_to_dpcd failed\n");
return -EAGAIN;
@@ -357,23 +364,25 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(unsigned char enable)
return ret;
}
-static unsigned int exynos_dp_set_enhanced_mode(unsigned char enhance_mode)
+static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *dp_regs,
+ unsigned char enhance_mode)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
- ret = exynos_dp_enable_rx_to_enhanced_mode(enhance_mode);
+ ret = exynos_dp_enable_rx_to_enhanced_mode(dp_regs, enhance_mode);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP rx_enhance_mode failed\n");
return -EAGAIN;
}
- exynos_dp_enable_enhanced_mode(enhance_mode);
+ exynos_dp_enable_enhanced_mode(dp_regs, enhance_mode);
return ret;
}
-static int exynos_dp_read_dpcd_lane_stat(struct edp_device_info *edp_info,
- unsigned char *status)
+static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info,
+ unsigned char *status)
{
unsigned int ret, i;
unsigned char buf[2];
@@ -385,7 +394,8 @@ static int exynos_dp_read_dpcd_lane_stat(struct edp_device_info *edp_info,
shift_val[2] = 0;
shift_val[3] = 4;
- ret = exynos_dp_read_bytes_from_dpcd(DPCD_LANE0_1_STATUS, 2, buf);
+ ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_LANE0_1_STATUS, 2,
+ buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read lane status failed\n");
return ret;
@@ -404,8 +414,8 @@ static int exynos_dp_read_dpcd_lane_stat(struct edp_device_info *edp_info,
return ret;
}
-static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num,
- unsigned char *sw, unsigned char *em)
+static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs,
+ unsigned char lane_num, unsigned char *sw, unsigned char *em)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
unsigned char buf;
@@ -415,7 +425,7 @@ static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num,
/*lane_num value is used as arry index, so this range 0 ~ 3 */
dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2);
- ret = exynos_dp_read_byte_from_dpcd(dpcd_addr, &buf);
+ ret = exynos_dp_read_byte_from_dpcd(dp_regs, dpcd_addr, &buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read adjust request failed\n");
return -EAGAIN;
@@ -427,17 +437,18 @@ static unsigned int exynos_dp_read_dpcd_adj_req(unsigned char lane_num,
return ret;
}
-static int exynos_dp_equalizer_err_link(struct edp_device_info *edp_info)
+static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
int ret;
- ret = exynos_dp_training_pattern_dis();
+ ret = exynos_dp_training_pattern_dis(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP training_patter_disable() failed\n");
edp_info->lt_info.lt_status = DP_LT_FAIL;
}
- ret = exynos_dp_set_enhanced_mode(edp_info->dpcd_efc);
+ ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP set_enhanced_mode() failed\n");
edp_info->lt_info.lt_status = DP_LT_FAIL;
@@ -446,7 +457,8 @@ static int exynos_dp_equalizer_err_link(struct edp_device_info *edp_info)
return ret;
}
-static int exynos_dp_reduce_link_rate(struct edp_device_info *edp_info)
+static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
int ret;
@@ -456,11 +468,11 @@ static int exynos_dp_reduce_link_rate(struct edp_device_info *edp_info)
edp_info->lt_info.lt_status = DP_LT_START;
ret = EXYNOS_DP_SUCCESS;
} else {
- ret = exynos_dp_training_pattern_dis();
+ ret = exynos_dp_training_pattern_dis(dp_regs);
if (ret != EXYNOS_DP_SUCCESS)
printf("DP training_patter_disable() failed\n");
- ret = exynos_dp_set_enhanced_mode(edp_info->dpcd_efc);
+ ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc);
if (ret != EXYNOS_DP_SUCCESS)
printf("DP set_enhanced_mode() failed\n");
@@ -470,8 +482,8 @@ static int exynos_dp_reduce_link_rate(struct edp_device_info *edp_info)
return ret;
}
-static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
- *edp_info)
+static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
unsigned char lane_stat;
@@ -484,7 +496,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
debug("DP: %s was called\n", __func__);
mdelay(1);
- ret = exynos_dp_read_dpcd_lane_stat(edp_info, &lane_stat);
+ ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read lane status failed\n");
edp_info->lt_info.lt_status = DP_LT_FAIL;
@@ -493,11 +505,11 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
if (lane_stat & DP_LANE_STAT_CR_DONE) {
debug("DP clock Recovery training succeed\n");
- exynos_dp_set_training_pattern(TRAINING_PTN2);
+ exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN2);
for (i = 0; i < edp_info->lane_cnt; i++) {
- ret = exynos_dp_read_dpcd_adj_req(i, &adj_req_sw,
- &adj_req_em);
+ ret = exynos_dp_read_dpcd_adj_req(dp_regs, i,
+ &adj_req_sw, &adj_req_em);
if (ret != EXYNOS_DP_SUCCESS) {
edp_info->lt_info.lt_status = DP_LT_FAIL;
return ret;
@@ -511,7 +523,8 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 |
MAX_PRE_EMPHASIS_REACH_3;
}
- exynos_dp_set_lanex_pre_emphasis(lt_ctl_val[i], i);
+ exynos_dp_set_lanex_pre_emphasis(dp_regs,
+ lt_ctl_val[i], i);
}
buf[0] = DPCD_SCRAMBLING_DISABLED | DPCD_TRAINING_PATTERN_2;
@@ -520,7 +533,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
buf[3] = lt_ctl_val[2];
buf[4] = lt_ctl_val[3];
- ret = exynos_dp_write_bytes_to_dpcd(
+ ret = exynos_dp_write_bytes_to_dpcd(dp_regs,
DPCD_TRAINING_PATTERN_SET, 5, buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write traning pattern1 failed\n");
@@ -530,8 +543,9 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
edp_info->lt_info.lt_status = DP_LT_ET;
} else {
for (i = 0; i < edp_info->lane_cnt; i++) {
- lt_ctl_val[i] = exynos_dp_get_lanex_pre_emphasis(i);
- ret = exynos_dp_read_dpcd_adj_req(i,
+ lt_ctl_val[i] = exynos_dp_get_lanex_pre_emphasis(
+ dp_regs, i);
+ ret = exynos_dp_read_dpcd_adj_req(dp_regs, i,
&adj_req_sw, &adj_req_em);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read adj req failed\n");
@@ -541,7 +555,8 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
if ((adj_req_sw == VOLTAGE_LEVEL_3) ||
(adj_req_em == PRE_EMPHASIS_LEVEL_3))
- ret = exynos_dp_reduce_link_rate(edp_info);
+ ret = exynos_dp_reduce_link_rate(dp_regs,
+ edp_info);
if ((DRIVE_CURRENT_SET_0_GET(lt_ctl_val[i]) ==
adj_req_sw) &&
@@ -550,7 +565,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
edp_info->lt_info.cr_loop[i]++;
if (edp_info->lt_info.cr_loop[i] == MAX_CR_LOOP)
ret = exynos_dp_reduce_link_rate(
- edp_info);
+ dp_regs, edp_info);
}
lt_ctl_val[i] = 0;
@@ -561,10 +576,11 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 |
MAX_PRE_EMPHASIS_REACH_3;
}
- exynos_dp_set_lanex_pre_emphasis(lt_ctl_val[i], i);
+ exynos_dp_set_lanex_pre_emphasis(dp_regs,
+ lt_ctl_val[i], i);
}
- ret = exynos_dp_write_bytes_to_dpcd(
+ ret = exynos_dp_write_bytes_to_dpcd(dp_regs,
DPCD_TRAINING_LANE0_SET, 4, lt_ctl_val);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write traning pattern2 failed\n");
@@ -576,8 +592,8 @@ static unsigned int exynos_dp_process_clock_recovery(struct edp_device_info
return ret;
}
-static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info
- *edp_info)
+static unsigned int exynos_dp_process_equalizer_training(
+ struct exynos_dp *dp_regs, struct edp_device_info *edp_info)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
unsigned char lane_stat, adj_req_sw, adj_req_em, i;
@@ -589,7 +605,7 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info
mdelay(1);
- ret = exynos_dp_read_dpcd_lane_stat(edp_info, &lane_stat);
+ ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read lane status failed\n");
edp_info->lt_info.lt_status = DP_LT_FAIL;
@@ -599,8 +615,9 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info
debug("DP lane stat : %x\n", lane_stat);
if (lane_stat & DP_LANE_STAT_CR_DONE) {
- ret = exynos_dp_read_byte_from_dpcd(DPCD_LN_ALIGN_UPDATED,
- &sink_stat);
+ ret = exynos_dp_read_byte_from_dpcd(dp_regs,
+ DPCD_LN_ALIGN_UPDATED,
+ &sink_stat);
if (ret != EXYNOS_DP_SUCCESS) {
edp_info->lt_info.lt_status = DP_LT_FAIL;
@@ -610,7 +627,7 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info
interlane_aligned = (sink_stat & DPCD_INTERLANE_ALIGN_DONE);
for (i = 0; i < edp_info->lane_cnt; i++) {
- ret = exynos_dp_read_dpcd_adj_req(i,
+ ret = exynos_dp_read_dpcd_adj_req(dp_regs, i,
&adj_req_sw, &adj_req_em);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read adj req 1 failed\n");
@@ -634,15 +651,15 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info
&& (interlane_aligned == DPCD_INTERLANE_ALIGN_DONE)) {
debug("DP Equalizer training succeed\n");
- f_bw = exynos_dp_get_link_bandwidth();
- f_lane_cnt = exynos_dp_get_lane_count();
+ f_bw = exynos_dp_get_link_bandwidth(dp_regs);
+ f_lane_cnt = exynos_dp_get_lane_count(dp_regs);
debug("DP final BandWidth : %x\n", f_bw);
debug("DP final Lane Count : %x\n", f_lane_cnt);
edp_info->lt_info.lt_status = DP_LT_FINISHED;
- exynos_dp_equalizer_err_link(edp_info);
+ exynos_dp_equalizer_err_link(dp_regs, edp_info);
} else {
edp_info->lt_info.ep_loop++;
@@ -650,46 +667,49 @@ static unsigned int exynos_dp_process_equalizer_training(struct edp_device_info
if (edp_info->lt_info.ep_loop > MAX_EQ_LOOP) {
if (edp_info->lane_bw == DP_LANE_BW_2_70) {
ret = exynos_dp_reduce_link_rate(
- edp_info);
+ dp_regs, edp_info);
} else {
edp_info->lt_info.lt_status =
DP_LT_FAIL;
- exynos_dp_equalizer_err_link(edp_info);
+ exynos_dp_equalizer_err_link(dp_regs,
+ edp_info);
}
} else {
for (i = 0; i < edp_info->lane_cnt; i++)
exynos_dp_set_lanex_pre_emphasis(
- lt_ctl_val[i], i);
+ dp_regs, lt_ctl_val[i], i);
- ret = exynos_dp_write_bytes_to_dpcd(
- DPCD_TRAINING_LANE0_SET,
- 4, lt_ctl_val);
+ ret = exynos_dp_write_bytes_to_dpcd(dp_regs,
+ DPCD_TRAINING_LANE0_SET,
+ 4, lt_ctl_val);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP set lt pattern failed\n");
edp_info->lt_info.lt_status =
DP_LT_FAIL;
- exynos_dp_equalizer_err_link(edp_info);
+ exynos_dp_equalizer_err_link(dp_regs,
+ edp_info);
}
}
}
} else if (edp_info->lane_bw == DP_LANE_BW_2_70) {
- ret = exynos_dp_reduce_link_rate(edp_info);
+ ret = exynos_dp_reduce_link_rate(dp_regs, edp_info);
} else {
edp_info->lt_info.lt_status = DP_LT_FAIL;
- exynos_dp_equalizer_err_link(edp_info);
+ exynos_dp_equalizer_err_link(dp_regs, edp_info);
}
return ret;
}
-static unsigned int exynos_dp_sw_link_training(struct edp_device_info *edp_info)
+static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
unsigned int ret = 0;
int training_finished;
/* Turn off unnecessary lane */
if (edp_info->lane_cnt == 1)
- exynos_dp_set_analog_power_down(CH1_BLOCK, 1);
+ exynos_dp_set_analog_power_down(dp_regs, CH1_BLOCK, 1);
training_finished = 0;
@@ -699,21 +719,23 @@ static unsigned int exynos_dp_sw_link_training(struct edp_device_info *edp_info)
while (!training_finished) {
switch (edp_info->lt_info.lt_status) {
case DP_LT_START:
- ret = exynos_dp_link_start(edp_info);
+ ret = exynos_dp_link_start(dp_regs, edp_info);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP LT:link start failed\n");
return ret;
}
break;
case DP_LT_CR:
- ret = exynos_dp_process_clock_recovery(edp_info);
+ ret = exynos_dp_process_clock_recovery(dp_regs,
+ edp_info);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP LT:clock recovery failed\n");
return ret;
}
break;
case DP_LT_ET:
- ret = exynos_dp_process_equalizer_training(edp_info);
+ ret = exynos_dp_process_equalizer_training(dp_regs,
+ edp_info);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP LT:equalizer training failed\n");
return ret;
@@ -730,40 +752,43 @@ static unsigned int exynos_dp_sw_link_training(struct edp_device_info *edp_info)
return ret;
}
-static unsigned int exynos_dp_set_link_train(struct edp_device_info *edp_info)
+static unsigned int exynos_dp_set_link_train(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
unsigned int ret;
- exynos_dp_init_training();
+ exynos_dp_init_training(dp_regs);
- ret = exynos_dp_sw_link_training(edp_info);
+ ret = exynos_dp_sw_link_training(dp_regs, edp_info);
if (ret != EXYNOS_DP_SUCCESS)
printf("DP dp_sw_link_traning() failed\n");
return ret;
}
-static void exynos_dp_enable_scramble(unsigned int enable)
+static void exynos_dp_enable_scramble(struct exynos_dp *dp_regs,
+ unsigned int enable)
{
unsigned char data;
if (enable) {
- exynos_dp_enable_scrambling(DP_ENABLE);
+ exynos_dp_enable_scrambling(dp_regs, DP_ENABLE);
- exynos_dp_read_byte_from_dpcd(DPCD_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET,
+ exynos_dp_read_byte_from_dpcd(dp_regs,
+ DPCD_TRAINING_PATTERN_SET, &data);
+ exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
(u8)(data & ~DPCD_SCRAMBLING_DISABLED));
} else {
- exynos_dp_enable_scrambling(DP_DISABLE);
- exynos_dp_read_byte_from_dpcd(DPCD_TRAINING_PATTERN_SET,
- &data);
- exynos_dp_write_byte_to_dpcd(DPCD_TRAINING_PATTERN_SET,
+ exynos_dp_enable_scrambling(dp_regs, DP_DISABLE);
+ exynos_dp_read_byte_from_dpcd(dp_regs,
+ DPCD_TRAINING_PATTERN_SET, &data);
+ exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
(u8)(data | DPCD_SCRAMBLING_DISABLED));
}
}
-static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
+static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
unsigned int ret = 0;
unsigned int retry_cnt;
@@ -775,17 +800,18 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
return -ENODEV;
} else {
/* debug slave */
- exynos_dp_config_video_slave_mode(&edp_info->video_info);
+ exynos_dp_config_video_slave_mode(dp_regs,
+ &edp_info->video_info);
}
- exynos_dp_set_video_color_format(&edp_info->video_info);
+ exynos_dp_set_video_color_format(dp_regs, &edp_info->video_info);
if (edp_info->video_info.bist_mode) {
- if (exynos_dp_config_video_bist(edp_info) != 0)
+ if (exynos_dp_config_video_bist(dp_regs, edp_info) != 0)
return -1;
}
- ret = exynos_dp_get_pll_lock_status();
+ ret = exynos_dp_get_pll_lock_status(dp_regs);
if (ret != PLL_LOCKED) {
printf("DP PLL is not locked yet\n");
return -EIO;
@@ -794,7 +820,7 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
if (edp_info->video_info.master_mode == 0) {
retry_cnt = 10;
while (retry_cnt) {
- ret = exynos_dp_is_slave_video_stream_clock_on();
+ ret = exynos_dp_is_slave_video_stream_clock_on(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
printf("DP stream_clock_on failed\n");
@@ -808,32 +834,34 @@ static unsigned int exynos_dp_config_video(struct edp_device_info *edp_info)
}
/* Set to use the register calculated M/N video */
- exynos_dp_set_video_cr_mn(CALCULATED_M, 0, 0);
+ exynos_dp_set_video_cr_mn(dp_regs, CALCULATED_M, 0, 0);
/* For video bist, Video timing must be generated by register */
- exynos_dp_set_video_timing_mode(VIDEO_TIMING_FROM_CAPTURE);
+ exynos_dp_set_video_timing_mode(dp_regs, VIDEO_TIMING_FROM_CAPTURE);
/* Enable video bist */
if (edp_info->video_info.bist_pattern != COLOR_RAMP &&
edp_info->video_info.bist_pattern != BALCK_WHITE_V_LINES &&
edp_info->video_info.bist_pattern != COLOR_SQUARE)
- exynos_dp_enable_video_bist(edp_info->video_info.bist_mode);
+ exynos_dp_enable_video_bist(dp_regs,
+ edp_info->video_info.bist_mode);
else
- exynos_dp_enable_video_bist(DP_DISABLE);
+ exynos_dp_enable_video_bist(dp_regs, DP_DISABLE);
/* Disable video mute */
- exynos_dp_enable_video_mute(DP_DISABLE);
+ exynos_dp_enable_video_mute(dp_regs, DP_DISABLE);
/* Configure video Master or Slave mode */
- exynos_dp_enable_video_master(edp_info->video_info.master_mode);
+ exynos_dp_enable_video_master(dp_regs,
+ edp_info->video_info.master_mode);
/* Enable video */
- exynos_dp_start_video();
+ exynos_dp_start_video(dp_regs);
if (edp_info->video_info.master_mode == 0) {
retry_cnt = 100;
while (retry_cnt) {
- ret = exynos_dp_is_video_stream_on();
+ ret = exynos_dp_is_video_stream_on(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
printf("DP Timeout of video stream\n");
@@ -907,6 +935,8 @@ unsigned int exynos_init_dp(void)
{
unsigned int ret;
struct edp_device_info *edp_info;
+ struct exynos_dp *dp_regs;
+ int node;
edp_info = kzalloc(sizeof(struct edp_device_info), GFP_KERNEL);
if (!edp_info) {
@@ -917,39 +947,47 @@ unsigned int exynos_init_dp(void)
if (exynos_dp_parse_dt(gd->fdt_blob, edp_info))
debug("unable to parse DP DT node\n");
- exynos_dp_set_base_addr();
+ node = fdtdec_next_compatible(gd->fdt_blob, 0,
+ COMPAT_SAMSUNG_EXYNOS5_DP);
+ if (node <= 0)
+ debug("exynos_dp: Can't get device node for dp\n");
+
+ dp_regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, node,
+ "reg");
+ if (dp_regs == NULL)
+ debug("Can't get the DP base address\n");
exynos_dp_disp_info(&edp_info->disp_info);
exynos_set_dp_phy(1);
- ret = exynos_dp_init_dp();
+ ret = exynos_dp_init_dp(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP exynos_dp_init_dp() failed\n");
return ret;
}
- ret = exynos_dp_handle_edid(edp_info);
+ ret = exynos_dp_handle_edid(dp_regs, edp_info);
if (ret != EXYNOS_DP_SUCCESS) {
printf("EDP handle_edid fail\n");
return ret;
}
- ret = exynos_dp_set_link_train(edp_info);
+ ret = exynos_dp_set_link_train(dp_regs, edp_info);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP link training fail\n");
return ret;
}
- exynos_dp_enable_scramble(DP_ENABLE);
- exynos_dp_enable_rx_to_enhanced_mode(DP_ENABLE);
- exynos_dp_enable_enhanced_mode(DP_ENABLE);
+ exynos_dp_enable_scramble(dp_regs, DP_ENABLE);
+ exynos_dp_enable_rx_to_enhanced_mode(dp_regs, DP_ENABLE);
+ exynos_dp_enable_enhanced_mode(dp_regs, DP_ENABLE);
- exynos_dp_set_link_bandwidth(edp_info->lane_bw);
- exynos_dp_set_lane_count(edp_info->lane_cnt);
+ exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw);
+ exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt);
- exynos_dp_init_video();
- ret = exynos_dp_config_video(edp_info);
+ exynos_dp_init_video(dp_regs);
+ ret = exynos_dp_config_video(dp_regs, edp_info);
if (ret != EXYNOS_DP_SUCCESS) {
printf("Exynos DP init failed\n");
return ret;
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index 4931509..05e64b6 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -14,26 +14,13 @@
#include <asm/arch/dp.h>
#include <fdtdec.h>
#include <libfdt.h>
+#include "exynos_dp_lowlevel.h"
/* Declare global data pointer */
DECLARE_GLOBAL_DATA_PTR;
-struct exynos_dp *dp_regs;
-
-void exynos_dp_set_base_addr(void)
-{
- unsigned int node = fdtdec_next_compatible(gd->fdt_blob,
- 0, COMPAT_SAMSUNG_EXYNOS5_DP);
- if (node <= 0)
- debug("exynos_dp: Can't get device node for dp\n");
-
- dp_regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob,
- node, "reg");
- if (dp_regs == NULL)
- debug("Can't get the DP base address\n");
-}
-
-static void exynos_dp_enable_video_input(unsigned int enable)
+static void exynos_dp_enable_video_input(struct exynos_dp *dp_regs,
+ unsigned int enable)
{
unsigned int reg;
@@ -49,7 +36,7 @@ static void exynos_dp_enable_video_input(unsigned int enable)
return;
}
-void exynos_dp_enable_video_bist(unsigned int enable)
+void exynos_dp_enable_video_bist(struct exynos_dp *dp_regs, unsigned int enable)
{
/*enable video bist*/
unsigned int reg;
@@ -66,7 +53,7 @@ void exynos_dp_enable_video_bist(unsigned int enable)
return;
}
-void exynos_dp_enable_video_mute(unsigned int enable)
+void exynos_dp_enable_video_mute(struct exynos_dp *dp_regs, unsigned int enable)
{
unsigned int reg;
@@ -81,7 +68,7 @@ void exynos_dp_enable_video_mute(unsigned int enable)
}
-static void exynos_dp_init_analog_param(void)
+static void exynos_dp_init_analog_param(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -130,7 +117,7 @@ static void exynos_dp_init_analog_param(void)
writel(reg, &dp_regs->pll_ctl);
}
-static void exynos_dp_init_interrupt(void)
+static void exynos_dp_init_interrupt(struct exynos_dp *dp_regs)
{
/* Set interrupt registers to initial states */
@@ -157,16 +144,16 @@ static void exynos_dp_init_interrupt(void)
writel(0x00, &dp_regs->int_sta_mask);
}
-void exynos_dp_reset(void)
+void exynos_dp_reset(struct exynos_dp *dp_regs)
{
unsigned int reg_func_1;
/*dp tx sw reset*/
writel(RESET_DP_TX, &dp_regs->tx_sw_reset);
- exynos_dp_enable_video_input(DP_DISABLE);
- exynos_dp_enable_video_bist(DP_DISABLE);
- exynos_dp_enable_video_mute(DP_DISABLE);
+ exynos_dp_enable_video_input(dp_regs, DP_DISABLE);
+ exynos_dp_enable_video_bist(dp_regs, DP_DISABLE);
+ exynos_dp_enable_video_mute(dp_regs, DP_DISABLE);
/* software reset */
reg_func_1 = MASTER_VID_FUNC_EN_N | SLAVE_VID_FUNC_EN_N |
@@ -178,13 +165,13 @@ void exynos_dp_reset(void)
mdelay(1);
- exynos_dp_init_analog_param();
- exynos_dp_init_interrupt();
+ exynos_dp_init_analog_param(dp_regs);
+ exynos_dp_init_interrupt(dp_regs);
return;
}
-void exynos_dp_enable_sw_func(unsigned int enable)
+void exynos_dp_enable_sw_func(struct exynos_dp *dp_regs, unsigned int enable)
{
unsigned int reg;
@@ -199,7 +186,8 @@ void exynos_dp_enable_sw_func(unsigned int enable)
return;
}
-unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable)
+unsigned int exynos_dp_set_analog_power_down(struct exynos_dp *dp_regs,
+ unsigned int block, u32 enable)
{
unsigned int reg;
@@ -252,7 +240,7 @@ unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable)
return 0;
}
-unsigned int exynos_dp_get_pll_lock_status(void)
+unsigned int exynos_dp_get_pll_lock_status(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -264,7 +252,8 @@ unsigned int exynos_dp_get_pll_lock_status(void)
return PLL_UNLOCKED;
}
-static void exynos_dp_set_pll_power(unsigned int enable)
+static void exynos_dp_set_pll_power(struct exynos_dp *dp_regs,
+ unsigned int enable)
{
unsigned int reg;
@@ -277,14 +266,14 @@ static void exynos_dp_set_pll_power(unsigned int enable)
writel(reg, &dp_regs->pll_ctl);
}
-int exynos_dp_init_analog_func(void)
+int exynos_dp_init_analog_func(struct exynos_dp *dp_regs)
{
int ret = EXYNOS_DP_SUCCESS;
unsigned int retry_cnt = 10;
unsigned int reg;
/*Power On All Analog block */
- exynos_dp_set_analog_power_down(POWER_ALL, DP_DISABLE);
+ exynos_dp_set_analog_power_down(dp_regs, POWER_ALL, DP_DISABLE);
reg = PLL_LOCK_CHG;
writel(reg, &dp_regs->common_int_sta1);
@@ -305,9 +294,9 @@ int exynos_dp_init_analog_func(void)
reg &= ~(DP_PLL_RESET);
writel(reg, &dp_regs->pll_ctl);
- exynos_dp_set_pll_power(DP_ENABLE);
+ exynos_dp_set_pll_power(dp_regs, DP_ENABLE);
- while (exynos_dp_get_pll_lock_status() == PLL_UNLOCKED) {
+ while (exynos_dp_get_pll_lock_status(dp_regs) == PLL_UNLOCKED) {
mdelay(1);
retry_cnt--;
if (retry_cnt == 0) {
@@ -328,7 +317,7 @@ int exynos_dp_init_analog_func(void)
return ret;
}
-void exynos_dp_init_hpd(void)
+void exynos_dp_init_hpd(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -346,7 +335,7 @@ void exynos_dp_init_hpd(void)
return;
}
-static inline void exynos_dp_reset_aux(void)
+static inline void exynos_dp_reset_aux(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -358,7 +347,7 @@ static inline void exynos_dp_reset_aux(void)
return;
}
-void exynos_dp_init_aux(void)
+void exynos_dp_init_aux(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -366,7 +355,7 @@ void exynos_dp_init_aux(void)
reg = RPLY_RECEIV | AUX_ERR;
writel(reg, &dp_regs->int_sta);
- exynos_dp_reset_aux();
+ exynos_dp_reset_aux(dp_regs);
/* Disable AUX transaction H/W retry */
reg = AUX_BIT_PERIOD_EXPECTED_DELAY(3) | AUX_HW_RETRY_COUNT_SEL(3)|
@@ -385,7 +374,7 @@ void exynos_dp_init_aux(void)
return;
}
-void exynos_dp_config_interrupt(void)
+void exynos_dp_config_interrupt(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -408,7 +397,7 @@ void exynos_dp_config_interrupt(void)
return;
}
-unsigned int exynos_dp_get_plug_in_status(void)
+unsigned int exynos_dp_get_plug_in_status(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -419,13 +408,13 @@ unsigned int exynos_dp_get_plug_in_status(void)
return -1;
}
-unsigned int exynos_dp_detect_hpd(void)
+unsigned int exynos_dp_detect_hpd(struct exynos_dp *dp_regs)
{
int timeout_loop = DP_TIMEOUT_LOOP_COUNT;
mdelay(2);
- while (exynos_dp_get_plug_in_status() != 0) {
+ while (exynos_dp_get_plug_in_status(dp_regs) != 0) {
if (timeout_loop == 0)
return -EINVAL;
mdelay(10);
@@ -435,7 +424,7 @@ unsigned int exynos_dp_detect_hpd(void)
return EXYNOS_DP_SUCCESS;
}
-unsigned int exynos_dp_start_aux_transaction(void)
+unsigned int exynos_dp_start_aux_transaction(struct exynos_dp *dp_regs)
{
unsigned int reg;
unsigned int ret = 0;
@@ -484,8 +473,9 @@ unsigned int exynos_dp_start_aux_transaction(void)
return EXYNOS_DP_SUCCESS;
}
-unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr,
- unsigned char data)
+unsigned int exynos_dp_write_byte_to_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned char data)
{
unsigned int reg, ret;
@@ -514,7 +504,7 @@ unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr,
writel(reg, &dp_regs->aux_ch_ctl1);
/* Start AUX transaction */
- ret = exynos_dp_start_aux_transaction();
+ ret = exynos_dp_start_aux_transaction(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP Aux transaction failed\n");
return ret;
@@ -523,8 +513,9 @@ unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr,
return ret;
}
-unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr,
- unsigned char *data)
+unsigned int exynos_dp_read_byte_from_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned char *data)
{
unsigned int reg;
int retval;
@@ -550,7 +541,7 @@ unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr,
writel(reg, &dp_regs->aux_ch_ctl1);
/* Start AUX transaction */
- retval = exynos_dp_start_aux_transaction();
+ retval = exynos_dp_start_aux_transaction(dp_regs);
if (!retval)
debug("DP Aux Transaction fail!\n");
@@ -561,9 +552,10 @@ unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr,
return retval;
}
-unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+unsigned int exynos_dp_write_bytes_to_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
unsigned int reg;
unsigned int start_offset;
@@ -610,7 +602,7 @@ unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr,
writel(reg, &dp_regs->aux_ch_ctl1);
/* Start AUX transaction */
- ret = exynos_dp_start_aux_transaction();
+ ret = exynos_dp_start_aux_transaction(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
printf("DP Aux Transaction failed\n");
@@ -626,9 +618,10 @@ unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr,
return ret;
}
-unsigned int exynos_dp_read_bytes_from_dpcd(unsigned int reg_addr,
- unsigned int count,
- unsigned char data[])
+unsigned int exynos_dp_read_bytes_from_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[])
{
unsigned int reg;
unsigned int start_offset;
@@ -668,7 +661,7 @@ unsigned int exynos_dp_read_bytes_from_dpcd(unsigned int reg_addr,
writel(reg, &dp_regs->aux_ch_ctl1);
/* Start AUX transaction */
- ret = exynos_dp_start_aux_transaction();
+ ret = exynos_dp_start_aux_transaction(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
printf("DP Aux Transaction failed\n");
@@ -692,8 +685,8 @@ unsigned int exynos_dp_read_bytes_from_dpcd(unsigned int reg_addr,
return ret;
}
-int exynos_dp_select_i2c_device(unsigned int device_addr,
- unsigned int reg_addr)
+int exynos_dp_select_i2c_device(struct exynos_dp *dp_regs,
+ unsigned int device_addr, unsigned int reg_addr)
{
unsigned int reg;
int retval;
@@ -717,16 +710,16 @@ int exynos_dp_select_i2c_device(unsigned int device_addr,
writel(reg, &dp_regs->aux_ch_ctl1);
/* Start AUX transaction */
- retval = exynos_dp_start_aux_transaction();
+ retval = exynos_dp_start_aux_transaction(dp_regs);
if (retval != 0)
printf("%s: DP Aux Transaction fail!\n", __func__);
return retval;
}
-int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
- unsigned int reg_addr,
- unsigned int *data)
+int exynos_dp_read_byte_from_i2c(struct exynos_dp *dp_regs,
+ unsigned int device_addr,
+ unsigned int reg_addr, unsigned int *data)
{
unsigned int reg;
int i;
@@ -738,7 +731,8 @@ int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
writel(reg, &dp_regs->buffer_data_ctl);
/* Select EDID device */
- retval = exynos_dp_select_i2c_device(device_addr, reg_addr);
+ retval = exynos_dp_select_i2c_device(dp_regs, device_addr,
+ reg_addr);
if (retval != 0) {
printf("DP Select EDID device fail. retry !\n");
continue;
@@ -754,7 +748,7 @@ int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
writel(reg, &dp_regs->aux_ch_ctl1);
/* Start AUX transaction */
- retval = exynos_dp_start_aux_transaction();
+ retval = exynos_dp_start_aux_transaction(dp_regs);
if (retval != EXYNOS_DP_SUCCESS)
printf("%s: DP Aux Transaction fail!\n", __func__);
}
@@ -766,8 +760,10 @@ int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
return retval;
}
-int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
- unsigned int reg_addr, unsigned int count, unsigned char edid[])
+int exynos_dp_read_bytes_from_i2c(struct exynos_dp *dp_regs,
+ unsigned int device_addr,
+ unsigned int reg_addr, unsigned int count,
+ unsigned char edid[])
{
unsigned int reg;
unsigned int i, j;
@@ -791,9 +787,8 @@ int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
* request without sending addres
*/
if (!defer)
- retval =
- exynos_dp_select_i2c_device(device_addr,
- reg_addr + i);
+ retval = exynos_dp_select_i2c_device(
+ dp_regs, device_addr, reg_addr + i);
else
defer = 0;
@@ -809,7 +804,8 @@ int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
writel(reg, &dp_regs->aux_ch_ctl1);
/* Start AUX transaction */
- retval = exynos_dp_start_aux_transaction();
+ retval = exynos_dp_start_aux_transaction(
+ dp_regs);
if (retval == 0)
break;
else
@@ -834,7 +830,7 @@ int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
return retval;
}
-void exynos_dp_reset_macro(void)
+void exynos_dp_reset_macro(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -849,7 +845,8 @@ void exynos_dp_reset_macro(void)
writel(reg, &dp_regs->phy_test);
}
-void exynos_dp_set_link_bandwidth(unsigned char bwtype)
+void exynos_dp_set_link_bandwidth(struct exynos_dp *dp_regs,
+ unsigned char bwtype)
{
unsigned int reg;
@@ -860,7 +857,7 @@ void exynos_dp_set_link_bandwidth(unsigned char bwtype)
writel(reg, &dp_regs->link_bw_set);
}
-unsigned char exynos_dp_get_link_bandwidth(void)
+unsigned char exynos_dp_get_link_bandwidth(struct exynos_dp *dp_regs)
{
unsigned char ret;
unsigned int reg;
@@ -871,7 +868,7 @@ unsigned char exynos_dp_get_link_bandwidth(void)
return ret;
}
-void exynos_dp_set_lane_count(unsigned char count)
+void exynos_dp_set_lane_count(struct exynos_dp *dp_regs, unsigned char count)
{
unsigned int reg;
@@ -882,7 +879,7 @@ void exynos_dp_set_lane_count(unsigned char count)
writel(reg, &dp_regs->lane_count_set);
}
-unsigned int exynos_dp_get_lane_count(void)
+unsigned int exynos_dp_get_lane_count(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -891,7 +888,8 @@ unsigned int exynos_dp_get_lane_count(void)
return reg;
}
-unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt)
+unsigned char exynos_dp_get_lanex_pre_emphasis(struct exynos_dp *dp_regs,
+ unsigned char lanecnt)
{
unsigned int reg_list[DP_LANE_CNT_4] = {
(unsigned int)&dp_regs->ln0_link_training_ctl,
@@ -903,8 +901,9 @@ unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt)
return readl(reg_list[lanecnt]);
}
-void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val,
- unsigned char lanecnt)
+void exynos_dp_set_lanex_pre_emphasis(struct exynos_dp *dp_regs,
+ unsigned char request_val,
+ unsigned char lanecnt)
{
unsigned int reg_list[DP_LANE_CNT_4] = {
(unsigned int)&dp_regs->ln0_link_training_ctl,
@@ -916,7 +915,8 @@ void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val,
writel(request_val, reg_list[lanecnt]);
}
-void exynos_dp_set_lane_pre_emphasis(unsigned int level, unsigned char lanecnt)
+void exynos_dp_set_lane_pre_emphasis(struct exynos_dp *dp_regs,
+ unsigned int level, unsigned char lanecnt)
{
unsigned char i;
unsigned int reg;
@@ -939,7 +939,8 @@ void exynos_dp_set_lane_pre_emphasis(unsigned int level, unsigned char lanecnt)
}
}
-void exynos_dp_set_training_pattern(unsigned int pattern)
+void exynos_dp_set_training_pattern(struct exynos_dp *dp_regs,
+ unsigned int pattern)
{
unsigned int reg = 0;
@@ -967,7 +968,8 @@ void exynos_dp_set_training_pattern(unsigned int pattern)
writel(reg, &dp_regs->training_ptn_set);
}
-void exynos_dp_enable_enhanced_mode(unsigned char enable)
+void exynos_dp_enable_enhanced_mode(struct exynos_dp *dp_regs,
+ unsigned char enable)
{
unsigned int reg;
@@ -980,7 +982,7 @@ void exynos_dp_enable_enhanced_mode(unsigned char enable)
writel(reg, &dp_regs->sys_ctl4);
}
-void exynos_dp_enable_scrambling(unsigned int enable)
+void exynos_dp_enable_scrambling(struct exynos_dp *dp_regs, unsigned int enable)
{
unsigned int reg;
@@ -993,7 +995,7 @@ void exynos_dp_enable_scrambling(unsigned int enable)
writel(reg, &dp_regs->training_ptn_set);
}
-int exynos_dp_init_video(void)
+int exynos_dp_init_video(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -1008,7 +1010,8 @@ int exynos_dp_init_video(void)
return 0;
}
-void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info)
+void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs,
+ struct edp_video_info *video_info)
{
unsigned int reg;
@@ -1041,7 +1044,8 @@ void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info)
writel(reg, &dp_regs->soc_general_ctl);
}
-void exynos_dp_set_video_color_format(struct edp_video_info *video_info)
+void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs,
+ struct edp_video_info *video_info)
{
unsigned int reg;
@@ -1061,7 +1065,8 @@ void exynos_dp_set_video_color_format(struct edp_video_info *video_info)
writel(reg, &dp_regs->video_ctl3);
}
-int exynos_dp_config_video_bist(struct edp_device_info *edp_info)
+int exynos_dp_config_video_bist(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info)
{
unsigned int reg;
unsigned int bist_type = 0;
@@ -1151,7 +1156,7 @@ int exynos_dp_config_video_bist(struct edp_device_info *edp_info)
return 0;
}
-unsigned int exynos_dp_is_slave_video_stream_clock_on(void)
+unsigned int exynos_dp_is_slave_video_stream_clock_on(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -1169,8 +1174,8 @@ unsigned int exynos_dp_is_slave_video_stream_clock_on(void)
return EXYNOS_DP_SUCCESS;
}
-void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value,
- unsigned int n_value)
+void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type,
+ unsigned int m_value, unsigned int n_value)
{
unsigned int reg;
@@ -1198,7 +1203,8 @@ void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value,
}
}
-void exynos_dp_set_video_timing_mode(unsigned int type)
+void exynos_dp_set_video_timing_mode(struct exynos_dp *dp_regs,
+ unsigned int type)
{
unsigned int reg;
@@ -1211,7 +1217,8 @@ void exynos_dp_set_video_timing_mode(unsigned int type)
writel(reg, &dp_regs->video_ctl10);
}
-void exynos_dp_enable_video_master(unsigned int enable)
+void exynos_dp_enable_video_master(struct exynos_dp *dp_regs,
+ unsigned int enable)
{
unsigned int reg;
@@ -1227,7 +1234,7 @@ void exynos_dp_enable_video_master(unsigned int enable)
writel(reg, &dp_regs->soc_general_ctl);
}
-void exynos_dp_start_video(void)
+void exynos_dp_start_video(struct exynos_dp *dp_regs)
{
unsigned int reg;
@@ -1237,7 +1244,7 @@ void exynos_dp_start_video(void)
writel(reg, &dp_regs->video_ctl1);
}
-unsigned int exynos_dp_is_video_stream_on(void)
+unsigned int exynos_dp_is_video_stream_on(struct exynos_dp *dp_regs)
{
unsigned int reg;
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.h b/drivers/video/exynos/exynos_dp_lowlevel.h
index 8651681..85459b5 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.h
+++ b/drivers/video/exynos/exynos_dp_lowlevel.h
@@ -9,60 +9,81 @@
#ifndef _EXYNOS_EDP_LOWLEVEL_H
#define _EXYNOS_EDP_LOWLEVEL_H
-void exynos_dp_enable_video_bist(unsigned int enable);
-void exynos_dp_enable_video_mute(unsigned int enable);
-void exynos_dp_reset(void);
-void exynos_dp_enable_sw_func(unsigned int enable);
-unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable);
-unsigned int exynos_dp_get_pll_lock_status(void);
-int exynos_dp_init_analog_func(void);
-void exynos_dp_init_hpd(void);
-void exynos_dp_init_aux(void);
-void exynos_dp_config_interrupt(void);
-unsigned int exynos_dp_get_plug_in_status(void);
-unsigned int exynos_dp_detect_hpd(void);
-unsigned int exynos_dp_start_aux_transaction(void);
-unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr,
- unsigned char data);
-unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr,
- unsigned char *data);
-unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
-unsigned int exynos_dp_read_bytes_from_dpcd( unsigned int reg_addr,
- unsigned int count,
- unsigned char data[]);
-int exynos_dp_select_i2c_device( unsigned int device_addr,
- unsigned int reg_addr);
-int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
- unsigned int reg_addr, unsigned int *data);
-int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
- unsigned int reg_addr, unsigned int count,
- unsigned char edid[]);
-void exynos_dp_reset_macro(void);
-void exynos_dp_set_link_bandwidth(unsigned char bwtype);
-unsigned char exynos_dp_get_link_bandwidth(void);
-void exynos_dp_set_lane_count(unsigned char count);
-unsigned int exynos_dp_get_lane_count(void);
-unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt);
-void exynos_dp_set_lane_pre_emphasis(unsigned int level,
- unsigned char lanecnt);
-void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val,
- unsigned char lanecnt);
-void exynos_dp_set_training_pattern(unsigned int pattern);
-void exynos_dp_enable_enhanced_mode(unsigned char enable);
-void exynos_dp_enable_scrambling(unsigned int enable);
-int exynos_dp_init_video(void);
-void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info);
-void exynos_dp_set_video_color_format(struct edp_video_info *video_info);
-int exynos_dp_config_video_bist(struct edp_device_info *edp_info);
-unsigned int exynos_dp_is_slave_video_stream_clock_on(void);
-void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value,
- unsigned int n_value);
-void exynos_dp_set_video_timing_mode(unsigned int type);
-void exynos_dp_enable_video_master(unsigned int enable);
-void exynos_dp_start_video(void);
-unsigned int exynos_dp_is_video_stream_on(void);
-void exynos_dp_set_base_addr(void);
+void exynos_dp_enable_video_bist(struct exynos_dp *dp_regs,
+ unsigned int enable);
+void exynos_dp_enable_video_mute(struct exynos_dp *dp_regs,
+ unsigned int enable);
+void exynos_dp_reset(struct exynos_dp *dp_regs);
+void exynos_dp_enable_sw_func(struct exynos_dp *dp_regs, unsigned int enable);
+unsigned int exynos_dp_set_analog_power_down(struct exynos_dp *dp_regs,
+ unsigned int block, u32 enable);
+unsigned int exynos_dp_get_pll_lock_status(struct exynos_dp *dp_regs);
+int exynos_dp_init_analog_func(struct exynos_dp *dp_regs);
+void exynos_dp_init_hpd(struct exynos_dp *dp_regs);
+void exynos_dp_init_aux(struct exynos_dp *dp_regs);
+void exynos_dp_config_interrupt(struct exynos_dp *dp_regs);
+unsigned int exynos_dp_get_plug_in_status(struct exynos_dp *dp_regs);
+unsigned int exynos_dp_detect_hpd(struct exynos_dp *dp_regs);
+unsigned int exynos_dp_start_aux_transaction(struct exynos_dp *dp_regs);
+unsigned int exynos_dp_write_byte_to_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned char data);
+unsigned int exynos_dp_read_byte_from_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned char *data);
+unsigned int exynos_dp_write_bytes_to_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
+unsigned int exynos_dp_read_bytes_from_dpcd(struct exynos_dp *dp_regs,
+ unsigned int reg_addr,
+ unsigned int count,
+ unsigned char data[]);
+int exynos_dp_select_i2c_device(struct exynos_dp *dp_regs,
+ unsigned int device_addr,
+ unsigned int reg_addr);
+int exynos_dp_read_byte_from_i2c(struct exynos_dp *dp_regs,
+ unsigned int device_addr,
+ unsigned int reg_addr, unsigned int *data);
+int exynos_dp_read_bytes_from_i2c(struct exynos_dp *dp_regs,
+ unsigned int device_addr,
+ unsigned int reg_addr, unsigned int count,
+ unsigned char edid[]);
+void exynos_dp_reset_macro(struct exynos_dp *dp_regs);
+void exynos_dp_set_link_bandwidth(struct exynos_dp *dp_regs,
+ unsigned char bwtype);
+unsigned char exynos_dp_get_link_bandwidth(struct exynos_dp *dp_regs);
+void exynos_dp_set_lane_count(struct exynos_dp *dp_regs, unsigned char count);
+unsigned int exynos_dp_get_lane_count(struct exynos_dp *dp_regs);
+unsigned char exynos_dp_get_lanex_pre_emphasis(struct exynos_dp *dp_regs,
+ unsigned char lanecnt);
+void exynos_dp_set_lane_pre_emphasis(struct exynos_dp *dp_regs,
+ unsigned int level, unsigned char lanecnt);
+void exynos_dp_set_lanex_pre_emphasis(struct exynos_dp *dp_regs,
+ unsigned char request_val,
+ unsigned char lanecnt);
+void exynos_dp_set_training_pattern(struct exynos_dp *dp_regs,
+ unsigned int pattern);
+void exynos_dp_enable_enhanced_mode(struct exynos_dp *dp_regs,
+ unsigned char enable);
+void exynos_dp_enable_scrambling(struct exynos_dp *dp_regs,
+ unsigned int enable);
+int exynos_dp_init_video(struct exynos_dp *dp_regs);
+void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs,
+ struct edp_video_info *video_info);
+void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs,
+ struct edp_video_info *video_info);
+int exynos_dp_config_video_bist(struct exynos_dp *dp_regs,
+ struct edp_device_info *edp_info);
+unsigned int exynos_dp_is_slave_video_stream_clock_on(
+ struct exynos_dp *dp_regs);
+void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type,
+ unsigned int m_value, unsigned int n_value);
+void exynos_dp_set_video_timing_mode(struct exynos_dp *dp_regs,
+ unsigned int type);
+void exynos_dp_enable_video_master(struct exynos_dp *dp_regs,
+ unsigned int enable);
+void exynos_dp_start_video(struct exynos_dp *dp_regs);
+unsigned int exynos_dp_is_video_stream_on(struct exynos_dp *dp_regs);
#endif /* _EXYNOS_DP_LOWLEVEL_H */
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 08/25] exynos: video: Move dsim_config_dt into a function
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (6 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 07/25] exynos: video: Drop static variables in exynos_dp_lowlevel.c Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 09/25] exynos: video: Move struct exynos_platform_mipi_dsim into vidinfo Simon Glass
` (16 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
In preparation for making this a parameter, move it into the function
that sets it up.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/exynos/exynos_mipi_dsi.c | 37 +++++++++++++++++-----------------
1 file changed, 19 insertions(+), 18 deletions(-)
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index 5001e16..fd96382 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -28,7 +28,6 @@
DECLARE_GLOBAL_DATA_PTR;
static struct exynos_platform_mipi_dsim *dsim_pd;
-static struct mipi_dsim_config dsim_config_dt;
static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
@@ -247,7 +246,7 @@ void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd)
dsim_pd = pd;
}
-int exynos_dsim_config_parse_dt(const void *blob)
+int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt)
{
int node;
@@ -257,47 +256,47 @@ int exynos_dsim_config_parse_dt(const void *blob)
return -ENODEV;
}
- dsim_config_dt.e_interface = fdtdec_get_int(blob, node,
+ dt->e_interface = fdtdec_get_int(blob, node,
"samsung,dsim-config-e-interface", 0);
- dsim_config_dt.e_virtual_ch = fdtdec_get_int(blob, node,
+ dt->e_virtual_ch = fdtdec_get_int(blob, node,
"samsung,dsim-config-e-virtual-ch", 0);
- dsim_config_dt.e_pixel_format = fdtdec_get_int(blob, node,
+ dt->e_pixel_format = fdtdec_get_int(blob, node,
"samsung,dsim-config-e-pixel-format", 0);
- dsim_config_dt.e_burst_mode = fdtdec_get_int(blob, node,
+ dt->e_burst_mode = fdtdec_get_int(blob, node,
"samsung,dsim-config-e-burst-mode", 0);
- dsim_config_dt.e_no_data_lane = fdtdec_get_int(blob, node,
+ dt->e_no_data_lane = fdtdec_get_int(blob, node,
"samsung,dsim-config-e-no-data-lane", 0);
- dsim_config_dt.e_byte_clk = fdtdec_get_int(blob, node,
+ dt->e_byte_clk = fdtdec_get_int(blob, node,
"samsung,dsim-config-e-byte-clk", 0);
- dsim_config_dt.hfp = fdtdec_get_int(blob, node,
+ dt->hfp = fdtdec_get_int(blob, node,
"samsung,dsim-config-hfp", 0);
- dsim_config_dt.p = fdtdec_get_int(blob, node,
+ dt->p = fdtdec_get_int(blob, node,
"samsung,dsim-config-p", 0);
- dsim_config_dt.m = fdtdec_get_int(blob, node,
+ dt->m = fdtdec_get_int(blob, node,
"samsung,dsim-config-m", 0);
- dsim_config_dt.s = fdtdec_get_int(blob, node,
+ dt->s = fdtdec_get_int(blob, node,
"samsung,dsim-config-s", 0);
- dsim_config_dt.pll_stable_time = fdtdec_get_int(blob, node,
+ dt->pll_stable_time = fdtdec_get_int(blob, node,
"samsung,dsim-config-pll-stable-time", 0);
- dsim_config_dt.esc_clk = fdtdec_get_int(blob, node,
+ dt->esc_clk = fdtdec_get_int(blob, node,
"samsung,dsim-config-esc-clk", 0);
- dsim_config_dt.stop_holding_cnt = fdtdec_get_int(blob, node,
+ dt->stop_holding_cnt = fdtdec_get_int(blob, node,
"samsung,dsim-config-stop-holding-cnt", 0);
- dsim_config_dt.bta_timeout = fdtdec_get_int(blob, node,
+ dt->bta_timeout = fdtdec_get_int(blob, node,
"samsung,dsim-config-bta-timeout", 0);
- dsim_config_dt.rx_timeout = fdtdec_get_int(blob, node,
+ dt->rx_timeout = fdtdec_get_int(blob, node,
"samsung,dsim-config-rx-timeout", 0);
mipi_lcd_device_dt.name = fdtdec_get_config_string(blob,
@@ -317,7 +316,9 @@ int exynos_dsim_config_parse_dt(const void *blob)
void exynos_init_dsim_platform_data(vidinfo_t *vid)
{
- if (exynos_dsim_config_parse_dt(gd->fdt_blob))
+ struct mipi_dsim_config dsim_config_dt;
+
+ if (exynos_dsim_config_parse_dt(gd->fdt_blob, &dsim_config_dt))
debug("Can't get proper dsim config.\n");
strcpy(dsim_platform_data_dt.lcd_panel_name, mipi_lcd_device_dt.name);
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 09/25] exynos: video: Move struct exynos_platform_mipi_dsim into vidinfo
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (7 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 08/25] exynos: video: Move dsim_config_dt into a function Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 10/25] exynos: video: Move mipi_lcd_device_dt into a function Simon Glass
` (15 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
Put the pointer to this structure in struct vidinfo so that we can
reference it without it being global.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/include/mach/mipi_dsim.h | 5 +++--
drivers/video/exynos/exynos_fb.c | 2 +-
drivers/video/exynos/exynos_mipi_dsi.c | 19 ++++---------------
include/exynos_lcd.h | 1 +
4 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/mipi_dsim.h b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
index a77b5c8..df68186 100644
--- a/arch/arm/mach-exynos/include/mach/mipi_dsim.h
+++ b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
@@ -347,9 +347,10 @@ struct mipi_dsim_lcd_driver {
};
#ifdef CONFIG_EXYNOS_MIPI_DSIM
-int exynos_mipi_dsi_init(void);
+int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd);
#else
-static inline int exynos_mipi_dsi_init(void)
+static inline int exynos_mipi_dsi_init(
+ struct exynos_platform_mipi_dsim *dsim_pd)
{
return 0;
}
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index abc6091..22b9723 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -128,7 +128,7 @@ static void lcd_panel_on(struct vidinfo *vid)
exynos_enable_ldo(1);
if (vid->mipi_enabled)
- exynos_mipi_dsi_init();
+ exynos_mipi_dsi_init(panel_info.dsim_platform_data_dt);
}
int exynos_lcd_early_init(const void *blob)
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index fd96382..b39858a 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -27,8 +27,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct exynos_platform_mipi_dsim *dsim_pd;
-static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
struct mipi_dsim_ddi {
@@ -175,7 +173,7 @@ static struct mipi_dsim_master_ops master_ops = {
.clear_dsim_frame_done = exynos_mipi_dsi_clear_frame_done,
};
-int exynos_mipi_dsi_init(void)
+int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd)
{
struct mipi_dsim_device *dsim;
struct mipi_dsim_config *dsim_config;
@@ -236,16 +234,6 @@ int exynos_mipi_dsi_init(void)
return 0;
}
-void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd)
-{
- if (pd == NULL) {
- debug("pd is NULL\n");
- return;
- }
-
- dsim_pd = pd;
-}
-
int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt)
{
int node;
@@ -316,7 +304,8 @@ int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt)
void exynos_init_dsim_platform_data(vidinfo_t *vid)
{
- struct mipi_dsim_config dsim_config_dt;
+ static struct mipi_dsim_config dsim_config_dt;
+ static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
if (exynos_dsim_config_parse_dt(gd->fdt_blob, &dsim_config_dt))
debug("Can't get proper dsim config.\n");
@@ -330,5 +319,5 @@ void exynos_init_dsim_platform_data(vidinfo_t *vid)
mipi_lcd_device_dt.platform_data = (void *)&dsim_platform_data_dt;
exynos_mipi_dsi_register_lcd_device(&mipi_lcd_device_dt);
- dsim_pd = &dsim_platform_data_dt;
+ vid->dsim_platform_data_dt = &dsim_platform_data_dt;
}
diff --git a/include/exynos_lcd.h b/include/exynos_lcd.h
index 1f6c6c7..0aa0fc7 100644
--- a/include/exynos_lcd.h
+++ b/include/exynos_lcd.h
@@ -76,6 +76,7 @@ typedef struct vidinfo {
unsigned int dual_lcd_enabled;
struct exynos_fb *fimd_ctrl;
+ struct exynos_platform_mipi_dsim *dsim_platform_data_dt;
} vidinfo_t;
#endif
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 10/25] exynos: video: Move mipi_lcd_device_dt into a function
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (8 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 09/25] exynos: video: Move struct exynos_platform_mipi_dsim into vidinfo Simon Glass
@ 2016-01-14 23:59 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 11/25] exynos: video: Combine LCD driver into one file Simon Glass
` (14 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-14 23:59 UTC (permalink / raw)
To: u-boot
In preparation for making this a parameter, move it into the function
that sets it up.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/include/mach/mipi_dsim.h | 2 +-
drivers/video/exynos/exynos_mipi_dsi.c | 17 +++++++++--------
2 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/mipi_dsim.h b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
index df68186..43b5c01 100644
--- a/arch/arm/mach-exynos/include/mach/mipi_dsim.h
+++ b/arch/arm/mach-exynos/include/mach/mipi_dsim.h
@@ -320,7 +320,7 @@ struct mipi_dsim_lcd_device {
int reverse_panel;
struct mipi_dsim_device *master;
- void *platform_data;
+ struct exynos_platform_mipi_dsim *platform_data;
};
/*
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index b39858a..a5d9b59 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -27,8 +27,6 @@
DECLARE_GLOBAL_DATA_PTR;
-static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
-
struct mipi_dsim_ddi {
int bus_id;
struct list_head list;
@@ -234,7 +232,8 @@ int exynos_mipi_dsi_init(struct exynos_platform_mipi_dsim *dsim_pd)
return 0;
}
-int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt)
+int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt,
+ struct mipi_dsim_lcd_device *lcd_dt)
{
int node;
@@ -287,16 +286,16 @@ int exynos_dsim_config_parse_dt(const void *blob, struct mipi_dsim_config *dt)
dt->rx_timeout = fdtdec_get_int(blob, node,
"samsung,dsim-config-rx-timeout", 0);
- mipi_lcd_device_dt.name = fdtdec_get_config_string(blob,
+ lcd_dt->name = fdtdec_get_config_string(blob,
"samsung,dsim-device-name");
- mipi_lcd_device_dt.id = fdtdec_get_int(blob, node,
+ lcd_dt->id = fdtdec_get_int(blob, node,
"samsung,dsim-device-id", 0);
- mipi_lcd_device_dt.bus_id = fdtdec_get_int(blob, node,
+ lcd_dt->bus_id = fdtdec_get_int(blob, node,
"samsung,dsim-device-bus_id", 0);
- mipi_lcd_device_dt.reverse_panel = fdtdec_get_int(blob, node,
+ lcd_dt->reverse_panel = fdtdec_get_int(blob, node,
"samsung,dsim-device-reverse-panel", 0);
return 0;
@@ -306,8 +305,10 @@ void exynos_init_dsim_platform_data(vidinfo_t *vid)
{
static struct mipi_dsim_config dsim_config_dt;
static struct exynos_platform_mipi_dsim dsim_platform_data_dt;
+ static struct mipi_dsim_lcd_device mipi_lcd_device_dt;
- if (exynos_dsim_config_parse_dt(gd->fdt_blob, &dsim_config_dt))
+ if (exynos_dsim_config_parse_dt(gd->fdt_blob, &dsim_config_dt,
+ &mipi_lcd_device_dt))
debug("Can't get proper dsim config.\n");
strcpy(dsim_platform_data_dt.lcd_panel_name, mipi_lcd_device_dt.name);
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 11/25] exynos: video: Combine LCD driver into one file
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (9 preceding siblings ...)
2016-01-14 23:59 ` [U-Boot] [PATCH 10/25] exynos: video: Move mipi_lcd_device_dt into a function Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 12/25] exynos: pwm: Add a driver for the exynos5 PWM Simon Glass
` (13 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
At present exynos_fimd.c is the controller and exynos_fb.c is the U-Boot
LCD interface. With driver model we want these in one file, so join them
in preparation.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/exynos/Makefile | 2 +-
drivers/video/exynos/exynos_fb.c | 386 +++++++++++++++++++++++++++++++++++
drivers/video/exynos/exynos_fimd.c | 405 -------------------------------------
3 files changed, 387 insertions(+), 406 deletions(-)
delete mode 100644 drivers/video/exynos/exynos_fimd.c
diff --git a/drivers/video/exynos/Makefile b/drivers/video/exynos/Makefile
index d4bdf32..001a80f 100644
--- a/drivers/video/exynos/Makefile
+++ b/drivers/video/exynos/Makefile
@@ -6,7 +6,7 @@
#
obj-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
-obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
+obj-$(CONFIG_EXYNOS_FB) += exynos_fb.o
obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \
exynos_mipi_dsi_lowlevel.o
obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 22b9723..e13d35a 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -9,6 +9,7 @@
#include <config.h>
#include <common.h>
+#include <div64.h>
#include <lcd.h>
#include <fdtdec.h>
#include <libfdt.h>
@@ -34,6 +35,391 @@ struct vidinfo panel_info = {
.vl_col = -1,
};
+static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ if (enabled) {
+ cfg = EXYNOS_DUALRGB_BYPASS_DUAL | EXYNOS_DUALRGB_LINESPLIT |
+ EXYNOS_DUALRGB_VDEN_EN_ENABLE;
+
+ /* in case of Line Split mode, MAIN_CNT doesn't neet to set. */
+ cfg |= EXYNOS_DUALRGB_SUB_CNT(pvid->vl_col / 2) |
+ EXYNOS_DUALRGB_MAIN_CNT(0);
+ }
+
+ writel(cfg, &fimd_ctrl->dualrgb);
+}
+
+static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid,
+ unsigned int enabled)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ if (enabled)
+ cfg = EXYNOS_DP_CLK_ENABLE;
+
+ writel(cfg, &fimd_ctrl->dp_mie_clkcon);
+}
+
+static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ /* set window control */
+ cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
+ EXYNOS_WINCON(win_id));
+
+ cfg &= ~(EXYNOS_WINCON_BITSWP_ENABLE | EXYNOS_WINCON_BYTESWP_ENABLE |
+ EXYNOS_WINCON_HAWSWP_ENABLE | EXYNOS_WINCON_WSWP_ENABLE |
+ EXYNOS_WINCON_BURSTLEN_MASK | EXYNOS_WINCON_BPPMODE_MASK |
+ EXYNOS_WINCON_INRGB_MASK | EXYNOS_WINCON_DATAPATH_MASK);
+
+ /* DATAPATH is DMA */
+ cfg |= EXYNOS_WINCON_DATAPATH_DMA;
+
+ cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+
+ /* dma burst is 16 */
+ cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
+
+ switch (pvid->vl_bpix) {
+ case 4:
+ cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+ break;
+ default:
+ cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+ break;
+ }
+
+ writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
+ EXYNOS_WINCON(win_id));
+
+ /* set window position to x=0, y=0*/
+ cfg = EXYNOS_VIDOSD_LEFT_X(0) | EXYNOS_VIDOSD_TOP_Y(0);
+ writel(cfg, (unsigned int)&fimd_ctrl->vidosd0a +
+ EXYNOS_VIDOSD(win_id));
+
+ cfg = EXYNOS_VIDOSD_RIGHT_X(pvid->vl_col - 1) |
+ EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1) |
+ EXYNOS_VIDOSD_RIGHT_X_E(1) |
+ EXYNOS_VIDOSD_BOTTOM_Y_E(0);
+
+ writel(cfg, (unsigned int)&fimd_ctrl->vidosd0b +
+ EXYNOS_VIDOSD(win_id));
+
+ /* set window size for window0*/
+ cfg = EXYNOS_VIDOSD_SIZE(pvid->vl_col * pvid->vl_row);
+ writel(cfg, (unsigned int)&fimd_ctrl->vidosd0c +
+ EXYNOS_VIDOSD(win_id));
+}
+
+static void exynos_fimd_set_buffer_address(struct vidinfo *pvid,
+ unsigned int win_id,
+ ulong lcd_base_addr)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned long start_addr, end_addr;
+
+ start_addr = lcd_base_addr;
+ end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) *
+ pvid->vl_row);
+
+ writel(start_addr, (unsigned int)&fimd_ctrl->vidw00add0b0 +
+ EXYNOS_BUFFER_OFFSET(win_id));
+ writel(end_addr, (unsigned int)&fimd_ctrl->vidw00add1b0 +
+ EXYNOS_BUFFER_OFFSET(win_id));
+}
+
+static void exynos_fimd_set_clock(struct vidinfo *pvid)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0, div = 0, remainder, remainder_div;
+ unsigned long pixel_clock;
+ unsigned long long src_clock;
+
+ if (pvid->dual_lcd_enabled) {
+ pixel_clock = pvid->vl_freq *
+ (pvid->vl_hspw + pvid->vl_hfpd +
+ pvid->vl_hbpd + pvid->vl_col / 2) *
+ (pvid->vl_vspw + pvid->vl_vfpd +
+ pvid->vl_vbpd + pvid->vl_row);
+ } else if (pvid->interface_mode == FIMD_CPU_INTERFACE) {
+ pixel_clock = pvid->vl_freq *
+ pvid->vl_width * pvid->vl_height *
+ (pvid->cs_setup + pvid->wr_setup +
+ pvid->wr_act + pvid->wr_hold + 1);
+ } else {
+ pixel_clock = pvid->vl_freq *
+ (pvid->vl_hspw + pvid->vl_hfpd +
+ pvid->vl_hbpd + pvid->vl_col) *
+ (pvid->vl_vspw + pvid->vl_vfpd +
+ pvid->vl_vbpd + pvid->vl_row);
+ }
+
+ cfg = readl(&fimd_ctrl->vidcon0);
+ cfg &= ~(EXYNOS_VIDCON0_CLKSEL_MASK | EXYNOS_VIDCON0_CLKVALUP_MASK |
+ EXYNOS_VIDCON0_CLKVAL_F(0xFF) | EXYNOS_VIDCON0_VCLKEN_MASK |
+ EXYNOS_VIDCON0_CLKDIR_MASK);
+ cfg |= (EXYNOS_VIDCON0_CLKSEL_SCLK | EXYNOS_VIDCON0_CLKVALUP_ALWAYS |
+ EXYNOS_VIDCON0_VCLKEN_NORMAL | EXYNOS_VIDCON0_CLKDIR_DIVIDED);
+
+ src_clock = (unsigned long long) get_lcd_clk();
+
+ /* get quotient and remainder. */
+ remainder = do_div(src_clock, pixel_clock);
+ div = src_clock;
+
+ remainder *= 10;
+ remainder_div = remainder / pixel_clock;
+
+ /* round about one places of decimals. */
+ if (remainder_div >= 5)
+ div++;
+
+ /* in case of dual lcd mode. */
+ if (pvid->dual_lcd_enabled)
+ div--;
+
+ cfg |= EXYNOS_VIDCON0_CLKVAL_F(div - 1);
+ writel(cfg, &fimd_ctrl->vidcon0);
+}
+
+void exynos_set_trigger(struct vidinfo *pvid)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ cfg = readl(&fimd_ctrl->trigcon);
+
+ cfg |= (EXYNOS_I80SOFT_TRIG_EN | EXYNOS_I80START_TRIG);
+
+ writel(cfg, &fimd_ctrl->trigcon);
+}
+
+int exynos_is_i80_frame_done(struct vidinfo *pvid)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+ int status;
+
+ cfg = readl(&fimd_ctrl->trigcon);
+
+ /* frame done func is valid only when TRIMODE[0] is set to 1. */
+ status = (cfg & EXYNOS_I80STATUS_TRIG_DONE) ==
+ EXYNOS_I80STATUS_TRIG_DONE;
+
+ return status;
+}
+
+static void exynos_fimd_lcd_on(struct vidinfo *pvid)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ /* display on */
+ cfg = readl(&fimd_ctrl->vidcon0);
+ cfg |= (EXYNOS_VIDCON0_ENVID_ENABLE | EXYNOS_VIDCON0_ENVID_F_ENABLE);
+ writel(cfg, &fimd_ctrl->vidcon0);
+}
+
+static void exynos_fimd_window_on(struct vidinfo *pvid, unsigned int win_id)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ /* enable window */
+ cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
+ EXYNOS_WINCON(win_id));
+ cfg |= EXYNOS_WINCON_ENWIN_ENABLE;
+ writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
+ EXYNOS_WINCON(win_id));
+
+ cfg = readl(&fimd_ctrl->winshmap);
+ cfg |= EXYNOS_WINSHMAP_CH_ENABLE(win_id);
+ writel(cfg, &fimd_ctrl->winshmap);
+}
+
+void exynos_fimd_lcd_off(struct vidinfo *pvid)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ cfg = readl(&fimd_ctrl->vidcon0);
+ cfg &= (EXYNOS_VIDCON0_ENVID_DISABLE | EXYNOS_VIDCON0_ENVID_F_DISABLE);
+ writel(cfg, &fimd_ctrl->vidcon0);
+}
+
+void exynos_fimd_window_off(struct vidinfo *pvid, unsigned int win_id)
+{
+ struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ unsigned int cfg = 0;
+
+ cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
+ EXYNOS_WINCON(win_id));
+ cfg &= EXYNOS_WINCON_ENWIN_DISABLE;
+ writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
+ EXYNOS_WINCON(win_id));
+
+ cfg = readl(&fimd_ctrl->winshmap);
+ cfg &= ~EXYNOS_WINSHMAP_CH_DISABLE(win_id);
+ writel(cfg, &fimd_ctrl->winshmap);
+}
+
+/*
+* The reset value for FIMD SYSMMU register MMU_CTRL is 3
+* on Exynos5420 and newer versions.
+* This means FIMD SYSMMU is on by default on Exynos5420
+* and newer versions.
+* Since in u-boot we don't use SYSMMU, we should disable
+* those FIMD SYSMMU.
+* Note that there are 2 SYSMMU for FIMD: m0 and m1.
+* m0 handles windows 0 and 4, and m1 handles windows 1, 2 and 3.
+* We disable both of them here.
+*/
+void exynos_fimd_disable_sysmmu(void)
+{
+ u32 *sysmmufimd;
+ unsigned int node;
+ int node_list[2];
+ int count;
+ int i;
+
+ count = fdtdec_find_aliases_for_id(gd->fdt_blob, "fimd",
+ COMPAT_SAMSUNG_EXYNOS_SYSMMU, node_list, 2);
+ for (i = 0; i < count; i++) {
+ node = node_list[i];
+ if (node <= 0) {
+ debug("Can't get device node for fimd sysmmu\n");
+ return;
+ }
+
+ sysmmufimd = (u32 *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
+ if (!sysmmufimd) {
+ debug("Can't get base address for sysmmu fimdm0");
+ return;
+ }
+
+ writel(0x0, sysmmufimd);
+ }
+}
+
+void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address)
+{
+ struct exynos_fb *fimd_ctrl;
+ unsigned int cfg = 0, rgb_mode;
+ unsigned int offset;
+ unsigned int node;
+
+ node = fdtdec_next_compatible(gd->fdt_blob,
+ 0, COMPAT_SAMSUNG_EXYNOS_FIMD);
+ if (node <= 0)
+ debug("exynos_fb: Can't get device node for fimd\n");
+
+ fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node,
+ "reg");
+ if (fimd_ctrl == NULL)
+ debug("Can't get the FIMD base address\n");
+ pvid->fimd_ctrl = fimd_ctrl;
+
+ if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu"))
+ exynos_fimd_disable_sysmmu();
+
+ offset = exynos_fimd_get_base_offset();
+
+ rgb_mode = pvid->rgb_mode;
+
+ if (pvid->interface_mode == FIMD_RGB_INTERFACE) {
+ cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
+ writel(cfg, &fimd_ctrl->vidcon0);
+
+ cfg = readl(&fimd_ctrl->vidcon2);
+ cfg &= ~(EXYNOS_VIDCON2_WB_MASK |
+ EXYNOS_VIDCON2_TVFORMATSEL_MASK |
+ EXYNOS_VIDCON2_TVFORMATSEL_YUV_MASK);
+ cfg |= EXYNOS_VIDCON2_WB_DISABLE;
+ writel(cfg, &fimd_ctrl->vidcon2);
+
+ /* set polarity */
+ cfg = 0;
+ if (!pvid->vl_clkp)
+ cfg |= EXYNOS_VIDCON1_IVCLK_RISING_EDGE;
+ if (!pvid->vl_hsp)
+ cfg |= EXYNOS_VIDCON1_IHSYNC_INVERT;
+ if (!pvid->vl_vsp)
+ cfg |= EXYNOS_VIDCON1_IVSYNC_INVERT;
+ if (!pvid->vl_dp)
+ cfg |= EXYNOS_VIDCON1_IVDEN_INVERT;
+
+ writel(cfg, (unsigned int)&fimd_ctrl->vidcon1 + offset);
+
+ /* set timing */
+ cfg = EXYNOS_VIDTCON0_VFPD(pvid->vl_vfpd - 1);
+ cfg |= EXYNOS_VIDTCON0_VBPD(pvid->vl_vbpd - 1);
+ cfg |= EXYNOS_VIDTCON0_VSPW(pvid->vl_vspw - 1);
+ writel(cfg, (unsigned int)&fimd_ctrl->vidtcon0 + offset);
+
+ cfg = EXYNOS_VIDTCON1_HFPD(pvid->vl_hfpd - 1);
+ cfg |= EXYNOS_VIDTCON1_HBPD(pvid->vl_hbpd - 1);
+ cfg |= EXYNOS_VIDTCON1_HSPW(pvid->vl_hspw - 1);
+
+ writel(cfg, (unsigned int)&fimd_ctrl->vidtcon1 + offset);
+
+ /* set lcd size */
+ cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1) |
+ EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1) |
+ EXYNOS_VIDTCON2_HOZVAL_E(pvid->vl_col - 1) |
+ EXYNOS_VIDTCON2_LINEVAL_E(pvid->vl_row - 1);
+
+ writel(cfg, (unsigned int)&fimd_ctrl->vidtcon2 + offset);
+ }
+
+ /* set display mode */
+ cfg = readl(&fimd_ctrl->vidcon0);
+ cfg &= ~EXYNOS_VIDCON0_PNRMODE_MASK;
+ cfg |= (rgb_mode << EXYNOS_VIDCON0_PNRMODE_SHIFT);
+ writel(cfg, &fimd_ctrl->vidcon0);
+
+ /* set par */
+ exynos_fimd_set_par(pvid, pvid->win_id);
+
+ /* set memory address */
+ exynos_fimd_set_buffer_address(pvid, pvid->win_id, lcd_base_address);
+
+ /* set buffer size */
+ cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col *
+ NBITS(pvid->vl_bpix) / 8) |
+ EXYNOS_VIDADDR_PAGEWIDTH_E(pvid->vl_col *
+ NBITS(pvid->vl_bpix) / 8) |
+ EXYNOS_VIDADDR_OFFSIZE(0) |
+ EXYNOS_VIDADDR_OFFSIZE_E(0);
+
+ writel(cfg, (unsigned int)&fimd_ctrl->vidw00add2 +
+ EXYNOS_BUFFER_SIZE(pvid->win_id));
+
+ /* set clock */
+ exynos_fimd_set_clock(pvid);
+
+ /* set rgb mode to dual lcd. */
+ exynos_fimd_set_dualrgb(pvid, pvid->dual_lcd_enabled);
+
+ /* display on */
+ exynos_fimd_lcd_on(pvid);
+
+ /* window on */
+ exynos_fimd_window_on(pvid, pvid->win_id);
+
+ exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled);
+}
+
+unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid)
+{
+ return pvid->vl_col * pvid->vl_row * (NBITS(pvid->vl_bpix) / 8);
+}
+
ushort *configuration_get_cmap(void)
{
#if defined(CONFIG_LCD_LOGO)
diff --git a/drivers/video/exynos/exynos_fimd.c b/drivers/video/exynos/exynos_fimd.c
deleted file mode 100644
index 039d4c5..0000000
--- a/drivers/video/exynos/exynos_fimd.c
+++ /dev/null
@@ -1,405 +0,0 @@
-/*
- * Copyright (C) 2012 Samsung Electronics
- *
- * Author: InKi Dae <inki.dae@samsung.com>
- * Author: Donghwa Lee <dh09.lee@samsung.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/io.h>
-#include <lcd.h>
-#include <div64.h>
-#include <fdtdec.h>
-#include <libfdt.h>
-#include <asm/arch/clk.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/cpu.h>
-#include "exynos_fb.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- if (enabled) {
- cfg = EXYNOS_DUALRGB_BYPASS_DUAL | EXYNOS_DUALRGB_LINESPLIT |
- EXYNOS_DUALRGB_VDEN_EN_ENABLE;
-
- /* in case of Line Split mode, MAIN_CNT doesn't neet to set. */
- cfg |= EXYNOS_DUALRGB_SUB_CNT(pvid->vl_col / 2) |
- EXYNOS_DUALRGB_MAIN_CNT(0);
- }
-
- writel(cfg, &fimd_ctrl->dualrgb);
-}
-
-static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid,
- unsigned int enabled)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- if (enabled)
- cfg = EXYNOS_DP_CLK_ENABLE;
-
- writel(cfg, &fimd_ctrl->dp_mie_clkcon);
-}
-
-static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- /* set window control */
- cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
- EXYNOS_WINCON(win_id));
-
- cfg &= ~(EXYNOS_WINCON_BITSWP_ENABLE | EXYNOS_WINCON_BYTESWP_ENABLE |
- EXYNOS_WINCON_HAWSWP_ENABLE | EXYNOS_WINCON_WSWP_ENABLE |
- EXYNOS_WINCON_BURSTLEN_MASK | EXYNOS_WINCON_BPPMODE_MASK |
- EXYNOS_WINCON_INRGB_MASK | EXYNOS_WINCON_DATAPATH_MASK);
-
- /* DATAPATH is DMA */
- cfg |= EXYNOS_WINCON_DATAPATH_DMA;
-
- cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
-
- /* dma burst is 16 */
- cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
-
- switch (pvid->vl_bpix) {
- case 4:
- cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
- break;
- default:
- cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
- break;
- }
-
- writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
- EXYNOS_WINCON(win_id));
-
- /* set window position to x=0, y=0*/
- cfg = EXYNOS_VIDOSD_LEFT_X(0) | EXYNOS_VIDOSD_TOP_Y(0);
- writel(cfg, (unsigned int)&fimd_ctrl->vidosd0a +
- EXYNOS_VIDOSD(win_id));
-
- cfg = EXYNOS_VIDOSD_RIGHT_X(pvid->vl_col - 1) |
- EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1) |
- EXYNOS_VIDOSD_RIGHT_X_E(1) |
- EXYNOS_VIDOSD_BOTTOM_Y_E(0);
-
- writel(cfg, (unsigned int)&fimd_ctrl->vidosd0b +
- EXYNOS_VIDOSD(win_id));
-
- /* set window size for window0*/
- cfg = EXYNOS_VIDOSD_SIZE(pvid->vl_col * pvid->vl_row);
- writel(cfg, (unsigned int)&fimd_ctrl->vidosd0c +
- EXYNOS_VIDOSD(win_id));
-}
-
-static void exynos_fimd_set_buffer_address(struct vidinfo *pvid,
- unsigned int win_id,
- ulong lcd_base_addr)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned long start_addr, end_addr;
-
- start_addr = lcd_base_addr;
- end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) *
- pvid->vl_row);
-
- writel(start_addr, (unsigned int)&fimd_ctrl->vidw00add0b0 +
- EXYNOS_BUFFER_OFFSET(win_id));
- writel(end_addr, (unsigned int)&fimd_ctrl->vidw00add1b0 +
- EXYNOS_BUFFER_OFFSET(win_id));
-}
-
-static void exynos_fimd_set_clock(struct vidinfo *pvid)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0, div = 0, remainder, remainder_div;
- unsigned long pixel_clock;
- unsigned long long src_clock;
-
- if (pvid->dual_lcd_enabled) {
- pixel_clock = pvid->vl_freq *
- (pvid->vl_hspw + pvid->vl_hfpd +
- pvid->vl_hbpd + pvid->vl_col / 2) *
- (pvid->vl_vspw + pvid->vl_vfpd +
- pvid->vl_vbpd + pvid->vl_row);
- } else if (pvid->interface_mode == FIMD_CPU_INTERFACE) {
- pixel_clock = pvid->vl_freq *
- pvid->vl_width * pvid->vl_height *
- (pvid->cs_setup + pvid->wr_setup +
- pvid->wr_act + pvid->wr_hold + 1);
- } else {
- pixel_clock = pvid->vl_freq *
- (pvid->vl_hspw + pvid->vl_hfpd +
- pvid->vl_hbpd + pvid->vl_col) *
- (pvid->vl_vspw + pvid->vl_vfpd +
- pvid->vl_vbpd + pvid->vl_row);
- }
-
- cfg = readl(&fimd_ctrl->vidcon0);
- cfg &= ~(EXYNOS_VIDCON0_CLKSEL_MASK | EXYNOS_VIDCON0_CLKVALUP_MASK |
- EXYNOS_VIDCON0_CLKVAL_F(0xFF) | EXYNOS_VIDCON0_VCLKEN_MASK |
- EXYNOS_VIDCON0_CLKDIR_MASK);
- cfg |= (EXYNOS_VIDCON0_CLKSEL_SCLK | EXYNOS_VIDCON0_CLKVALUP_ALWAYS |
- EXYNOS_VIDCON0_VCLKEN_NORMAL | EXYNOS_VIDCON0_CLKDIR_DIVIDED);
-
- src_clock = (unsigned long long) get_lcd_clk();
-
- /* get quotient and remainder. */
- remainder = do_div(src_clock, pixel_clock);
- div = src_clock;
-
- remainder *= 10;
- remainder_div = remainder / pixel_clock;
-
- /* round about one places of decimals. */
- if (remainder_div >= 5)
- div++;
-
- /* in case of dual lcd mode. */
- if (pvid->dual_lcd_enabled)
- div--;
-
- cfg |= EXYNOS_VIDCON0_CLKVAL_F(div - 1);
- writel(cfg, &fimd_ctrl->vidcon0);
-}
-
-void exynos_set_trigger(struct vidinfo *pvid)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- cfg = readl(&fimd_ctrl->trigcon);
-
- cfg |= (EXYNOS_I80SOFT_TRIG_EN | EXYNOS_I80START_TRIG);
-
- writel(cfg, &fimd_ctrl->trigcon);
-}
-
-int exynos_is_i80_frame_done(struct vidinfo *pvid)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
- int status;
-
- cfg = readl(&fimd_ctrl->trigcon);
-
- /* frame done func is valid only when TRIMODE[0] is set to 1. */
- status = (cfg & EXYNOS_I80STATUS_TRIG_DONE) ==
- EXYNOS_I80STATUS_TRIG_DONE;
-
- return status;
-}
-
-static void exynos_fimd_lcd_on(struct vidinfo *pvid)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- /* display on */
- cfg = readl(&fimd_ctrl->vidcon0);
- cfg |= (EXYNOS_VIDCON0_ENVID_ENABLE | EXYNOS_VIDCON0_ENVID_F_ENABLE);
- writel(cfg, &fimd_ctrl->vidcon0);
-}
-
-static void exynos_fimd_window_on(struct vidinfo *pvid, unsigned int win_id)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- /* enable window */
- cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
- EXYNOS_WINCON(win_id));
- cfg |= EXYNOS_WINCON_ENWIN_ENABLE;
- writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
- EXYNOS_WINCON(win_id));
-
- cfg = readl(&fimd_ctrl->winshmap);
- cfg |= EXYNOS_WINSHMAP_CH_ENABLE(win_id);
- writel(cfg, &fimd_ctrl->winshmap);
-}
-
-void exynos_fimd_lcd_off(struct vidinfo *pvid)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- cfg = readl(&fimd_ctrl->vidcon0);
- cfg &= (EXYNOS_VIDCON0_ENVID_DISABLE | EXYNOS_VIDCON0_ENVID_F_DISABLE);
- writel(cfg, &fimd_ctrl->vidcon0);
-}
-
-void exynos_fimd_window_off(struct vidinfo *pvid, unsigned int win_id)
-{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
- unsigned int cfg = 0;
-
- cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
- EXYNOS_WINCON(win_id));
- cfg &= EXYNOS_WINCON_ENWIN_DISABLE;
- writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
- EXYNOS_WINCON(win_id));
-
- cfg = readl(&fimd_ctrl->winshmap);
- cfg &= ~EXYNOS_WINSHMAP_CH_DISABLE(win_id);
- writel(cfg, &fimd_ctrl->winshmap);
-}
-
-/*
-* The reset value for FIMD SYSMMU register MMU_CTRL is 3
-* on Exynos5420 and newer versions.
-* This means FIMD SYSMMU is on by default on Exynos5420
-* and newer versions.
-* Since in u-boot we don't use SYSMMU, we should disable
-* those FIMD SYSMMU.
-* Note that there are 2 SYSMMU for FIMD: m0 and m1.
-* m0 handles windows 0 and 4, and m1 handles windows 1, 2 and 3.
-* We disable both of them here.
-*/
-void exynos_fimd_disable_sysmmu(void)
-{
- u32 *sysmmufimd;
- unsigned int node;
- int node_list[2];
- int count;
- int i;
-
- count = fdtdec_find_aliases_for_id(gd->fdt_blob, "fimd",
- COMPAT_SAMSUNG_EXYNOS_SYSMMU, node_list, 2);
- for (i = 0; i < count; i++) {
- node = node_list[i];
- if (node <= 0) {
- debug("Can't get device node for fimd sysmmu\n");
- return;
- }
-
- sysmmufimd = (u32 *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
- if (!sysmmufimd) {
- debug("Can't get base address for sysmmu fimdm0");
- return;
- }
-
- writel(0x0, sysmmufimd);
- }
-}
-
-void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address)
-{
- struct exynos_fb *fimd_ctrl;
- unsigned int cfg = 0, rgb_mode;
- unsigned int offset;
- unsigned int node;
-
- node = fdtdec_next_compatible(gd->fdt_blob,
- 0, COMPAT_SAMSUNG_EXYNOS_FIMD);
- if (node <= 0)
- debug("exynos_fb: Can't get device node for fimd\n");
-
- fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node,
- "reg");
- if (fimd_ctrl == NULL)
- debug("Can't get the FIMD base address\n");
- pvid->fimd_ctrl = fimd_ctrl;
-
- if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu"))
- exynos_fimd_disable_sysmmu();
-
- offset = exynos_fimd_get_base_offset();
-
- rgb_mode = pvid->rgb_mode;
-
- if (pvid->interface_mode == FIMD_RGB_INTERFACE) {
- cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
- writel(cfg, &fimd_ctrl->vidcon0);
-
- cfg = readl(&fimd_ctrl->vidcon2);
- cfg &= ~(EXYNOS_VIDCON2_WB_MASK |
- EXYNOS_VIDCON2_TVFORMATSEL_MASK |
- EXYNOS_VIDCON2_TVFORMATSEL_YUV_MASK);
- cfg |= EXYNOS_VIDCON2_WB_DISABLE;
- writel(cfg, &fimd_ctrl->vidcon2);
-
- /* set polarity */
- cfg = 0;
- if (!pvid->vl_clkp)
- cfg |= EXYNOS_VIDCON1_IVCLK_RISING_EDGE;
- if (!pvid->vl_hsp)
- cfg |= EXYNOS_VIDCON1_IHSYNC_INVERT;
- if (!pvid->vl_vsp)
- cfg |= EXYNOS_VIDCON1_IVSYNC_INVERT;
- if (!pvid->vl_dp)
- cfg |= EXYNOS_VIDCON1_IVDEN_INVERT;
-
- writel(cfg, (unsigned int)&fimd_ctrl->vidcon1 + offset);
-
- /* set timing */
- cfg = EXYNOS_VIDTCON0_VFPD(pvid->vl_vfpd - 1);
- cfg |= EXYNOS_VIDTCON0_VBPD(pvid->vl_vbpd - 1);
- cfg |= EXYNOS_VIDTCON0_VSPW(pvid->vl_vspw - 1);
- writel(cfg, (unsigned int)&fimd_ctrl->vidtcon0 + offset);
-
- cfg = EXYNOS_VIDTCON1_HFPD(pvid->vl_hfpd - 1);
- cfg |= EXYNOS_VIDTCON1_HBPD(pvid->vl_hbpd - 1);
- cfg |= EXYNOS_VIDTCON1_HSPW(pvid->vl_hspw - 1);
-
- writel(cfg, (unsigned int)&fimd_ctrl->vidtcon1 + offset);
-
- /* set lcd size */
- cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1) |
- EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1) |
- EXYNOS_VIDTCON2_HOZVAL_E(pvid->vl_col - 1) |
- EXYNOS_VIDTCON2_LINEVAL_E(pvid->vl_row - 1);
-
- writel(cfg, (unsigned int)&fimd_ctrl->vidtcon2 + offset);
- }
-
- /* set display mode */
- cfg = readl(&fimd_ctrl->vidcon0);
- cfg &= ~EXYNOS_VIDCON0_PNRMODE_MASK;
- cfg |= (rgb_mode << EXYNOS_VIDCON0_PNRMODE_SHIFT);
- writel(cfg, &fimd_ctrl->vidcon0);
-
- /* set par */
- exynos_fimd_set_par(pvid, pvid->win_id);
-
- /* set memory address */
- exynos_fimd_set_buffer_address(pvid, pvid->win_id, lcd_base_address);
-
- /* set buffer size */
- cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col * NBITS(pvid->vl_bpix) / 8) |
- EXYNOS_VIDADDR_PAGEWIDTH_E(pvid->vl_col * NBITS(pvid->vl_bpix) / 8) |
- EXYNOS_VIDADDR_OFFSIZE(0) |
- EXYNOS_VIDADDR_OFFSIZE_E(0);
-
- writel(cfg, (unsigned int)&fimd_ctrl->vidw00add2 +
- EXYNOS_BUFFER_SIZE(pvid->win_id));
-
- /* set clock */
- exynos_fimd_set_clock(pvid);
-
- /* set rgb mode to dual lcd. */
- exynos_fimd_set_dualrgb(pvid, pvid->dual_lcd_enabled);
-
- /* display on */
- exynos_fimd_lcd_on(pvid);
-
- /* window on */
- exynos_fimd_window_on(pvid, pvid->win_id);
-
- exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled);
-}
-
-unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid)
-{
- return pvid->vl_col * pvid->vl_row * (NBITS(pvid->vl_bpix) / 8);
-}
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 12/25] exynos: pwm: Add a driver for the exynos5 PWM
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (10 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 11/25] exynos: video: Combine LCD driver into one file Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 13/25] video: Add an enum for active low/high Simon Glass
` (12 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
This driver supports the standard PWM API. There are 5 PWMs. Four are used
normally and the last is normally used as a timer.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/cpu/armv7/s5p-common/timer.c | 3 +
drivers/pwm/Kconfig | 9 +++
drivers/pwm/Makefile | 1 +
drivers/pwm/exynos_pwm.c | 120 ++++++++++++++++++++++++++++++++++
4 files changed, 133 insertions(+)
create mode 100644 drivers/pwm/exynos_pwm.c
diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c
index 949abb1..b63036c 100644
--- a/arch/arm/cpu/armv7/s5p-common/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -12,6 +12,9 @@
#include <asm/io.h>
#include <asm/arch/pwm.h>
#include <asm/arch/clk.h>
+
+/* Use the old PWM interface for now */
+#undef CONFIG_DM_PWM
#include <pwm.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index 6f0d61e..37ea2b8 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -9,6 +9,15 @@ config DM_PWM
frequency/period can be controlled along with the proportion of that
time that the signal is high.
+config PWM_EXYNOS
+ bool "Enable support for the Exynos PWM"
+ depends on DM_PWM
+ help
+ This PWM is found on Samsung Exynos 5250 and other Samsung SoCs. It
+ supports a programmable period and duty cycle. A 32-bit counter is
+ used. It provides 5 channels which can be independently
+ programmed. Channel 4 (the last) is normally used as a timer.
+
config PWM_ROCKCHIP
bool "Enable support for the Rockchip PWM"
depends on DM_PWM
diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
index fd414b1..af39347 100644
--- a/drivers/pwm/Makefile
+++ b/drivers/pwm/Makefile
@@ -15,4 +15,5 @@ obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o
obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
ifdef CONFIG_DM_PWM
obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o
+obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o
endif
diff --git a/drivers/pwm/exynos_pwm.c b/drivers/pwm/exynos_pwm.c
new file mode 100644
index 0000000..a0edafc
--- /dev/null
+++ b/drivers/pwm/exynos_pwm.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright 2016 Google Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pwm.h>
+#include <asm/io.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/pwm.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct exynos_pwm_priv {
+ struct s5p_timer *regs;
+};
+
+static int exynos_pwm_set_config(struct udevice *dev, uint channel,
+ uint period_ns, uint duty_ns)
+{
+ struct exynos_pwm_priv *priv = dev_get_priv(dev);
+ struct s5p_timer *regs = priv->regs;
+ unsigned int offset, prescaler;
+ uint div = 4, rate, rate_ns;
+ u32 val;
+ u32 tcnt, tcmp, tcon;
+
+ if (channel >= 5)
+ return -EINVAL;
+ debug("%s: Configure '%s' channel %u, period_ns %u, duty_ns %u\n",
+ __func__, dev->name, channel, period_ns, duty_ns);
+
+ val = readl(®s->tcfg0);
+ prescaler = (channel < 2 ? val : (val >> 8)) & 0xff;
+ div = (readl(®s->tcfg1) >> MUX_DIV_SHIFT(channel)) & 0xf;
+
+ rate = get_pwm_clk() / ((prescaler + 1) * (1 << div));
+ debug("%s: pwm_clk %lu, rate %u\n", __func__, get_pwm_clk(), rate);
+
+ if (channel < 4) {
+ rate_ns = 1000000000 / rate;
+ tcnt = period_ns / rate_ns;
+ tcmp = duty_ns / rate_ns;
+ debug("%s: tcnt %u, tcmp %u\n", __func__, tcnt, tcmp);
+ offset = channel * 3;
+ writel(tcnt, ®s->tcntb0 + offset);
+ writel(tcmp, ®s->tcmpb0 + offset);
+ }
+
+ tcon = readl(®s->tcon);
+ tcon |= TCON_UPDATE(channel);
+ if (channel < 4)
+ tcon |= TCON_AUTO_RELOAD(channel);
+ else
+ tcon |= TCON4_AUTO_RELOAD;
+ writel(tcon, ®s->tcon);
+
+ tcon &= ~TCON_UPDATE(channel);
+ writel(tcon, ®s->tcon);
+
+ return 0;
+}
+
+static int exynos_pwm_set_enable(struct udevice *dev, uint channel,
+ bool enable)
+{
+ struct exynos_pwm_priv *priv = dev_get_priv(dev);
+ struct s5p_timer *regs = priv->regs;
+ u32 mask;
+
+ if (channel >= 4)
+ return -EINVAL;
+ debug("%s: Enable '%s' channel %u\n", __func__, dev->name, channel);
+ mask = TCON_START(channel);
+ clrsetbits_le32(®s->tcon, mask, enable ? mask : 0);
+
+ return 0;
+}
+
+static int exynos_pwm_probe(struct udevice *dev)
+{
+ struct exynos_pwm_priv *priv = dev_get_priv(dev);
+ struct s5p_timer *regs = priv->regs;
+
+ writel(PRESCALER_0 | PRESCALER_1 << 8, ®s->tcfg0);
+
+ return 0;
+}
+
+static int exynos_pwm_ofdata_to_platdata(struct udevice *dev)
+{
+ struct exynos_pwm_priv *priv = dev_get_priv(dev);
+
+ priv->regs = (struct s5p_timer *)dev_get_addr(dev);
+
+ return 0;
+}
+
+static const struct pwm_ops exynos_pwm_ops = {
+ .set_config = exynos_pwm_set_config,
+ .set_enable = exynos_pwm_set_enable,
+};
+
+static const struct udevice_id exynos_channels[] = {
+ { .compatible = "samsung,exynos4210-pwm" },
+ { }
+};
+
+U_BOOT_DRIVER(exynos_pwm) = {
+ .name = "exynos_pwm",
+ .id = UCLASS_PWM,
+ .of_match = exynos_channels,
+ .ops = &exynos_pwm_ops,
+ .probe = exynos_pwm_probe,
+ .ofdata_to_platdata = exynos_pwm_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct exynos_pwm_priv),
+};
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 13/25] video: Add an enum for active low/high
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (11 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 12/25] exynos: pwm: Add a driver for the exynos5 PWM Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 14/25] exynos: dts: Add pwm device tree node Simon Glass
` (11 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
This is used for video signals in some drivers so provide a standard way
of representing it in an enum.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/video.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/include/video.h b/include/video.h
index 5b147ba..41e3cbf 100644
--- a/include/video.h
+++ b/include/video.h
@@ -23,6 +23,11 @@ struct video_uc_platdata {
ulong base;
};
+enum video_polarity {
+ VIDEO_ACTIVE_HIGH, /* Pins are active high */
+ VIDEO_ACTIVE_LOW, /* Pins are active low */
+};
+
/*
* Bits per pixel selector. Each value n is such that the bits-per-pixel is
* 2 ^ n
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 14/25] exynos: dts: Add pwm device tree node
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (12 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 13/25] video: Add an enum for active low/high Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 15/25] exynos: Allow tizen to be built without an LCD Simon Glass
` (10 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
Add this node from Linux v4.4 so that PWMs can be used in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/exynos5250.dtsi | 7 +++++++
arch/arm/dts/exynos54xx.dtsi | 7 +++++++
2 files changed, 14 insertions(+)
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 7eef3e3..d44c9f6 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -116,4 +116,11 @@
};
};
+ pwm: pwm at 12dd0000 {
+ compatible = "samsung,exynos4210-pwm";
+ reg = <0x12dd0000 0x100>;
+ samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+ #pwm-cells = <3>;
+ };
+
};
diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi
index daa6a33..be99a82 100644
--- a/arch/arm/dts/exynos54xx.dtsi
+++ b/arch/arm/dts/exynos54xx.dtsi
@@ -197,6 +197,13 @@
mem-type = "ddr3";
};
+ pwm: pwm at 12dd0000 {
+ compatible = "samsung,exynos4210-pwm";
+ reg = <0x12dd0000 0x100>;
+ samsung,pwm-outputs = <0>, <1>, <2>, <3>;
+ #pwm-cells = <3>;
+ };
+
xhci1: xhci at 12400000 {
compatible = "samsung,exynos5250-xhci";
reg = <0x12400000 0x10000>;
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 15/25] exynos: Allow tizen to be built without an LCD
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (13 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 14/25] exynos: dts: Add pwm device tree node Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 16/25] exynos: Allow CONFIG_MISC_COMMON to be build " Simon Glass
` (9 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
This file currently requires an LCD. Adjust it to work without one.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/libtizen.h | 2 ++
lib/tizen/tizen.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/include/libtizen.h b/include/libtizen.h
index 6490fb5..55dccff 100644
--- a/include/libtizen.h
+++ b/include/libtizen.h
@@ -10,6 +10,8 @@
#define HD_RESOLUTION 0
+#ifdef CONFIG_LCD
void get_tizen_logo_info(vidinfo_t *vid);
+#endif
#endif /* _LIBTIZEN_H_ */
diff --git a/lib/tizen/tizen.c b/lib/tizen/tizen.c
index 814ed18..d207f77 100644
--- a/lib/tizen/tizen.c
+++ b/lib/tizen/tizen.c
@@ -12,6 +12,7 @@
#include "tizen_logo_16bpp.h"
#include "tizen_logo_16bpp_gzip.h"
+#ifdef CONFIG_LCD
void get_tizen_logo_info(vidinfo_t *vid)
{
switch (vid->vl_bpix) {
@@ -31,3 +32,4 @@ void get_tizen_logo_info(vidinfo_t *vid)
break;
}
}
+#endif
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 16/25] exynos: Allow CONFIG_MISC_COMMON to be build without an LCD
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (14 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 15/25] exynos: Allow tizen to be built without an LCD Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 17/25] exynos: Disable LCD display for boards we can't convert Simon Glass
` (8 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
This file currently requires LCD support. Adjust it so that it can still be
built without LCD support (even thought it won't work fully).
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/samsung/common/misc.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index da0d4db..77d0a4e 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -147,6 +147,7 @@ static int key_pressed(int key)
return value;
}
+#ifdef CONFIG_LCD
static int check_keys(void)
{
int keys = 0;
@@ -235,9 +236,11 @@ static void display_board_info(void)
lcd_printf("\tDisplay BPP: %u\n", 1 << vid->vl_bpix);
}
+#endif
static int mode_leave_menu(int mode)
{
+#ifdef CONFIG_LCD
char *exit_option;
char *exit_reset = "reset";
char *exit_back = "back";
@@ -301,8 +304,12 @@ static int mode_leave_menu(int mode)
lcd_clear();
return leave;
+#else
+ return 0;
+#endif
}
+#ifdef CONFIG_LCD
static void display_download_menu(int mode)
{
char *selection[BOOT_MODE_EXIT + 1];
@@ -320,9 +327,11 @@ static void display_download_menu(int mode)
lcd_printf("\t%s %s - %s\n\n", selection[i],
mode_name[i][0], mode_info[i]);
}
+#endif
static void download_menu(void)
{
+#ifdef CONFIG_LCD
int mode = 0;
int last_mode = 0;
int run;
@@ -393,6 +402,7 @@ static void download_menu(void)
}
lcd_clear();
+#endif
}
void check_boot_mode(void)
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 17/25] exynos: Disable LCD display for boards we can't convert
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (15 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 16/25] exynos: Allow CONFIG_MISC_COMMON to be build " Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 18/25] dts: Add clock and regulator binding files for max77802 Simon Glass
` (7 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
Some boards have the LCD enabled but I cannot test operation for the driver
model conversion. Disable the LCD on these to avoid build errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/samsung/trats/trats.c | 2 ++
board/samsung/universal_c210/universal.c | 2 ++
include/configs/s5pc210_universal.h | 3 ---
include/configs/smdk5250.h | 3 +++
include/configs/smdk5420.h | 4 ++++
include/configs/trats.h | 4 ----
include/configs/trats2.h | 4 ----
7 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 54d01ec..66a54d4 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -596,6 +596,7 @@ int mipi_power(void)
return 0;
}
+#ifdef CONFIG_LCD
void exynos_lcd_misc_init(vidinfo_t *vid)
{
#ifdef CONFIG_TIZEN
@@ -606,3 +607,4 @@ void exynos_lcd_misc_init(vidinfo_t *vid)
setenv("lcdinfo", "lcd=s6e8ax0");
#endif
}
+#endif
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index c25b486..950e039 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -367,6 +367,7 @@ int exynos_init(void)
return 0;
}
+#ifdef CONFIG_LCD
void exynos_lcd_misc_init(vidinfo_t *vid)
{
#ifdef CONFIG_TIZEN
@@ -379,3 +380,4 @@ void exynos_lcd_misc_init(vidinfo_t *vid)
setenv("lcdinfo", "lcd=ld9040");
}
+#endif
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 7bb62ca..8e63407 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -222,9 +222,6 @@ int universal_spi_read(void);
/*
* LCD Settings
*/
-#define CONFIG_EXYNOS_FB
-#define CONFIG_LCD
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_LD9040
#define CONFIG_VIDEO_BMP_GZIP
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index f66bb12..92a0833 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -13,6 +13,9 @@
#include <configs/exynos5-dt-common.h>
#include <configs/exynos5-common.h>
+#undef CONFIG_LCD
+#undef CONFIG_EXYNOS_FB
+#undef CONFIG_EXYNOS_DP
#undef CONFIG_KEYBOARD
#define CONFIG_BOARD_COMMON
diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h
index 9cf886c..5fe21d9 100644
--- a/include/configs/smdk5420.h
+++ b/include/configs/smdk5420.h
@@ -13,6 +13,10 @@
#include <configs/exynos5-dt-common.h>
#include <configs/exynos5-common.h>
+#undef CONFIG_LCD
+#undef CONFIG_EXYNOS_FB
+#undef CONFIG_EXYNOS_DP
+
#undef CONFIG_KEYBOARD
#define CONFIG_BOARD_COMMON
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5fb991b..0423033 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -247,12 +247,8 @@
#define CONFIG_SYS_WHITE_ON_BLACK
/* LCD */
-#define CONFIG_EXYNOS_FB
-#define CONFIG_LCD
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_FB_ADDR 0x52504000
-#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index f12a952..24fbc1a 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -226,12 +226,8 @@ int get_soft_i2c_sda_pin(void);
#define CONFIG_SYS_WHITE_ON_BLACK
/* LCD */
-#define CONFIG_EXYNOS_FB
-#define CONFIG_LCD
-#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_FB_ADDR 0x52504000
-#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 18/25] dts: Add clock and regulator binding files for max77802
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (16 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 17/25] exynos: Disable LCD display for boards we can't convert Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 19/25] exynos: Allow PWM0 pinmux to be set up Simon Glass
` (6 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
These are used by peach_pit and peach_pi. Add them so they can be referenced
in the device tree files.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
include/dt-bindings/clock/maxim,max77802.h | 22 ++++++++++++++++++++++
include/dt-bindings/regulator/maxim,max77802.h | 18 ++++++++++++++++++
2 files changed, 40 insertions(+)
create mode 100644 include/dt-bindings/clock/maxim,max77802.h
create mode 100644 include/dt-bindings/regulator/maxim,max77802.h
diff --git a/include/dt-bindings/clock/maxim,max77802.h b/include/dt-bindings/clock/maxim,max77802.h
new file mode 100644
index 0000000..997312e
--- /dev/null
+++ b/include/dt-bindings/clock/maxim,max77802.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clocks for the Maxim 77802 PMIC.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H
+#define _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H
+
+/* Fixed rate clocks. */
+
+#define MAX77802_CLK_32K_AP 0
+#define MAX77802_CLK_32K_CP 1
+
+/* Total number of clocks. */
+#define MAX77802_CLKS_NUM (MAX77802_CLK_32K_CP + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_MAXIM_MAX77802_CLOCK_H */
diff --git a/include/dt-bindings/regulator/maxim,max77802.h b/include/dt-bindings/regulator/maxim,max77802.h
new file mode 100644
index 0000000..cf28631
--- /dev/null
+++ b/include/dt-bindings/regulator/maxim,max77802.h
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2014 Google, Inc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants for the Maxim 77802 PMIC regulators
+ */
+
+#ifndef _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H
+#define _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H
+
+/* Regulator operating modes */
+#define MAX77802_OPMODE_LP 1
+#define MAX77802_OPMODE_NORMAL 3
+
+#endif /* _DT_BINDINGS_REGULATOR_MAXIM_MAX77802_H */
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 19/25] exynos: Allow PWM0 pinmux to be set up
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (17 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 18/25] dts: Add clock and regulator binding files for max77802 Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 9:31 ` Minkyu Kang
2016-01-15 0:00 ` [U-Boot] [PATCH 20/25] exynos: Simplify calling of exynos_dp_phy_ctrl() Simon Glass
` (5 subsequent siblings)
24 siblings, 1 reply; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
This is commonly used for LCD backlight control. Add pinmux support for it
on exynos5250 and 5420.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/pinmux.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c
index 12eb79c..fec2df9 100644
--- a/arch/arm/mach-exynos/pinmux.c
+++ b/arch/arm/mach-exynos/pinmux.c
@@ -506,6 +506,9 @@ static int exynos5_pinmux_config(int peripheral, int flags)
*/
gpio_set_pull(EXYNOS5_GPIO_X07, S5P_GPIO_PULL_NONE);
break;
+ case PERIPH_ID_PWM0:
+ gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_FUNC(2));
+ break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
@@ -548,6 +551,9 @@ static int exynos5420_pinmux_config(int peripheral, int flags)
case PERIPH_ID_I2C10:
exynos5420_i2c_config(peripheral);
break;
+ case PERIPH_ID_PWM0:
+ gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(2));
+ break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
return -1;
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 20/25] exynos: Simplify calling of exynos_dp_phy_ctrl()
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (18 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 19/25] exynos: Allow PWM0 pinmux to be set up Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 21/25] exynos: dts: Add display-related device tree fragments Simon Glass
` (4 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
This function controls enabling the EDP PHY. Rename it and drop the existing
weak functions, which are confusing.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/include/mach/power.h | 2 +-
arch/arm/mach-exynos/power.c | 2 +-
board/samsung/common/exynos5-dt.c | 5 -----
drivers/video/exynos/exynos_dp.c | 9 ++-------
4 files changed, 4 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/power.h b/arch/arm/mach-exynos/include/mach/power.h
index 3f97b31..88f70d9 100644
--- a/arch/arm/mach-exynos/include/mach/power.h
+++ b/arch/arm/mach-exynos/include/mach/power.h
@@ -1717,7 +1717,7 @@ void set_usbdrd_phy_ctrl(unsigned int enable);
#define POWER_USB_DRD_PHY_CTRL_EN (1 << 0)
#define POWER_USB_DRD_PHY_CTRL_DISABLE (0 << 0)
-void set_dp_phy_ctrl(unsigned int enable);
+void exynos_dp_phy_ctrl(unsigned int enable);
#define EXYNOS_DP_PHY_ENABLE (1 << 0)
diff --git a/arch/arm/mach-exynos/power.c b/arch/arm/mach-exynos/power.c
index cd2d661..c923460 100644
--- a/arch/arm/mach-exynos/power.c
+++ b/arch/arm/mach-exynos/power.c
@@ -147,7 +147,7 @@ static void exynos5_dp_phy_control(unsigned int enable)
writel(cfg, &power->dptx_phy_control);
}
-void set_dp_phy_ctrl(unsigned int enable)
+void exynos_dp_phy_ctrl(unsigned int enable)
{
if (cpu_is_exynos5())
exynos5_dp_phy_control(enable);
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
index 4d9e151..0dcea71 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -235,11 +235,6 @@ void exynos_cfg_lcd_gpio(void)
gpio_set_value(EXYNOS5_GPIO_B20, 1);
}
-void exynos_set_dp_phy(unsigned int onoff)
-{
- set_dp_phy_ctrl(onoff);
-}
-
static int board_dp_set_backlight(int percent)
{
struct udevice *dev;
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 0319d99..a812784 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -15,6 +15,7 @@
#include <asm/arch/cpu.h>
#include <asm/arch/dp_info.h>
#include <asm/arch/dp.h>
+#include <asm/arch/power.h>
#include <fdtdec.h>
#include <libfdt.h>
@@ -22,12 +23,6 @@
DECLARE_GLOBAL_DATA_PTR;
-void __exynos_set_dp_phy(unsigned int onoff)
-{
-}
-void exynos_set_dp_phy(unsigned int onoff)
- __attribute__((weak, alias("__exynos_set_dp_phy")));
-
static void exynos_dp_disp_info(struct edp_disp_info *disp_info)
{
disp_info->h_total = disp_info->h_res + disp_info->h_sync_width +
@@ -959,7 +954,7 @@ unsigned int exynos_init_dp(void)
exynos_dp_disp_info(&edp_info->disp_info);
- exynos_set_dp_phy(1);
+ exynos_dp_phy_ctrl(1);
ret = exynos_dp_init_dp(dp_regs);
if (ret != EXYNOS_DP_SUCCESS) {
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 21/25] exynos: dts: Add display-related device tree fragments
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (19 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 20/25] exynos: Simplify calling of exynos_dp_phy_ctrl() Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 22/25] exynos: video: Rename edp_device_info to exynos_dp_priv Simon Glass
` (3 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
Bring in device tree pieces related to display from Linux 4.4 for:
- snow
- peach_pit
- peach_pi
- spring
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/dts/exynos5.dtsi | 3 +-
arch/arm/dts/exynos5250-snow.dts | 44 ++++++++++++++++++++++++++++
arch/arm/dts/exynos5250-spring.dts | 53 +++++++++++++++++++++++++++++++++
arch/arm/dts/exynos5420-peach-pit.dts | 55 +++++++++++++++++++++++++++++++++++
arch/arm/dts/exynos54xx.dtsi | 4 +--
arch/arm/dts/exynos5800-peach-pi.dts | 40 +++++++++++++++++++++++++
6 files changed, 196 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/exynos5.dtsi b/arch/arm/dts/exynos5.dtsi
index 179584c..8650800 100644
--- a/arch/arm/dts/exynos5.dtsi
+++ b/arch/arm/dts/exynos5.dtsi
@@ -163,13 +163,14 @@
};
fimd at 14400000 {
+ u-boot,dm-pre-reloc;
compatible = "samsung,exynos-fimd";
reg = <0x14400000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
};
- dp at 145b0000 {
+ dp: dp at 145b0000 {
compatible = "samsung,exynos5-dp";
reg = <0x145b0000 0x1000>;
#address-cells = <1>;
diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index bda5499..29c13c1 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -198,6 +198,20 @@
reset-gpios = <&gpx1 5 GPIO_ACTIVE_LOW>;
hotplug-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>;
edid-emulation = <5>;
+
+ ports {
+ port at 0 {
+ bridge_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+
+ port at 1 {
+ bridge_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
};
soundcodec at 22 {
@@ -223,6 +237,27 @@
};
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 1000000 0>;
+ brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
+ default-brightness-level = <7>;
+ enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
+ power-supply = <&fet1>;
+ };
+
+ panel: panel {
+ compatible = "auo,b116xw03";
+ power-supply = <&fet6>;
+ backlight = <&backlight>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&bridge_out>;
+ };
+ };
+ };
+
spi at 131b0000 {
spi-max-frequency = <1000000>;
spi-deactivate-delay = <100>;
@@ -337,6 +372,15 @@
samsung,dynamic-range = <0>;
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
+ samsung,hpd-gpio = <&gpx0 7 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ port at 0 {
+ dp_out: endpoint {
+ remote-endpoint = <&bridge_in>;
+ };
+ };
+ };
};
};
diff --git a/arch/arm/dts/exynos5250-spring.dts b/arch/arm/dts/exynos5250-spring.dts
index 81b3d29..693501e 100644
--- a/arch/arm/dts/exynos5250-spring.dts
+++ b/arch/arm/dts/exynos5250-spring.dts
@@ -158,6 +158,27 @@
samsung,ycbcr-coeff = <0>;
samsung,color-depth = <1>;
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 1000000 0>;
+ brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
+ default-brightness-level = <1>;
+ enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
+ power-supply = <&fet1>;
+ };
+
+ panel: panel {
+ compatible = "auo,b116xw03";
+ power-supply = <&fet6>;
+ backlight = <&backlight>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&bridge_out>;
+ };
+ };
+ };
};
&i2c_0 {
@@ -385,6 +406,25 @@
};
};
+&dp {
+ status = "okay";
+ samsung,color-space = <0>;
+ samsung,dynamic-range = <0>;
+ samsung,ycbcr-coeff = <0>;
+ samsung,color-depth = <1>;
+ samsung,link-rate = <0x0a>;
+ samsung,lane-count = <1>;
+ samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ port at 0 {
+ dp_out: endpoint {
+ remote-endpoint = <&bridge_in>;
+ };
+ };
+ };
+};
+
&i2c_1 {
status = "okay";
samsung,i2c-sda-delay = <100>;
@@ -585,6 +625,19 @@
0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
0x04 0x54 0x14 /* LC -> RCO */
0x02 0xa1 0x91>; /* HPD high */
+ ports {
+ port at 0 {
+ bridge_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+
+ port at 1 {
+ bridge_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
};
soundcodec at 20 {
diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts
index 16d52f4..2db4ad2 100644
--- a/arch/arm/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/dts/exynos5420-peach-pit.dts
@@ -9,6 +9,8 @@
/dts-v1/;
#include "exynos54xx.dtsi"
+#include <dt-bindings/clock/maxim,max77802.h>
+#include <dt-bindings/regulator/maxim,max77802.h>
/ {
model = "Samsung/Google Peach Pit board based on Exynos5420";
@@ -29,6 +31,14 @@
i2c104 = &i2c_tunnel;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 1000000 0>;
+ brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
+ default-brightness-level = <7>;
+ power-supply = <&tps65090_fet1>;
+ };
+
dmc {
mem-manuf = "samsung";
mem-type = "ddr3";
@@ -188,6 +198,20 @@
0x04 0x59 0x60
0x04 0x54 0x14 /* LC -> RCO */
0x02 0xa1 0x91>; /* HPD high */
+
+ ports {
+ port at 0 {
+ bridge_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+
+ port at 1 {
+ bridge_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
};
};
@@ -203,6 +227,18 @@
};
};
+ panel: panel {
+ compatible = "auo,b116xw03";
+ power-supply = <&tps65090_fet6>;
+ backlight = <&backlight>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&bridge_out>;
+ };
+ };
+ };
+
spi at 12d30000 { /* spi1 */
spi-max-frequency = <50000000>;
firmware_storage_spi: flash at 0 {
@@ -254,6 +290,25 @@
};
};
+&dp {
+ status = "okay";
+ samsung,color-space = <0>;
+ samsung,dynamic-range = <0>;
+ samsung,ycbcr-coeff = <0>;
+ samsung,color-depth = <1>;
+ samsung,link-rate = <0x06>;
+ samsung,lane-count = <2>;
+ samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ port at 0 {
+ dp_out: endpoint {
+ remote-endpoint = <&bridge_in>;
+ };
+ };
+ };
+};
+
&spi_2 {
spi-max-frequency = <3125000>;
spi-deactivate-delay = <200>;
diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi
index be99a82..b4ddf53 100644
--- a/arch/arm/dts/exynos54xx.dtsi
+++ b/arch/arm/dts/exynos54xx.dtsi
@@ -49,7 +49,7 @@
status = "disabled";
};
- i2c at 12CA0000 {
+ hsi2c_4: i2c at 12CA0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "samsung,exynos5-hsi2c";
@@ -178,7 +178,7 @@
samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
};
- dp at 145b0000 {
+ dp: dp at 145b0000 {
samsung,lt-status = <0>;
samsung,master-mode = <0>;
diff --git a/arch/arm/dts/exynos5800-peach-pi.dts b/arch/arm/dts/exynos5800-peach-pi.dts
index 76826dc..4c139bf 100644
--- a/arch/arm/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/dts/exynos5800-peach-pi.dts
@@ -30,6 +30,27 @@
i2c104 = &i2c_tunnel;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 1000000 0>;
+ brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
+ default-brightness-level = <7>;
+ enable-gpios = <&gpx2 2 GPIO_ACTIVE_HIGH>;
+ power-supply = <&tps65090_fet1>;
+ };
+
+ panel: panel {
+ compatible = "auo,b133htn01";
+ power-supply = <&tps65090_fet6>;
+ backlight = <&backlight>;
+
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&dp_out>;
+ };
+ };
+ };
+
dmc {
mem-manuf = "samsung";
mem-type = "ddr3";
@@ -132,6 +153,25 @@
};
};
+&dp {
+ status = "okay";
+ samsung,color-space = <0>;
+ samsung,dynamic-range = <0>;
+ samsung,ycbcr-coeff = <0>;
+ samsung,color-depth = <1>;
+ samsung,link-rate = <0x0a>;
+ samsung,lane-count = <2>;
+ samsung,hpd-gpio = <&gpx2 6 GPIO_ACTIVE_HIGH>;
+
+ ports {
+ port {
+ dp_out: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+ };
+};
+
&spi_2 {
spi-max-frequency = <3125000>;
spi-deactivate-delay = <200>;
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 22/25] exynos: video: Rename edp_device_info to exynos_dp_priv
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (20 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 21/25] exynos: dts: Add display-related device tree fragments Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 23/25] exynos: video: Rename variables for driver model Simon Glass
` (2 subsequent siblings)
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
Rename this function to better fit with driver model. It is the private data
for the exynos EDP driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/include/mach/dp_info.h | 4 ++--
drivers/video/exynos/exynos_dp.c | 26 +++++++++++++-------------
drivers/video/exynos/exynos_dp_lowlevel.c | 2 +-
drivers/video/exynos/exynos_dp_lowlevel.h | 2 +-
4 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/dp_info.h b/arch/arm/mach-exynos/include/mach/dp_info.h
index 17e8f56..8ce33d6 100644
--- a/arch/arm/mach-exynos/include/mach/dp_info.h
+++ b/arch/arm/mach-exynos/include/mach/dp_info.h
@@ -61,7 +61,7 @@ struct edp_video_info {
unsigned int color_depth;
};
-struct edp_device_info {
+struct exynos_dp_priv {
struct edp_disp_info disp_info;
struct edp_link_train_info lt_info;
struct edp_video_info video_info;
@@ -185,7 +185,7 @@ enum {
struct exynos_dp_platform_data {
- struct edp_device_info *edp_dev_info;
+ struct exynos_dp_priv *edp_dev_info;
};
#ifdef CONFIG_EXYNOS_DP
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index a812784..9bd88b1 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -162,7 +162,7 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
}
static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
unsigned char buf[12];
unsigned int ret;
@@ -251,7 +251,7 @@ static void exynos_dp_init_training(struct exynos_dp *dp_regs)
}
static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
unsigned char buf[5];
unsigned int ret = 0;
@@ -376,7 +376,7 @@ static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *dp_regs,
}
static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info,
+ struct exynos_dp_priv *edp_info,
unsigned char *status)
{
unsigned int ret, i;
@@ -433,7 +433,7 @@ static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs,
}
static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
int ret;
@@ -453,7 +453,7 @@ static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs,
}
static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
int ret;
@@ -478,7 +478,7 @@ static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs,
}
static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
unsigned char lane_stat;
@@ -588,7 +588,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
}
static unsigned int exynos_dp_process_equalizer_training(
- struct exynos_dp *dp_regs, struct edp_device_info *edp_info)
+ struct exynos_dp *dp_regs, struct exynos_dp_priv *edp_info)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
unsigned char lane_stat, adj_req_sw, adj_req_em, i;
@@ -697,7 +697,7 @@ static unsigned int exynos_dp_process_equalizer_training(
}
static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
unsigned int ret = 0;
int training_finished;
@@ -748,7 +748,7 @@ static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs,
}
static unsigned int exynos_dp_set_link_train(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
unsigned int ret;
@@ -783,7 +783,7 @@ static void exynos_dp_enable_scramble(struct exynos_dp *dp_regs,
}
static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
unsigned int ret = 0;
unsigned int retry_cnt;
@@ -872,7 +872,7 @@ static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs,
return ret;
}
-int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info)
+int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *edp_info)
{
unsigned int node = fdtdec_next_compatible(blob, 0,
COMPAT_SAMSUNG_EXYNOS5_DP);
@@ -929,11 +929,11 @@ int exynos_dp_parse_dt(const void *blob, struct edp_device_info *edp_info)
unsigned int exynos_init_dp(void)
{
unsigned int ret;
- struct edp_device_info *edp_info;
+ struct exynos_dp_priv *edp_info;
struct exynos_dp *dp_regs;
int node;
- edp_info = kzalloc(sizeof(struct edp_device_info), GFP_KERNEL);
+ edp_info = kzalloc(sizeof(struct exynos_dp_priv), GFP_KERNEL);
if (!edp_info) {
debug("failed to allocate edp device object.\n");
return -EFAULT;
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index 05e64b6..3d9abdf 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -1066,7 +1066,7 @@ void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs,
}
int exynos_dp_config_video_bist(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info)
+ struct exynos_dp_priv *edp_info)
{
unsigned int reg;
unsigned int bist_type = 0;
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.h b/drivers/video/exynos/exynos_dp_lowlevel.h
index 85459b5..0a7657e 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.h
+++ b/drivers/video/exynos/exynos_dp_lowlevel.h
@@ -74,7 +74,7 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs,
void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs,
struct edp_video_info *video_info);
int exynos_dp_config_video_bist(struct exynos_dp *dp_regs,
- struct edp_device_info *edp_info);
+ struct exynos_dp_priv *edp_info);
unsigned int exynos_dp_is_slave_video_stream_clock_on(
struct exynos_dp *dp_regs);
void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type,
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 23/25] exynos: video: Rename variables for driver model
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (21 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 22/25] exynos: video: Rename edp_device_info to exynos_dp_priv Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 24/25] exynos: video: Convert several boards to driver model for video Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 25/25] exynos: video: Drop old unused code Simon Glass
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
Use 'priv' for a private pointer and 'regs' for a register pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
drivers/video/exynos/exynos_dp.c | 434 +++++++++++++++---------------
drivers/video/exynos/exynos_dp_lowlevel.c | 71 +++--
drivers/video/exynos/exynos_dp_lowlevel.h | 2 +-
drivers/video/exynos/exynos_fb.c | 234 ++++++++--------
include/exynos_lcd.h | 2 +-
5 files changed, 370 insertions(+), 373 deletions(-)
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 9bd88b1..5f39b0c 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -33,20 +33,20 @@ static void exynos_dp_disp_info(struct edp_disp_info *disp_info)
return;
}
-static int exynos_dp_init_dp(struct exynos_dp *dp_regs)
+static int exynos_dp_init_dp(struct exynos_dp *regs)
{
int ret;
- exynos_dp_reset(dp_regs);
+ exynos_dp_reset(regs);
/* SW defined function Normal operation */
- exynos_dp_enable_sw_func(dp_regs, DP_ENABLE);
+ exynos_dp_enable_sw_func(regs, DP_ENABLE);
- ret = exynos_dp_init_analog_func(dp_regs);
+ ret = exynos_dp_init_analog_func(regs);
if (ret != EXYNOS_DP_SUCCESS)
return ret;
- exynos_dp_init_hpd(dp_regs);
- exynos_dp_init_aux(dp_regs);
+ exynos_dp_init_hpd(regs);
+ exynos_dp_init_aux(regs);
return ret;
}
@@ -62,7 +62,7 @@ static unsigned char exynos_dp_calc_edid_check_sum(unsigned char *edid_data)
return sum;
}
-static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
+static unsigned int exynos_dp_read_edid(struct exynos_dp *regs)
{
unsigned char edid[EDID_BLOCK_LENGTH * 2];
unsigned int extend_block = 0;
@@ -77,14 +77,14 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
*/
/* Read Extension Flag, Number of 128-byte EDID extension blocks */
- exynos_dp_read_byte_from_i2c(dp_regs, I2C_EDID_DEVICE_ADDR,
+ exynos_dp_read_byte_from_i2c(regs, I2C_EDID_DEVICE_ADDR,
EDID_EXTENSION_FLAG, &extend_block);
if (extend_block > 0) {
printf("DP EDID data includes a single extension!\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp_regs,
+ retval = exynos_dp_read_bytes_from_i2c(regs,
I2C_EDID_DEVICE_ADDR,
EDID_HEADER_PATTERN,
EDID_BLOCK_LENGTH,
@@ -100,7 +100,7 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
}
/* Read additional EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp_regs,
+ retval = exynos_dp_read_bytes_from_i2c(regs,
I2C_EDID_DEVICE_ADDR,
EDID_BLOCK_LENGTH,
EDID_BLOCK_LENGTH,
@@ -115,13 +115,13 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
return -1;
}
- exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST,
+ exynos_dp_read_byte_from_dpcd(regs, DPCD_TEST_REQUEST,
&test_vector);
if (test_vector & DPCD_TEST_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp_regs,
+ exynos_dp_write_byte_to_dpcd(regs,
DPCD_TEST_EDID_CHECKSUM,
edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp_regs,
+ exynos_dp_write_byte_to_dpcd(regs,
DPCD_TEST_RESPONSE,
DPCD_TEST_EDID_CHECKSUM_WRITE);
}
@@ -129,7 +129,7 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
debug("DP EDID data does not include any extensions.\n");
/* Read EDID data */
- retval = exynos_dp_read_bytes_from_i2c(dp_regs,
+ retval = exynos_dp_read_bytes_from_i2c(regs,
I2C_EDID_DEVICE_ADDR,
EDID_HEADER_PATTERN,
EDID_BLOCK_LENGTH,
@@ -145,12 +145,12 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
return -1;
}
- exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_TEST_REQUEST,
+ exynos_dp_read_byte_from_dpcd(regs, DPCD_TEST_REQUEST,
&test_vector);
if (test_vector & DPCD_TEST_EDID_READ) {
- exynos_dp_write_byte_to_dpcd(dp_regs,
+ exynos_dp_write_byte_to_dpcd(regs,
DPCD_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]);
- exynos_dp_write_byte_to_dpcd(dp_regs,
+ exynos_dp_write_byte_to_dpcd(regs,
DPCD_TEST_RESPONSE,
DPCD_TEST_EDID_CHECKSUM_WRITE);
}
@@ -161,8 +161,8 @@ static unsigned int exynos_dp_read_edid(struct exynos_dp *dp_regs)
return 0;
}
-static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static unsigned int exynos_dp_handle_edid(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
unsigned char buf[12];
unsigned int ret;
@@ -180,7 +180,7 @@ static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs,
retry_cnt = 5;
while (retry_cnt) {
/* Read DPCD 0x0000-0x000b */
- ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_DPCD_REV, 12,
+ ret = exynos_dp_read_bytes_from_dpcd(regs, DPCD_DPCD_REV, 12,
buf);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
@@ -195,7 +195,7 @@ static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs,
/* */
temp = buf[DPCD_DPCD_REV];
if (temp == DP_DPCD_REV_10 || temp == DP_DPCD_REV_11)
- edp_info->dpcd_rev = temp;
+ priv->dpcd_rev = temp;
else {
printf("DP Wrong DPCD Rev : %x\n", temp);
return -ENODEV;
@@ -203,33 +203,33 @@ static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs,
temp = buf[DPCD_MAX_LINK_RATE];
if (temp == DP_LANE_BW_1_62 || temp == DP_LANE_BW_2_70)
- edp_info->lane_bw = temp;
+ priv->lane_bw = temp;
else {
printf("DP Wrong MAX LINK RATE : %x\n", temp);
return -EINVAL;
}
/*Refer VESA Display Port Stnadard Ver1.1a Page 120 */
- if (edp_info->dpcd_rev == DP_DPCD_REV_11) {
+ if (priv->dpcd_rev == DP_DPCD_REV_11) {
temp = buf[DPCD_MAX_LANE_COUNT] & 0x1f;
if (buf[DPCD_MAX_LANE_COUNT] & 0x80)
- edp_info->dpcd_efc = 1;
+ priv->dpcd_efc = 1;
else
- edp_info->dpcd_efc = 0;
+ priv->dpcd_efc = 0;
} else {
temp = buf[DPCD_MAX_LANE_COUNT];
- edp_info->dpcd_efc = 0;
+ priv->dpcd_efc = 0;
}
if (temp == DP_LANE_CNT_1 || temp == DP_LANE_CNT_2 ||
temp == DP_LANE_CNT_4) {
- edp_info->lane_cnt = temp;
+ priv->lane_cnt = temp;
} else {
printf("DP Wrong MAX LANE COUNT : %x\n", temp);
return -EINVAL;
}
- ret = exynos_dp_read_edid(dp_regs);
+ ret = exynos_dp_read_edid(regs);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP exynos_dp_read_edid() failed\n");
return -EINVAL;
@@ -238,35 +238,35 @@ static unsigned int exynos_dp_handle_edid(struct exynos_dp *dp_regs,
return ret;
}
-static void exynos_dp_init_training(struct exynos_dp *dp_regs)
+static void exynos_dp_init_training(struct exynos_dp *regs)
{
/*
* MACRO_RST must be applied after the PLL_LOCK to avoid
* the DP inter pair skew issue for at least 10 us
*/
- exynos_dp_reset_macro(dp_regs);
+ exynos_dp_reset_macro(regs);
/* All DP analog module power up */
- exynos_dp_set_analog_power_down(dp_regs, POWER_ALL, 0);
+ exynos_dp_set_analog_power_down(regs, POWER_ALL, 0);
}
-static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static unsigned int exynos_dp_link_start(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
unsigned char buf[5];
unsigned int ret = 0;
debug("DP: %s was called\n", __func__);
- edp_info->lt_info.lt_status = DP_LT_CR;
- edp_info->lt_info.ep_loop = 0;
- edp_info->lt_info.cr_loop[0] = 0;
- edp_info->lt_info.cr_loop[1] = 0;
- edp_info->lt_info.cr_loop[2] = 0;
- edp_info->lt_info.cr_loop[3] = 0;
+ priv->lt_info.lt_status = DP_LT_CR;
+ priv->lt_info.ep_loop = 0;
+ priv->lt_info.cr_loop[0] = 0;
+ priv->lt_info.cr_loop[1] = 0;
+ priv->lt_info.cr_loop[2] = 0;
+ priv->lt_info.cr_loop[3] = 0;
/* Set sink to D0 (Sink Not Ready) mode. */
- ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_SINK_POWER_STATE,
+ ret = exynos_dp_write_byte_to_dpcd(regs, DPCD_SINK_POWER_STATE,
DPCD_SET_POWER_STATE_D0);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_dpcd_byte failed\n");
@@ -274,24 +274,24 @@ static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs,
}
/* Set link rate and count as you want to establish*/
- exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw);
- exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt);
+ exynos_dp_set_link_bandwidth(regs, priv->lane_bw);
+ exynos_dp_set_lane_count(regs, priv->lane_cnt);
/* Setup RX configuration */
- buf[0] = edp_info->lane_bw;
- buf[1] = edp_info->lane_cnt;
+ buf[0] = priv->lane_bw;
+ buf[1] = priv->lane_cnt;
- ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_LINK_BW_SET, 2, buf);
+ ret = exynos_dp_write_bytes_to_dpcd(regs, DPCD_LINK_BW_SET, 2, buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_dpcd_byte failed\n");
return ret;
}
- exynos_dp_set_lane_pre_emphasis(dp_regs, PRE_EMPHASIS_LEVEL_0,
- edp_info->lane_cnt);
+ exynos_dp_set_lane_pre_emphasis(regs, PRE_EMPHASIS_LEVEL_0,
+ priv->lane_cnt);
/* Set training pattern 1 */
- exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN1);
+ exynos_dp_set_training_pattern(regs, TRAINING_PTN1);
/* Set RX training pattern */
buf[0] = DPCD_SCRAMBLING_DISABLED | DPCD_TRAINING_PATTERN_1;
@@ -305,7 +305,7 @@ static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs,
buf[4] = DPCD_PRE_EMPHASIS_SET_PATTERN_2_LEVEL_0 |
DPCD_VOLTAGE_SWING_SET_PATTERN_1_LEVEL_0;
- ret = exynos_dp_write_bytes_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
+ ret = exynos_dp_write_bytes_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET,
5, buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_dpcd_byte failed\n");
@@ -315,13 +315,13 @@ static unsigned int exynos_dp_link_start(struct exynos_dp *dp_regs,
return ret;
}
-static unsigned int exynos_dp_training_pattern_dis(struct exynos_dp *dp_regs)
+static unsigned int exynos_dp_training_pattern_dis(struct exynos_dp *regs)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
- exynos_dp_set_training_pattern(dp_regs, DP_NONE);
+ exynos_dp_set_training_pattern(regs, DP_NONE);
- ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
+ ret = exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET,
DPCD_TRAINING_PATTERN_DISABLED);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP requst_link_traninig_req failed\n");
@@ -332,12 +332,12 @@ static unsigned int exynos_dp_training_pattern_dis(struct exynos_dp *dp_regs)
}
static unsigned int exynos_dp_enable_rx_to_enhanced_mode(
- struct exynos_dp *dp_regs, unsigned char enable)
+ struct exynos_dp *regs, unsigned char enable)
{
unsigned char data;
unsigned int ret = EXYNOS_DP_SUCCESS;
- ret = exynos_dp_read_byte_from_dpcd(dp_regs, DPCD_LANE_COUNT_SET,
+ ret = exynos_dp_read_byte_from_dpcd(regs, DPCD_LANE_COUNT_SET,
&data);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read_from_dpcd failed\n");
@@ -349,7 +349,7 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(
else
data = DPCD_LN_COUNT_SET(data);
- ret = exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_LANE_COUNT_SET, data);
+ ret = exynos_dp_write_byte_to_dpcd(regs, DPCD_LANE_COUNT_SET, data);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write_to_dpcd failed\n");
return -EAGAIN;
@@ -359,24 +359,24 @@ static unsigned int exynos_dp_enable_rx_to_enhanced_mode(
return ret;
}
-static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *dp_regs,
+static unsigned int exynos_dp_set_enhanced_mode(struct exynos_dp *regs,
unsigned char enhance_mode)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
- ret = exynos_dp_enable_rx_to_enhanced_mode(dp_regs, enhance_mode);
+ ret = exynos_dp_enable_rx_to_enhanced_mode(regs, enhance_mode);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP rx_enhance_mode failed\n");
return -EAGAIN;
}
- exynos_dp_enable_enhanced_mode(dp_regs, enhance_mode);
+ exynos_dp_enable_enhanced_mode(regs, enhance_mode);
return ret;
}
-static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info,
+static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv,
unsigned char *status)
{
unsigned int ret, i;
@@ -389,14 +389,14 @@ static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs,
shift_val[2] = 0;
shift_val[3] = 4;
- ret = exynos_dp_read_bytes_from_dpcd(dp_regs, DPCD_LANE0_1_STATUS, 2,
+ ret = exynos_dp_read_bytes_from_dpcd(regs, DPCD_LANE0_1_STATUS, 2,
buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read lane status failed\n");
return ret;
}
- for (i = 0; i < edp_info->lane_cnt; i++) {
+ for (i = 0; i < priv->lane_cnt; i++) {
lane_stat[i] = (buf[(i / 2)] >> shift_val[i]) & 0x0f;
if (lane_stat[0] != lane_stat[i]) {
printf("Wrong lane status\n");
@@ -409,7 +409,7 @@ static int exynos_dp_read_dpcd_lane_stat(struct exynos_dp *dp_regs,
return ret;
}
-static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs,
+static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *regs,
unsigned char lane_num, unsigned char *sw, unsigned char *em)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
@@ -420,7 +420,7 @@ static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs,
/*lane_num value is used as arry index, so this range 0 ~ 3 */
dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2);
- ret = exynos_dp_read_byte_from_dpcd(dp_regs, dpcd_addr, &buf);
+ ret = exynos_dp_read_byte_from_dpcd(regs, dpcd_addr, &buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read adjust request failed\n");
return -EAGAIN;
@@ -432,53 +432,53 @@ static unsigned int exynos_dp_read_dpcd_adj_req(struct exynos_dp *dp_regs,
return ret;
}
-static int exynos_dp_equalizer_err_link(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static int exynos_dp_equalizer_err_link(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
int ret;
- ret = exynos_dp_training_pattern_dis(dp_regs);
+ ret = exynos_dp_training_pattern_dis(regs);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP training_patter_disable() failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
}
- ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc);
+ ret = exynos_dp_set_enhanced_mode(regs, priv->dpcd_efc);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP set_enhanced_mode() failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
}
return ret;
}
-static int exynos_dp_reduce_link_rate(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static int exynos_dp_reduce_link_rate(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
int ret;
- if (edp_info->lane_bw == DP_LANE_BW_2_70) {
- edp_info->lane_bw = DP_LANE_BW_1_62;
+ if (priv->lane_bw == DP_LANE_BW_2_70) {
+ priv->lane_bw = DP_LANE_BW_1_62;
printf("DP Change lane bw to 1.62Gbps\n");
- edp_info->lt_info.lt_status = DP_LT_START;
+ priv->lt_info.lt_status = DP_LT_START;
ret = EXYNOS_DP_SUCCESS;
} else {
- ret = exynos_dp_training_pattern_dis(dp_regs);
+ ret = exynos_dp_training_pattern_dis(regs);
if (ret != EXYNOS_DP_SUCCESS)
printf("DP training_patter_disable() failed\n");
- ret = exynos_dp_set_enhanced_mode(dp_regs, edp_info->dpcd_efc);
+ ret = exynos_dp_set_enhanced_mode(regs, priv->dpcd_efc);
if (ret != EXYNOS_DP_SUCCESS)
printf("DP set_enhanced_mode() failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
}
return ret;
}
-static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
unsigned char lane_stat;
@@ -491,22 +491,22 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
debug("DP: %s was called\n", __func__);
mdelay(1);
- ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat);
+ ret = exynos_dp_read_dpcd_lane_stat(regs, priv, &lane_stat);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read lane status failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
if (lane_stat & DP_LANE_STAT_CR_DONE) {
debug("DP clock Recovery training succeed\n");
- exynos_dp_set_training_pattern(dp_regs, TRAINING_PTN2);
+ exynos_dp_set_training_pattern(regs, TRAINING_PTN2);
- for (i = 0; i < edp_info->lane_cnt; i++) {
- ret = exynos_dp_read_dpcd_adj_req(dp_regs, i,
+ for (i = 0; i < priv->lane_cnt; i++) {
+ ret = exynos_dp_read_dpcd_adj_req(regs, i,
&adj_req_sw, &adj_req_em);
if (ret != EXYNOS_DP_SUCCESS) {
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
@@ -518,7 +518,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 |
MAX_PRE_EMPHASIS_REACH_3;
}
- exynos_dp_set_lanex_pre_emphasis(dp_regs,
+ exynos_dp_set_lanex_pre_emphasis(regs,
lt_ctl_val[i], i);
}
@@ -528,39 +528,39 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
buf[3] = lt_ctl_val[2];
buf[4] = lt_ctl_val[3];
- ret = exynos_dp_write_bytes_to_dpcd(dp_regs,
+ ret = exynos_dp_write_bytes_to_dpcd(regs,
DPCD_TRAINING_PATTERN_SET, 5, buf);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write traning pattern1 failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
} else
- edp_info->lt_info.lt_status = DP_LT_ET;
+ priv->lt_info.lt_status = DP_LT_ET;
} else {
- for (i = 0; i < edp_info->lane_cnt; i++) {
+ for (i = 0; i < priv->lane_cnt; i++) {
lt_ctl_val[i] = exynos_dp_get_lanex_pre_emphasis(
- dp_regs, i);
- ret = exynos_dp_read_dpcd_adj_req(dp_regs, i,
+ regs, i);
+ ret = exynos_dp_read_dpcd_adj_req(regs, i,
&adj_req_sw, &adj_req_em);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read adj req failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
if ((adj_req_sw == VOLTAGE_LEVEL_3) ||
(adj_req_em == PRE_EMPHASIS_LEVEL_3))
- ret = exynos_dp_reduce_link_rate(dp_regs,
- edp_info);
+ ret = exynos_dp_reduce_link_rate(regs,
+ priv);
if ((DRIVE_CURRENT_SET_0_GET(lt_ctl_val[i]) ==
adj_req_sw) &&
(PRE_EMPHASIS_SET_0_GET(lt_ctl_val[i]) ==
adj_req_em)) {
- edp_info->lt_info.cr_loop[i]++;
- if (edp_info->lt_info.cr_loop[i] == MAX_CR_LOOP)
+ priv->lt_info.cr_loop[i]++;
+ if (priv->lt_info.cr_loop[i] == MAX_CR_LOOP)
ret = exynos_dp_reduce_link_rate(
- dp_regs, edp_info);
+ regs, priv);
}
lt_ctl_val[i] = 0;
@@ -571,15 +571,15 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
lt_ctl_val[i] |= MAX_DRIVE_CURRENT_REACH_3 |
MAX_PRE_EMPHASIS_REACH_3;
}
- exynos_dp_set_lanex_pre_emphasis(dp_regs,
+ exynos_dp_set_lanex_pre_emphasis(regs,
lt_ctl_val[i], i);
}
- ret = exynos_dp_write_bytes_to_dpcd(dp_regs,
+ ret = exynos_dp_write_bytes_to_dpcd(regs,
DPCD_TRAINING_LANE0_SET, 4, lt_ctl_val);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP write traning pattern2 failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
}
@@ -588,7 +588,7 @@ static unsigned int exynos_dp_process_clock_recovery(struct exynos_dp *dp_regs,
}
static unsigned int exynos_dp_process_equalizer_training(
- struct exynos_dp *dp_regs, struct exynos_dp_priv *edp_info)
+ struct exynos_dp *regs, struct exynos_dp_priv *priv)
{
unsigned int ret = EXYNOS_DP_SUCCESS;
unsigned char lane_stat, adj_req_sw, adj_req_em, i;
@@ -600,33 +600,33 @@ static unsigned int exynos_dp_process_equalizer_training(
mdelay(1);
- ret = exynos_dp_read_dpcd_lane_stat(dp_regs, edp_info, &lane_stat);
+ ret = exynos_dp_read_dpcd_lane_stat(regs, priv, &lane_stat);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read lane status failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
debug("DP lane stat : %x\n", lane_stat);
if (lane_stat & DP_LANE_STAT_CR_DONE) {
- ret = exynos_dp_read_byte_from_dpcd(dp_regs,
+ ret = exynos_dp_read_byte_from_dpcd(regs,
DPCD_LN_ALIGN_UPDATED,
&sink_stat);
if (ret != EXYNOS_DP_SUCCESS) {
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
interlane_aligned = (sink_stat & DPCD_INTERLANE_ALIGN_DONE);
- for (i = 0; i < edp_info->lane_cnt; i++) {
- ret = exynos_dp_read_dpcd_adj_req(dp_regs, i,
+ for (i = 0; i < priv->lane_cnt; i++) {
+ ret = exynos_dp_read_dpcd_adj_req(regs, i,
&adj_req_sw, &adj_req_em);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP read adj req 1 failed\n");
- edp_info->lt_info.lt_status = DP_LT_FAIL;
+ priv->lt_info.lt_status = DP_LT_FAIL;
return ret;
}
@@ -646,91 +646,91 @@ static unsigned int exynos_dp_process_equalizer_training(
&& (interlane_aligned == DPCD_INTERLANE_ALIGN_DONE)) {
debug("DP Equalizer training succeed\n");
- f_bw = exynos_dp_get_link_bandwidth(dp_regs);
- f_lane_cnt = exynos_dp_get_lane_count(dp_regs);
+ f_bw = exynos_dp_get_link_bandwidth(regs);
+ f_lane_cnt = exynos_dp_get_lane_count(regs);
debug("DP final BandWidth : %x\n", f_bw);
debug("DP final Lane Count : %x\n", f_lane_cnt);
- edp_info->lt_info.lt_status = DP_LT_FINISHED;
+ priv->lt_info.lt_status = DP_LT_FINISHED;
- exynos_dp_equalizer_err_link(dp_regs, edp_info);
+ exynos_dp_equalizer_err_link(regs, priv);
} else {
- edp_info->lt_info.ep_loop++;
+ priv->lt_info.ep_loop++;
- if (edp_info->lt_info.ep_loop > MAX_EQ_LOOP) {
- if (edp_info->lane_bw == DP_LANE_BW_2_70) {
+ if (priv->lt_info.ep_loop > MAX_EQ_LOOP) {
+ if (priv->lane_bw == DP_LANE_BW_2_70) {
ret = exynos_dp_reduce_link_rate(
- dp_regs, edp_info);
+ regs, priv);
} else {
- edp_info->lt_info.lt_status =
+ priv->lt_info.lt_status =
DP_LT_FAIL;
- exynos_dp_equalizer_err_link(dp_regs,
- edp_info);
+ exynos_dp_equalizer_err_link(regs,
+ priv);
}
} else {
- for (i = 0; i < edp_info->lane_cnt; i++)
+ for (i = 0; i < priv->lane_cnt; i++)
exynos_dp_set_lanex_pre_emphasis(
- dp_regs, lt_ctl_val[i], i);
+ regs, lt_ctl_val[i], i);
- ret = exynos_dp_write_bytes_to_dpcd(dp_regs,
+ ret = exynos_dp_write_bytes_to_dpcd(regs,
DPCD_TRAINING_LANE0_SET,
4, lt_ctl_val);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP set lt pattern failed\n");
- edp_info->lt_info.lt_status =
+ priv->lt_info.lt_status =
DP_LT_FAIL;
- exynos_dp_equalizer_err_link(dp_regs,
- edp_info);
+ exynos_dp_equalizer_err_link(regs,
+ priv);
}
}
}
- } else if (edp_info->lane_bw == DP_LANE_BW_2_70) {
- ret = exynos_dp_reduce_link_rate(dp_regs, edp_info);
+ } else if (priv->lane_bw == DP_LANE_BW_2_70) {
+ ret = exynos_dp_reduce_link_rate(regs, priv);
} else {
- edp_info->lt_info.lt_status = DP_LT_FAIL;
- exynos_dp_equalizer_err_link(dp_regs, edp_info);
+ priv->lt_info.lt_status = DP_LT_FAIL;
+ exynos_dp_equalizer_err_link(regs, priv);
}
return ret;
}
-static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static unsigned int exynos_dp_sw_link_training(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
unsigned int ret = 0;
int training_finished;
/* Turn off unnecessary lane */
- if (edp_info->lane_cnt == 1)
- exynos_dp_set_analog_power_down(dp_regs, CH1_BLOCK, 1);
+ if (priv->lane_cnt == 1)
+ exynos_dp_set_analog_power_down(regs, CH1_BLOCK, 1);
training_finished = 0;
- edp_info->lt_info.lt_status = DP_LT_START;
+ priv->lt_info.lt_status = DP_LT_START;
/* Process here */
while (!training_finished) {
- switch (edp_info->lt_info.lt_status) {
+ switch (priv->lt_info.lt_status) {
case DP_LT_START:
- ret = exynos_dp_link_start(dp_regs, edp_info);
+ ret = exynos_dp_link_start(regs, priv);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP LT:link start failed\n");
return ret;
}
break;
case DP_LT_CR:
- ret = exynos_dp_process_clock_recovery(dp_regs,
- edp_info);
+ ret = exynos_dp_process_clock_recovery(regs,
+ priv);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP LT:clock recovery failed\n");
return ret;
}
break;
case DP_LT_ET:
- ret = exynos_dp_process_equalizer_training(dp_regs,
- edp_info);
+ ret = exynos_dp_process_equalizer_training(regs,
+ priv);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP LT:equalizer training failed\n");
return ret;
@@ -747,75 +747,75 @@ static unsigned int exynos_dp_sw_link_training(struct exynos_dp *dp_regs,
return ret;
}
-static unsigned int exynos_dp_set_link_train(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static unsigned int exynos_dp_set_link_train(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
unsigned int ret;
- exynos_dp_init_training(dp_regs);
+ exynos_dp_init_training(regs);
- ret = exynos_dp_sw_link_training(dp_regs, edp_info);
+ ret = exynos_dp_sw_link_training(regs, priv);
if (ret != EXYNOS_DP_SUCCESS)
printf("DP dp_sw_link_traning() failed\n");
return ret;
}
-static void exynos_dp_enable_scramble(struct exynos_dp *dp_regs,
+static void exynos_dp_enable_scramble(struct exynos_dp *regs,
unsigned int enable)
{
unsigned char data;
if (enable) {
- exynos_dp_enable_scrambling(dp_regs, DP_ENABLE);
+ exynos_dp_enable_scrambling(regs, DP_ENABLE);
- exynos_dp_read_byte_from_dpcd(dp_regs,
+ exynos_dp_read_byte_from_dpcd(regs,
DPCD_TRAINING_PATTERN_SET, &data);
- exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
+ exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET,
(u8)(data & ~DPCD_SCRAMBLING_DISABLED));
} else {
- exynos_dp_enable_scrambling(dp_regs, DP_DISABLE);
- exynos_dp_read_byte_from_dpcd(dp_regs,
+ exynos_dp_enable_scrambling(regs, DP_DISABLE);
+ exynos_dp_read_byte_from_dpcd(regs,
DPCD_TRAINING_PATTERN_SET, &data);
- exynos_dp_write_byte_to_dpcd(dp_regs, DPCD_TRAINING_PATTERN_SET,
+ exynos_dp_write_byte_to_dpcd(regs, DPCD_TRAINING_PATTERN_SET,
(u8)(data | DPCD_SCRAMBLING_DISABLED));
}
}
-static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+static unsigned int exynos_dp_config_video(struct exynos_dp *regs,
+ struct exynos_dp_priv *priv)
{
unsigned int ret = 0;
unsigned int retry_cnt;
mdelay(1);
- if (edp_info->video_info.master_mode) {
+ if (priv->video_info.master_mode) {
printf("DP does not support master mode\n");
return -ENODEV;
} else {
/* debug slave */
- exynos_dp_config_video_slave_mode(dp_regs,
- &edp_info->video_info);
+ exynos_dp_config_video_slave_mode(regs,
+ &priv->video_info);
}
- exynos_dp_set_video_color_format(dp_regs, &edp_info->video_info);
+ exynos_dp_set_video_color_format(regs, &priv->video_info);
- if (edp_info->video_info.bist_mode) {
- if (exynos_dp_config_video_bist(dp_regs, edp_info) != 0)
+ if (priv->video_info.bist_mode) {
+ if (exynos_dp_config_video_bist(regs, priv) != 0)
return -1;
}
- ret = exynos_dp_get_pll_lock_status(dp_regs);
+ ret = exynos_dp_get_pll_lock_status(regs);
if (ret != PLL_LOCKED) {
printf("DP PLL is not locked yet\n");
return -EIO;
}
- if (edp_info->video_info.master_mode == 0) {
+ if (priv->video_info.master_mode == 0) {
retry_cnt = 10;
while (retry_cnt) {
- ret = exynos_dp_is_slave_video_stream_clock_on(dp_regs);
+ ret = exynos_dp_is_slave_video_stream_clock_on(regs);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
printf("DP stream_clock_on failed\n");
@@ -829,34 +829,34 @@ static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs,
}
/* Set to use the register calculated M/N video */
- exynos_dp_set_video_cr_mn(dp_regs, CALCULATED_M, 0, 0);
+ exynos_dp_set_video_cr_mn(regs, CALCULATED_M, 0, 0);
/* For video bist, Video timing must be generated by register */
- exynos_dp_set_video_timing_mode(dp_regs, VIDEO_TIMING_FROM_CAPTURE);
+ exynos_dp_set_video_timing_mode(regs, VIDEO_TIMING_FROM_CAPTURE);
/* Enable video bist */
- if (edp_info->video_info.bist_pattern != COLOR_RAMP &&
- edp_info->video_info.bist_pattern != BALCK_WHITE_V_LINES &&
- edp_info->video_info.bist_pattern != COLOR_SQUARE)
- exynos_dp_enable_video_bist(dp_regs,
- edp_info->video_info.bist_mode);
+ if (priv->video_info.bist_pattern != COLOR_RAMP &&
+ priv->video_info.bist_pattern != BALCK_WHITE_V_LINES &&
+ priv->video_info.bist_pattern != COLOR_SQUARE)
+ exynos_dp_enable_video_bist(regs,
+ priv->video_info.bist_mode);
else
- exynos_dp_enable_video_bist(dp_regs, DP_DISABLE);
+ exynos_dp_enable_video_bist(regs, DP_DISABLE);
/* Disable video mute */
- exynos_dp_enable_video_mute(dp_regs, DP_DISABLE);
+ exynos_dp_enable_video_mute(regs, DP_DISABLE);
/* Configure video Master or Slave mode */
- exynos_dp_enable_video_master(dp_regs,
- edp_info->video_info.master_mode);
+ exynos_dp_enable_video_master(regs,
+ priv->video_info.master_mode);
/* Enable video */
- exynos_dp_start_video(dp_regs);
+ exynos_dp_start_video(regs);
- if (edp_info->video_info.master_mode == 0) {
+ if (priv->video_info.master_mode == 0) {
retry_cnt = 100;
while (retry_cnt) {
- ret = exynos_dp_is_video_stream_on(dp_regs);
+ ret = exynos_dp_is_video_stream_on(regs);
if (ret != EXYNOS_DP_SUCCESS) {
if (retry_cnt == 0) {
printf("DP Timeout of video stream\n");
@@ -872,7 +872,7 @@ static unsigned int exynos_dp_config_video(struct exynos_dp *dp_regs,
return ret;
}
-int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *edp_info)
+int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *priv)
{
unsigned int node = fdtdec_next_compatible(blob, 0,
COMPAT_SAMSUNG_EXYNOS5_DP);
@@ -881,47 +881,47 @@ int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *edp_info)
return -ENODEV;
}
- edp_info->disp_info.h_res = fdtdec_get_int(blob, node,
+ priv->disp_info.h_res = fdtdec_get_int(blob, node,
"samsung,h-res", 0);
- edp_info->disp_info.h_sync_width = fdtdec_get_int(blob, node,
+ priv->disp_info.h_sync_width = fdtdec_get_int(blob, node,
"samsung,h-sync-width", 0);
- edp_info->disp_info.h_back_porch = fdtdec_get_int(blob, node,
+ priv->disp_info.h_back_porch = fdtdec_get_int(blob, node,
"samsung,h-back-porch", 0);
- edp_info->disp_info.h_front_porch = fdtdec_get_int(blob, node,
+ priv->disp_info.h_front_porch = fdtdec_get_int(blob, node,
"samsung,h-front-porch", 0);
- edp_info->disp_info.v_res = fdtdec_get_int(blob, node,
+ priv->disp_info.v_res = fdtdec_get_int(blob, node,
"samsung,v-res", 0);
- edp_info->disp_info.v_sync_width = fdtdec_get_int(blob, node,
+ priv->disp_info.v_sync_width = fdtdec_get_int(blob, node,
"samsung,v-sync-width", 0);
- edp_info->disp_info.v_back_porch = fdtdec_get_int(blob, node,
+ priv->disp_info.v_back_porch = fdtdec_get_int(blob, node,
"samsung,v-back-porch", 0);
- edp_info->disp_info.v_front_porch = fdtdec_get_int(blob, node,
+ priv->disp_info.v_front_porch = fdtdec_get_int(blob, node,
"samsung,v-front-porch", 0);
- edp_info->disp_info.v_sync_rate = fdtdec_get_int(blob, node,
+ priv->disp_info.v_sync_rate = fdtdec_get_int(blob, node,
"samsung,v-sync-rate", 0);
- edp_info->lt_info.lt_status = fdtdec_get_int(blob, node,
+ priv->lt_info.lt_status = fdtdec_get_int(blob, node,
"samsung,lt-status", 0);
- edp_info->video_info.master_mode = fdtdec_get_int(blob, node,
+ priv->video_info.master_mode = fdtdec_get_int(blob, node,
"samsung,master-mode", 0);
- edp_info->video_info.bist_mode = fdtdec_get_int(blob, node,
+ priv->video_info.bist_mode = fdtdec_get_int(blob, node,
"samsung,bist-mode", 0);
- edp_info->video_info.bist_pattern = fdtdec_get_int(blob, node,
+ priv->video_info.bist_pattern = fdtdec_get_int(blob, node,
"samsung,bist-pattern", 0);
- edp_info->video_info.h_sync_polarity = fdtdec_get_int(blob, node,
+ priv->video_info.h_sync_polarity = fdtdec_get_int(blob, node,
"samsung,h-sync-polarity", 0);
- edp_info->video_info.v_sync_polarity = fdtdec_get_int(blob, node,
+ priv->video_info.v_sync_polarity = fdtdec_get_int(blob, node,
"samsung,v-sync-polarity", 0);
- edp_info->video_info.interlaced = fdtdec_get_int(blob, node,
+ priv->video_info.interlaced = fdtdec_get_int(blob, node,
"samsung,interlaced", 0);
- edp_info->video_info.color_space = fdtdec_get_int(blob, node,
+ priv->video_info.color_space = fdtdec_get_int(blob, node,
"samsung,color-space", 0);
- edp_info->video_info.dynamic_range = fdtdec_get_int(blob, node,
+ priv->video_info.dynamic_range = fdtdec_get_int(blob, node,
"samsung,dynamic-range", 0);
- edp_info->video_info.ycbcr_coeff = fdtdec_get_int(blob, node,
+ priv->video_info.ycbcr_coeff = fdtdec_get_int(blob, node,
"samsung,ycbcr-coeff", 0);
- edp_info->video_info.color_depth = fdtdec_get_int(blob, node,
+ priv->video_info.color_depth = fdtdec_get_int(blob, node,
"samsung,color-depth", 0);
return 0;
}
@@ -929,17 +929,17 @@ int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *edp_info)
unsigned int exynos_init_dp(void)
{
unsigned int ret;
- struct exynos_dp_priv *edp_info;
- struct exynos_dp *dp_regs;
+ struct exynos_dp_priv *priv;
+ struct exynos_dp *regs;
int node;
- edp_info = kzalloc(sizeof(struct exynos_dp_priv), GFP_KERNEL);
- if (!edp_info) {
+ priv = kzalloc(sizeof(struct exynos_dp_priv), GFP_KERNEL);
+ if (!priv) {
debug("failed to allocate edp device object.\n");
return -EFAULT;
}
- if (exynos_dp_parse_dt(gd->fdt_blob, edp_info))
+ if (exynos_dp_parse_dt(gd->fdt_blob, priv))
debug("unable to parse DP DT node\n");
node = fdtdec_next_compatible(gd->fdt_blob, 0,
@@ -947,42 +947,42 @@ unsigned int exynos_init_dp(void)
if (node <= 0)
debug("exynos_dp: Can't get device node for dp\n");
- dp_regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, node,
+ regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, node,
"reg");
- if (dp_regs == NULL)
+ if (regs == NULL)
debug("Can't get the DP base address\n");
- exynos_dp_disp_info(&edp_info->disp_info);
+ exynos_dp_disp_info(&priv->disp_info);
exynos_dp_phy_ctrl(1);
- ret = exynos_dp_init_dp(dp_regs);
+ ret = exynos_dp_init_dp(regs);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP exynos_dp_init_dp() failed\n");
return ret;
}
- ret = exynos_dp_handle_edid(dp_regs, edp_info);
+ ret = exynos_dp_handle_edid(regs, priv);
if (ret != EXYNOS_DP_SUCCESS) {
printf("EDP handle_edid fail\n");
return ret;
}
- ret = exynos_dp_set_link_train(dp_regs, edp_info);
+ ret = exynos_dp_set_link_train(regs, priv);
if (ret != EXYNOS_DP_SUCCESS) {
printf("DP link training fail\n");
return ret;
}
- exynos_dp_enable_scramble(dp_regs, DP_ENABLE);
- exynos_dp_enable_rx_to_enhanced_mode(dp_regs, DP_ENABLE);
- exynos_dp_enable_enhanced_mode(dp_regs, DP_ENABLE);
+ exynos_dp_enable_scramble(regs, DP_ENABLE);
+ exynos_dp_enable_rx_to_enhanced_mode(regs, DP_ENABLE);
+ exynos_dp_enable_enhanced_mode(regs, DP_ENABLE);
- exynos_dp_set_link_bandwidth(dp_regs, edp_info->lane_bw);
- exynos_dp_set_lane_count(dp_regs, edp_info->lane_cnt);
+ exynos_dp_set_link_bandwidth(regs, priv->lane_bw);
+ exynos_dp_set_lane_count(regs, priv->lane_cnt);
- exynos_dp_init_video(dp_regs);
- ret = exynos_dp_config_video(dp_regs, edp_info);
+ exynos_dp_init_video(regs);
+ ret = exynos_dp_config_video(regs, priv);
if (ret != EXYNOS_DP_SUCCESS) {
printf("Exynos DP init failed\n");
return ret;
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index 3d9abdf..6c9dfd6 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -1066,49 +1066,46 @@ void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs,
}
int exynos_dp_config_video_bist(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info)
+ struct exynos_dp_priv *priv)
{
unsigned int reg;
unsigned int bist_type = 0;
- struct edp_video_info video_info = edp_info->video_info;
+ struct edp_video_info video_info = priv->video_info;
/* For master mode, you don't need to set the video format */
if (video_info.master_mode == 0) {
- writel(TOTAL_LINE_CFG_L(edp_info->disp_info.v_total),
- &dp_regs->total_ln_cfg_l);
- writel(TOTAL_LINE_CFG_H(edp_info->disp_info.v_total),
- &dp_regs->total_ln_cfg_h);
- writel(ACTIVE_LINE_CFG_L(edp_info->disp_info.v_res),
- &dp_regs->active_ln_cfg_l);
- writel(ACTIVE_LINE_CFG_H(edp_info->disp_info.v_res),
- &dp_regs->active_ln_cfg_h);
- writel(edp_info->disp_info.v_sync_width,
- &dp_regs->vsw_cfg);
- writel(edp_info->disp_info.v_back_porch,
- &dp_regs->vbp_cfg);
- writel(edp_info->disp_info.v_front_porch,
- &dp_regs->vfp_cfg);
-
- writel(TOTAL_PIXEL_CFG_L(edp_info->disp_info.h_total),
- &dp_regs->total_pix_cfg_l);
- writel(TOTAL_PIXEL_CFG_H(edp_info->disp_info.h_total),
- &dp_regs->total_pix_cfg_h);
- writel(ACTIVE_PIXEL_CFG_L(edp_info->disp_info.h_res),
- &dp_regs->active_pix_cfg_l);
- writel(ACTIVE_PIXEL_CFG_H(edp_info->disp_info.h_res),
- &dp_regs->active_pix_cfg_h);
- writel(H_F_PORCH_CFG_L(edp_info->disp_info.h_front_porch),
- &dp_regs->hfp_cfg_l);
- writel(H_F_PORCH_CFG_H(edp_info->disp_info.h_front_porch),
- &dp_regs->hfp_cfg_h);
- writel(H_SYNC_PORCH_CFG_L(edp_info->disp_info.h_sync_width),
- &dp_regs->hsw_cfg_l);
- writel(H_SYNC_PORCH_CFG_H(edp_info->disp_info.h_sync_width),
- &dp_regs->hsw_cfg_h);
- writel(H_B_PORCH_CFG_L(edp_info->disp_info.h_back_porch),
- &dp_regs->hbp_cfg_l);
- writel(H_B_PORCH_CFG_H(edp_info->disp_info.h_back_porch),
- &dp_regs->hbp_cfg_h);
+ writel(TOTAL_LINE_CFG_L(priv->disp_info.v_total),
+ &dp_regs->total_ln_cfg_l);
+ writel(TOTAL_LINE_CFG_H(priv->disp_info.v_total),
+ &dp_regs->total_ln_cfg_h);
+ writel(ACTIVE_LINE_CFG_L(priv->disp_info.v_res),
+ &dp_regs->active_ln_cfg_l);
+ writel(ACTIVE_LINE_CFG_H(priv->disp_info.v_res),
+ &dp_regs->active_ln_cfg_h);
+ writel(priv->disp_info.v_sync_width, &dp_regs->vsw_cfg);
+ writel(priv->disp_info.v_back_porch, &dp_regs->vbp_cfg);
+ writel(priv->disp_info.v_front_porch, &dp_regs->vfp_cfg);
+
+ writel(TOTAL_PIXEL_CFG_L(priv->disp_info.h_total),
+ &dp_regs->total_pix_cfg_l);
+ writel(TOTAL_PIXEL_CFG_H(priv->disp_info.h_total),
+ &dp_regs->total_pix_cfg_h);
+ writel(ACTIVE_PIXEL_CFG_L(priv->disp_info.h_res),
+ &dp_regs->active_pix_cfg_l);
+ writel(ACTIVE_PIXEL_CFG_H(priv->disp_info.h_res),
+ &dp_regs->active_pix_cfg_h);
+ writel(H_F_PORCH_CFG_L(priv->disp_info.h_front_porch),
+ &dp_regs->hfp_cfg_l);
+ writel(H_F_PORCH_CFG_H(priv->disp_info.h_front_porch),
+ &dp_regs->hfp_cfg_h);
+ writel(H_SYNC_PORCH_CFG_L(priv->disp_info.h_sync_width),
+ &dp_regs->hsw_cfg_l);
+ writel(H_SYNC_PORCH_CFG_H(priv->disp_info.h_sync_width),
+ &dp_regs->hsw_cfg_h);
+ writel(H_B_PORCH_CFG_L(priv->disp_info.h_back_porch),
+ &dp_regs->hbp_cfg_l);
+ writel(H_B_PORCH_CFG_H(priv->disp_info.h_back_porch),
+ &dp_regs->hbp_cfg_h);
/*
* Set SLAVE_I_SCAN_CFG[2], VSYNC_P_CFG[1],
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.h b/drivers/video/exynos/exynos_dp_lowlevel.h
index 0a7657e..e4c867e 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.h
+++ b/drivers/video/exynos/exynos_dp_lowlevel.h
@@ -74,7 +74,7 @@ void exynos_dp_config_video_slave_mode(struct exynos_dp *dp_regs,
void exynos_dp_set_video_color_format(struct exynos_dp *dp_regs,
struct edp_video_info *video_info);
int exynos_dp_config_video_bist(struct exynos_dp *dp_regs,
- struct exynos_dp_priv *edp_info);
+ struct exynos_dp_priv *priv);
unsigned int exynos_dp_is_slave_video_stream_clock_on(
struct exynos_dp *dp_regs);
void exynos_dp_set_video_cr_mn(struct exynos_dp *dp_regs, unsigned int type,
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index e13d35a..83b1187 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -35,9 +35,9 @@ struct vidinfo panel_info = {
.vl_col = -1,
};
-static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled)
+static void exynos_fimd_set_dualrgb(struct vidinfo *priv, unsigned int enabled)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
if (enabled) {
@@ -45,32 +45,32 @@ static void exynos_fimd_set_dualrgb(struct vidinfo *pvid, unsigned int enabled)
EXYNOS_DUALRGB_VDEN_EN_ENABLE;
/* in case of Line Split mode, MAIN_CNT doesn't neet to set. */
- cfg |= EXYNOS_DUALRGB_SUB_CNT(pvid->vl_col / 2) |
+ cfg |= EXYNOS_DUALRGB_SUB_CNT(priv->vl_col / 2) |
EXYNOS_DUALRGB_MAIN_CNT(0);
}
- writel(cfg, &fimd_ctrl->dualrgb);
+ writel(cfg, ®->dualrgb);
}
-static void exynos_fimd_set_dp_clkcon(struct vidinfo *pvid,
+static void exynos_fimd_set_dp_clkcon(struct vidinfo *priv,
unsigned int enabled)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
if (enabled)
cfg = EXYNOS_DP_CLK_ENABLE;
- writel(cfg, &fimd_ctrl->dp_mie_clkcon);
+ writel(cfg, ®->dp_mie_clkcon);
}
-static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id)
+static void exynos_fimd_set_par(struct vidinfo *priv, unsigned int win_id)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
/* set window control */
- cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
+ cfg = readl((unsigned int)®->wincon0 +
EXYNOS_WINCON(win_id));
cfg &= ~(EXYNOS_WINCON_BITSWP_ENABLE | EXYNOS_WINCON_BYTESWP_ENABLE |
@@ -86,7 +86,7 @@ static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id)
/* dma burst is 16 */
cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
- switch (pvid->vl_bpix) {
+ switch (priv->vl_bpix) {
case 4:
cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
break;
@@ -95,72 +95,72 @@ static void exynos_fimd_set_par(struct vidinfo *pvid, unsigned int win_id)
break;
}
- writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
+ writel(cfg, (unsigned int)®->wincon0 +
EXYNOS_WINCON(win_id));
/* set window position to x=0, y=0*/
cfg = EXYNOS_VIDOSD_LEFT_X(0) | EXYNOS_VIDOSD_TOP_Y(0);
- writel(cfg, (unsigned int)&fimd_ctrl->vidosd0a +
+ writel(cfg, (unsigned int)®->vidosd0a +
EXYNOS_VIDOSD(win_id));
- cfg = EXYNOS_VIDOSD_RIGHT_X(pvid->vl_col - 1) |
- EXYNOS_VIDOSD_BOTTOM_Y(pvid->vl_row - 1) |
+ cfg = EXYNOS_VIDOSD_RIGHT_X(priv->vl_col - 1) |
+ EXYNOS_VIDOSD_BOTTOM_Y(priv->vl_row - 1) |
EXYNOS_VIDOSD_RIGHT_X_E(1) |
EXYNOS_VIDOSD_BOTTOM_Y_E(0);
- writel(cfg, (unsigned int)&fimd_ctrl->vidosd0b +
+ writel(cfg, (unsigned int)®->vidosd0b +
EXYNOS_VIDOSD(win_id));
/* set window size for window0*/
- cfg = EXYNOS_VIDOSD_SIZE(pvid->vl_col * pvid->vl_row);
- writel(cfg, (unsigned int)&fimd_ctrl->vidosd0c +
+ cfg = EXYNOS_VIDOSD_SIZE(priv->vl_col * priv->vl_row);
+ writel(cfg, (unsigned int)®->vidosd0c +
EXYNOS_VIDOSD(win_id));
}
-static void exynos_fimd_set_buffer_address(struct vidinfo *pvid,
+static void exynos_fimd_set_buffer_address(struct vidinfo *priv,
unsigned int win_id,
ulong lcd_base_addr)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned long start_addr, end_addr;
start_addr = lcd_base_addr;
- end_addr = start_addr + ((pvid->vl_col * (NBITS(pvid->vl_bpix) / 8)) *
- pvid->vl_row);
+ end_addr = start_addr + ((priv->vl_col * (NBITS(priv->vl_bpix) / 8)) *
+ priv->vl_row);
- writel(start_addr, (unsigned int)&fimd_ctrl->vidw00add0b0 +
+ writel(start_addr, (unsigned int)®->vidw00add0b0 +
EXYNOS_BUFFER_OFFSET(win_id));
- writel(end_addr, (unsigned int)&fimd_ctrl->vidw00add1b0 +
+ writel(end_addr, (unsigned int)®->vidw00add1b0 +
EXYNOS_BUFFER_OFFSET(win_id));
}
-static void exynos_fimd_set_clock(struct vidinfo *pvid)
+static void exynos_fimd_set_clock(struct vidinfo *priv)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0, div = 0, remainder, remainder_div;
unsigned long pixel_clock;
unsigned long long src_clock;
- if (pvid->dual_lcd_enabled) {
- pixel_clock = pvid->vl_freq *
- (pvid->vl_hspw + pvid->vl_hfpd +
- pvid->vl_hbpd + pvid->vl_col / 2) *
- (pvid->vl_vspw + pvid->vl_vfpd +
- pvid->vl_vbpd + pvid->vl_row);
- } else if (pvid->interface_mode == FIMD_CPU_INTERFACE) {
- pixel_clock = pvid->vl_freq *
- pvid->vl_width * pvid->vl_height *
- (pvid->cs_setup + pvid->wr_setup +
- pvid->wr_act + pvid->wr_hold + 1);
+ if (priv->dual_lcd_enabled) {
+ pixel_clock = priv->vl_freq *
+ (priv->vl_hspw + priv->vl_hfpd +
+ priv->vl_hbpd + priv->vl_col / 2) *
+ (priv->vl_vspw + priv->vl_vfpd +
+ priv->vl_vbpd + priv->vl_row);
+ } else if (priv->interface_mode == FIMD_CPU_INTERFACE) {
+ pixel_clock = priv->vl_freq *
+ priv->vl_width * priv->vl_height *
+ (priv->cs_setup + priv->wr_setup +
+ priv->wr_act + priv->wr_hold + 1);
} else {
- pixel_clock = pvid->vl_freq *
- (pvid->vl_hspw + pvid->vl_hfpd +
- pvid->vl_hbpd + pvid->vl_col) *
- (pvid->vl_vspw + pvid->vl_vfpd +
- pvid->vl_vbpd + pvid->vl_row);
+ pixel_clock = priv->vl_freq *
+ (priv->vl_hspw + priv->vl_hfpd +
+ priv->vl_hbpd + priv->vl_col) *
+ (priv->vl_vspw + priv->vl_vfpd +
+ priv->vl_vbpd + priv->vl_row);
}
- cfg = readl(&fimd_ctrl->vidcon0);
+ cfg = readl(®->vidcon0);
cfg &= ~(EXYNOS_VIDCON0_CLKSEL_MASK | EXYNOS_VIDCON0_CLKVALUP_MASK |
EXYNOS_VIDCON0_CLKVAL_F(0xFF) | EXYNOS_VIDCON0_VCLKEN_MASK |
EXYNOS_VIDCON0_CLKDIR_MASK);
@@ -181,32 +181,32 @@ static void exynos_fimd_set_clock(struct vidinfo *pvid)
div++;
/* in case of dual lcd mode. */
- if (pvid->dual_lcd_enabled)
+ if (priv->dual_lcd_enabled)
div--;
cfg |= EXYNOS_VIDCON0_CLKVAL_F(div - 1);
- writel(cfg, &fimd_ctrl->vidcon0);
+ writel(cfg, ®->vidcon0);
}
-void exynos_set_trigger(struct vidinfo *pvid)
+void exynos_set_trigger(struct vidinfo *priv)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
- cfg = readl(&fimd_ctrl->trigcon);
+ cfg = readl(®->trigcon);
cfg |= (EXYNOS_I80SOFT_TRIG_EN | EXYNOS_I80START_TRIG);
- writel(cfg, &fimd_ctrl->trigcon);
+ writel(cfg, ®->trigcon);
}
-int exynos_is_i80_frame_done(struct vidinfo *pvid)
+int exynos_is_i80_frame_done(struct vidinfo *priv)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
int status;
- cfg = readl(&fimd_ctrl->trigcon);
+ cfg = readl(®->trigcon);
/* frame done func is valid only when TRIMODE[0] is set to 1. */
status = (cfg & EXYNOS_I80STATUS_TRIG_DONE) ==
@@ -215,58 +215,58 @@ int exynos_is_i80_frame_done(struct vidinfo *pvid)
return status;
}
-static void exynos_fimd_lcd_on(struct vidinfo *pvid)
+static void exynos_fimd_lcd_on(struct vidinfo *priv)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
/* display on */
- cfg = readl(&fimd_ctrl->vidcon0);
+ cfg = readl(®->vidcon0);
cfg |= (EXYNOS_VIDCON0_ENVID_ENABLE | EXYNOS_VIDCON0_ENVID_F_ENABLE);
- writel(cfg, &fimd_ctrl->vidcon0);
+ writel(cfg, ®->vidcon0);
}
-static void exynos_fimd_window_on(struct vidinfo *pvid, unsigned int win_id)
+static void exynos_fimd_window_on(struct vidinfo *priv, unsigned int win_id)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
/* enable window */
- cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
+ cfg = readl((unsigned int)®->wincon0 +
EXYNOS_WINCON(win_id));
cfg |= EXYNOS_WINCON_ENWIN_ENABLE;
- writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
+ writel(cfg, (unsigned int)®->wincon0 +
EXYNOS_WINCON(win_id));
- cfg = readl(&fimd_ctrl->winshmap);
+ cfg = readl(®->winshmap);
cfg |= EXYNOS_WINSHMAP_CH_ENABLE(win_id);
- writel(cfg, &fimd_ctrl->winshmap);
+ writel(cfg, ®->winshmap);
}
-void exynos_fimd_lcd_off(struct vidinfo *pvid)
+void exynos_fimd_lcd_off(struct vidinfo *priv)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
- cfg = readl(&fimd_ctrl->vidcon0);
+ cfg = readl(®->vidcon0);
cfg &= (EXYNOS_VIDCON0_ENVID_DISABLE | EXYNOS_VIDCON0_ENVID_F_DISABLE);
- writel(cfg, &fimd_ctrl->vidcon0);
+ writel(cfg, ®->vidcon0);
}
-void exynos_fimd_window_off(struct vidinfo *pvid, unsigned int win_id)
+void exynos_fimd_window_off(struct vidinfo *priv, unsigned int win_id)
{
- struct exynos_fb *fimd_ctrl = pvid->fimd_ctrl;
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
- cfg = readl((unsigned int)&fimd_ctrl->wincon0 +
+ cfg = readl((unsigned int)®->wincon0 +
EXYNOS_WINCON(win_id));
cfg &= EXYNOS_WINCON_ENWIN_DISABLE;
- writel(cfg, (unsigned int)&fimd_ctrl->wincon0 +
+ writel(cfg, (unsigned int)®->wincon0 +
EXYNOS_WINCON(win_id));
- cfg = readl(&fimd_ctrl->winshmap);
+ cfg = readl(®->winshmap);
cfg &= ~EXYNOS_WINSHMAP_CH_DISABLE(win_id);
- writel(cfg, &fimd_ctrl->winshmap);
+ writel(cfg, ®->winshmap);
}
/*
@@ -307,9 +307,9 @@ void exynos_fimd_disable_sysmmu(void)
}
}
-void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address)
+void exynos_fimd_lcd_init(struct vidinfo *priv, ulong lcd_base_address)
{
- struct exynos_fb *fimd_ctrl;
+ struct exynos_fb *reg;
unsigned int cfg = 0, rgb_mode;
unsigned int offset;
unsigned int node;
@@ -319,105 +319,105 @@ void exynos_fimd_lcd_init(struct vidinfo *pvid, ulong lcd_base_address)
if (node <= 0)
debug("exynos_fb: Can't get device node for fimd\n");
- fimd_ctrl = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node,
+ reg = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node,
"reg");
- if (fimd_ctrl == NULL)
+ if (reg == NULL)
debug("Can't get the FIMD base address\n");
- pvid->fimd_ctrl = fimd_ctrl;
+ priv->reg = reg;
if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu"))
exynos_fimd_disable_sysmmu();
offset = exynos_fimd_get_base_offset();
- rgb_mode = pvid->rgb_mode;
+ rgb_mode = priv->rgb_mode;
- if (pvid->interface_mode == FIMD_RGB_INTERFACE) {
+ if (priv->interface_mode == FIMD_RGB_INTERFACE) {
cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
- writel(cfg, &fimd_ctrl->vidcon0);
+ writel(cfg, ®->vidcon0);
- cfg = readl(&fimd_ctrl->vidcon2);
+ cfg = readl(®->vidcon2);
cfg &= ~(EXYNOS_VIDCON2_WB_MASK |
EXYNOS_VIDCON2_TVFORMATSEL_MASK |
EXYNOS_VIDCON2_TVFORMATSEL_YUV_MASK);
cfg |= EXYNOS_VIDCON2_WB_DISABLE;
- writel(cfg, &fimd_ctrl->vidcon2);
+ writel(cfg, ®->vidcon2);
/* set polarity */
cfg = 0;
- if (!pvid->vl_clkp)
+ if (!priv->vl_clkp)
cfg |= EXYNOS_VIDCON1_IVCLK_RISING_EDGE;
- if (!pvid->vl_hsp)
+ if (!priv->vl_hsp)
cfg |= EXYNOS_VIDCON1_IHSYNC_INVERT;
- if (!pvid->vl_vsp)
+ if (!priv->vl_vsp)
cfg |= EXYNOS_VIDCON1_IVSYNC_INVERT;
- if (!pvid->vl_dp)
+ if (!priv->vl_dp)
cfg |= EXYNOS_VIDCON1_IVDEN_INVERT;
- writel(cfg, (unsigned int)&fimd_ctrl->vidcon1 + offset);
+ writel(cfg, (unsigned int)®->vidcon1 + offset);
/* set timing */
- cfg = EXYNOS_VIDTCON0_VFPD(pvid->vl_vfpd - 1);
- cfg |= EXYNOS_VIDTCON0_VBPD(pvid->vl_vbpd - 1);
- cfg |= EXYNOS_VIDTCON0_VSPW(pvid->vl_vspw - 1);
- writel(cfg, (unsigned int)&fimd_ctrl->vidtcon0 + offset);
+ cfg = EXYNOS_VIDTCON0_VFPD(priv->vl_vfpd - 1);
+ cfg |= EXYNOS_VIDTCON0_VBPD(priv->vl_vbpd - 1);
+ cfg |= EXYNOS_VIDTCON0_VSPW(priv->vl_vspw - 1);
+ writel(cfg, (unsigned int)®->vidtcon0 + offset);
- cfg = EXYNOS_VIDTCON1_HFPD(pvid->vl_hfpd - 1);
- cfg |= EXYNOS_VIDTCON1_HBPD(pvid->vl_hbpd - 1);
- cfg |= EXYNOS_VIDTCON1_HSPW(pvid->vl_hspw - 1);
+ cfg = EXYNOS_VIDTCON1_HFPD(priv->vl_hfpd - 1);
+ cfg |= EXYNOS_VIDTCON1_HBPD(priv->vl_hbpd - 1);
+ cfg |= EXYNOS_VIDTCON1_HSPW(priv->vl_hspw - 1);
- writel(cfg, (unsigned int)&fimd_ctrl->vidtcon1 + offset);
+ writel(cfg, (unsigned int)®->vidtcon1 + offset);
/* set lcd size */
- cfg = EXYNOS_VIDTCON2_HOZVAL(pvid->vl_col - 1) |
- EXYNOS_VIDTCON2_LINEVAL(pvid->vl_row - 1) |
- EXYNOS_VIDTCON2_HOZVAL_E(pvid->vl_col - 1) |
- EXYNOS_VIDTCON2_LINEVAL_E(pvid->vl_row - 1);
+ cfg = EXYNOS_VIDTCON2_HOZVAL(priv->vl_col - 1) |
+ EXYNOS_VIDTCON2_LINEVAL(priv->vl_row - 1) |
+ EXYNOS_VIDTCON2_HOZVAL_E(priv->vl_col - 1) |
+ EXYNOS_VIDTCON2_LINEVAL_E(priv->vl_row - 1);
- writel(cfg, (unsigned int)&fimd_ctrl->vidtcon2 + offset);
+ writel(cfg, (unsigned int)®->vidtcon2 + offset);
}
/* set display mode */
- cfg = readl(&fimd_ctrl->vidcon0);
+ cfg = readl(®->vidcon0);
cfg &= ~EXYNOS_VIDCON0_PNRMODE_MASK;
cfg |= (rgb_mode << EXYNOS_VIDCON0_PNRMODE_SHIFT);
- writel(cfg, &fimd_ctrl->vidcon0);
+ writel(cfg, ®->vidcon0);
/* set par */
- exynos_fimd_set_par(pvid, pvid->win_id);
+ exynos_fimd_set_par(priv, priv->win_id);
/* set memory address */
- exynos_fimd_set_buffer_address(pvid, pvid->win_id, lcd_base_address);
+ exynos_fimd_set_buffer_address(priv, priv->win_id, lcd_base_address);
/* set buffer size */
- cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid->vl_col *
- NBITS(pvid->vl_bpix) / 8) |
- EXYNOS_VIDADDR_PAGEWIDTH_E(pvid->vl_col *
- NBITS(pvid->vl_bpix) / 8) |
+ cfg = EXYNOS_VIDADDR_PAGEWIDTH(priv->vl_col *
+ NBITS(priv->vl_bpix) / 8) |
+ EXYNOS_VIDADDR_PAGEWIDTH_E(priv->vl_col *
+ NBITS(priv->vl_bpix) / 8) |
EXYNOS_VIDADDR_OFFSIZE(0) |
EXYNOS_VIDADDR_OFFSIZE_E(0);
- writel(cfg, (unsigned int)&fimd_ctrl->vidw00add2 +
- EXYNOS_BUFFER_SIZE(pvid->win_id));
+ writel(cfg, (unsigned int)®->vidw00add2 +
+ EXYNOS_BUFFER_SIZE(priv->win_id));
/* set clock */
- exynos_fimd_set_clock(pvid);
+ exynos_fimd_set_clock(priv);
/* set rgb mode to dual lcd. */
- exynos_fimd_set_dualrgb(pvid, pvid->dual_lcd_enabled);
+ exynos_fimd_set_dualrgb(priv, priv->dual_lcd_enabled);
/* display on */
- exynos_fimd_lcd_on(pvid);
+ exynos_fimd_lcd_on(priv);
/* window on */
- exynos_fimd_window_on(pvid, pvid->win_id);
+ exynos_fimd_window_on(priv, priv->win_id);
- exynos_fimd_set_dp_clkcon(pvid, pvid->dp_enabled);
+ exynos_fimd_set_dp_clkcon(priv, priv->dp_enabled);
}
-unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid)
+unsigned long exynos_fimd_calc_fbsize(struct vidinfo *priv)
{
- return pvid->vl_col * pvid->vl_row * (NBITS(pvid->vl_bpix) / 8);
+ return priv->vl_col * priv->vl_row * (NBITS(priv->vl_bpix) / 8);
}
ushort *configuration_get_cmap(void)
diff --git a/include/exynos_lcd.h b/include/exynos_lcd.h
index 0aa0fc7..ab92ffb 100644
--- a/include/exynos_lcd.h
+++ b/include/exynos_lcd.h
@@ -75,7 +75,7 @@ typedef struct vidinfo {
unsigned int sclk_div;
unsigned int dual_lcd_enabled;
- struct exynos_fb *fimd_ctrl;
+ struct exynos_fb *reg;
struct exynos_platform_mipi_dsim *dsim_platform_data_dt;
} vidinfo_t;
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 24/25] exynos: video: Convert several boards to driver model for video
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (22 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 23/25] exynos: video: Rename variables for driver model Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 25/25] exynos: video: Drop old unused code Simon Glass
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
Update several boards to use driver model for video. This involves changes
to the EDP and FIMD (frame buffer) drivers. Existing PWM, simple-panel and
pwm-backlight drivers are used. These work without additional configuration
since they use the device tree settings in the same way as Linux.
Boards converted are:
- snow
- spring
- peach-pit
- peach-pi
All have been tested. Not converted:
- MIPI display driver
- s5pc210_universal
- smdk5420
- smdk5250
- trats
- trats2
Signed-off-by: Simon Glass <sjg@chromium.org>
---
arch/arm/mach-exynos/include/mach/dp_info.h | 1 +
board/samsung/common/board.c | 15 -
configs/peach-pi_defconfig | 3 +
configs/peach-pit_defconfig | 3 +
configs/snow_defconfig | 3 +
configs/spring_defconfig | 3 +
drivers/video/exynos/exynos_dp.c | 146 ++++++++--
drivers/video/exynos/exynos_fb.c | 407 ++++++++++++++++------------
drivers/video/simple_panel.c | 2 +
include/configs/exynos5-dt-common.h | 5 +-
10 files changed, 373 insertions(+), 215 deletions(-)
diff --git a/arch/arm/mach-exynos/include/mach/dp_info.h b/arch/arm/mach-exynos/include/mach/dp_info.h
index 8ce33d6..1079e1e 100644
--- a/arch/arm/mach-exynos/include/mach/dp_info.h
+++ b/arch/arm/mach-exynos/include/mach/dp_info.h
@@ -72,6 +72,7 @@ struct exynos_dp_priv {
unsigned char dpcd_rev;
/*support enhanced frame cap */
unsigned char dpcd_efc;
+ struct exynos_dp *regs;
};
enum analog_power_block {
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 1334c22..bb6b14b 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -152,21 +152,6 @@ int board_early_init_f(void)
board_i2c_init(gd->fdt_blob);
#endif
-#if defined(CONFIG_EXYNOS_FB)
- /*
- * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs
- * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix,
- * to reserve frame-buffer memory at a very early stage. So, we need
- * to fill panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix
- * before lcd_setmem() is called.
- */
- err = exynos_lcd_early_init(gd->fdt_blob);
- if (err) {
- debug("LCD early init failed\n");
- return err;
- }
-#endif
-
return exynos_early_init_f();
}
#endif
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index 65c6044..de08d4e 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -27,6 +27,8 @@ CONFIG_DM_PMIC=y
CONFIG_PMIC_TPS65090=y
CONFIG_DM_REGULATOR=y
CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_EXYNOS=y
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_I2S_SAMSUNG=y
@@ -36,6 +38,7 @@ CONFIG_EXYNOS_SPI=y
CONFIG_TPM_TIS_INFINEON=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
CONFIG_TPM=y
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index 272988f..def7fca 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -27,6 +27,8 @@ CONFIG_DM_PMIC=y
CONFIG_PMIC_TPS65090=y
CONFIG_DM_REGULATOR=y
CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_EXYNOS=y
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_I2S_SAMSUNG=y
@@ -36,6 +38,7 @@ CONFIG_EXYNOS_SPI=y
CONFIG_TPM_TIS_INFINEON=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
CONFIG_TPM=y
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index 3d8081b..f1d1313 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -32,6 +32,8 @@ CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_MAX77686=y
CONFIG_REGULATOR_S5M8767=y
CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_EXYNOS=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_S5P=y
CONFIG_DEBUG_UART_BASE=0x12c30000
@@ -45,6 +47,7 @@ CONFIG_EXYNOS_SPI=y
CONFIG_TPM_TIS_INFINEON=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
CONFIG_VIDEO_BRIDGE_NXP_PTN3460=y
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index 11cb6e3..1d37069 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -32,6 +32,8 @@ CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_MAX77686=y
CONFIG_REGULATOR_S5M8767=y
CONFIG_REGULATOR_TPS65090=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_EXYNOS=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_S5P=y
CONFIG_DEBUG_UART_BASE=0x12c30000
@@ -45,6 +47,7 @@ CONFIG_EXYNOS_SPI=y
CONFIG_TPM_TIS_INFINEON=y
CONFIG_USB=y
CONFIG_DM_USB=y
+CONFIG_DM_VIDEO=y
CONFIG_VIDEO_BRIDGE=y
CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
CONFIG_TPM=y
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 5f39b0c..8f2699b 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -7,17 +7,21 @@
*/
#include <config.h>
+#include <dm.h>
#include <common.h>
+#include <display.h>
+#include <fdtdec.h>
+#include <libfdt.h>
#include <malloc.h>
+#include <video_bridge.h>
#include <linux/compat.h>
#include <linux/err.h>
#include <asm/arch/clk.h>
#include <asm/arch/cpu.h>
#include <asm/arch/dp_info.h>
#include <asm/arch/dp.h>
+#include <asm/arch/pinmux.h>
#include <asm/arch/power.h>
-#include <fdtdec.h>
-#include <libfdt.h>
#include "exynos_dp_lowlevel.h"
@@ -872,15 +876,19 @@ static unsigned int exynos_dp_config_video(struct exynos_dp *regs,
return ret;
}
-int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *priv)
+static int exynos_dp_ofdata_to_platdata(struct udevice *dev)
{
- unsigned int node = fdtdec_next_compatible(blob, 0,
- COMPAT_SAMSUNG_EXYNOS5_DP);
- if (node <= 0) {
- debug("exynos_dp: Can't get device node for dp\n");
- return -ENODEV;
- }
+ struct exynos_dp_priv *priv = dev_get_priv(dev);
+ const void *blob = gd->fdt_blob;
+ unsigned int node = dev->of_offset;
+ fdt_addr_t addr;
+ addr = dev_get_addr(dev);
+ if (addr == FDT_ADDR_T_NONE) {
+ debug("Can't get the DP base address\n");
+ return -EINVAL;
+ }
+ priv->regs = (struct exynos_dp *)addr;
priv->disp_info.h_res = fdtdec_get_int(blob, node,
"samsung,h-res", 0);
priv->disp_info.h_sync_width = fdtdec_get_int(blob, node,
@@ -926,34 +934,97 @@ int exynos_dp_parse_dt(const void *blob, struct exynos_dp_priv *priv)
return 0;
}
-unsigned int exynos_init_dp(void)
+static int exynos_dp_bridge_init(struct udevice *dev)
{
- unsigned int ret;
- struct exynos_dp_priv *priv;
- struct exynos_dp *regs;
- int node;
+ const int max_tries = 10;
+ int num_tries;
+ int ret;
- priv = kzalloc(sizeof(struct exynos_dp_priv), GFP_KERNEL);
- if (!priv) {
- debug("failed to allocate edp device object.\n");
- return -EFAULT;
+ debug("%s\n", __func__);
+ ret = video_bridge_attach(dev);
+ if (ret) {
+ debug("video bridge init failed: %d\n", ret);
+ return ret;
}
- if (exynos_dp_parse_dt(gd->fdt_blob, priv))
- debug("unable to parse DP DT node\n");
+ /*
+ * We need to wait for 90ms after bringing up the bridge since there
+ * is a phantom "high" on the HPD chip during its bootup. The phantom
+ * high comes within 7ms of de-asserting PD and persists for at least
+ * 15ms. The real high comes roughly 50ms after PD is de-asserted. The
+ * phantom high makes it hard for us to know when the NXP chip is up.
+ */
+ mdelay(90);
- node = fdtdec_next_compatible(gd->fdt_blob, 0,
- COMPAT_SAMSUNG_EXYNOS5_DP);
- if (node <= 0)
- debug("exynos_dp: Can't get device node for dp\n");
+ for (num_tries = 0; num_tries < max_tries; num_tries++) {
+ /* Check HPD. If it's high, or we don't have it, all is well */
+ ret = video_bridge_check_attached(dev);
+ if (!ret || ret == -ENOENT)
+ return 0;
- regs = (struct exynos_dp *)fdtdec_get_addr(gd->fdt_blob, node,
- "reg");
- if (regs == NULL)
- debug("Can't get the DP base address\n");
+ debug("%s: eDP bridge failed to come up; try %d of %d\n",
+ __func__, num_tries, max_tries);
+ }
+
+ /* Immediately go into bridge reset if the hp line is not high */
+ return -EIO;
+}
+
+static int exynos_dp_bridge_setup(const void *blob)
+{
+ const int max_tries = 2;
+ int num_tries;
+ struct udevice *dev;
+ int ret;
+
+ /* Configure I2C registers for Parade bridge */
+ ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev);
+ if (ret) {
+ debug("video bridge init failed: %d\n", ret);
+ return ret;
+ }
+
+ if (strncmp(dev->driver->name, "parade", 6)) {
+ /* Mux HPHPD to the special hotplug detect mode */
+ exynos_pinmux_config(PERIPH_ID_DPHPD, 0);
+ }
+
+ for (num_tries = 0; num_tries < max_tries; num_tries++) {
+ ret = exynos_dp_bridge_init(dev);
+ if (!ret)
+ return 0;
+ if (num_tries == max_tries - 1)
+ break;
+
+ /*
+ * If we're here, the bridge chip failed to initialise.
+ * Power down the bridge in an attempt to reset.
+ */
+ video_bridge_set_active(dev, false);
+
+ /*
+ * Arbitrarily wait 300ms here with DP_N low. Don't know for
+ * sure how long we should wait, but we're being paranoid.
+ */
+ mdelay(300);
+ }
+ return ret;
+}
+int exynos_dp_enable(struct udevice *dev, int panel_bpp,
+ const struct display_timing *timing)
+{
+ struct exynos_dp_priv *priv = dev_get_priv(dev);
+ struct exynos_dp *regs = priv->regs;
+ unsigned int ret;
+
+ debug("%s: start\n", __func__);
exynos_dp_disp_info(&priv->disp_info);
+ ret = exynos_dp_bridge_setup(gd->fdt_blob);
+ if (ret && ret != -ENODEV)
+ printf("LCD bridge failed to enable: %d\n", ret);
+
exynos_dp_phy_ctrl(1);
ret = exynos_dp_init_dp(regs);
@@ -992,3 +1063,22 @@ unsigned int exynos_init_dp(void)
return ret;
}
+
+
+static const struct dm_display_ops exynos_dp_ops = {
+ .enable = exynos_dp_enable,
+};
+
+static const struct udevice_id exynos_dp_ids[] = {
+ { .compatible = "samsung,exynos5-dp" },
+ { }
+};
+
+U_BOOT_DRIVER(exynos_dp) = {
+ .name = "eexynos_dp",
+ .id = UCLASS_DISPLAY,
+ .of_match = exynos_dp_ids,
+ .ops = &exynos_dp_ops,
+ .ofdata_to_platdata = exynos_dp_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct exynos_dp_priv),
+};
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 83b1187..c8fef63 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -9,33 +9,98 @@
#include <config.h>
#include <common.h>
+#include <display.h>
#include <div64.h>
-#include <lcd.h>
+#include <dm.h>
#include <fdtdec.h>
#include <libfdt.h>
+#include <panel.h>
+#include <video.h>
+#include <video_bridge.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clock.h>
#include <asm/arch/clk.h>
#include <asm/arch/mipi_dsim.h>
#include <asm/arch/dp_info.h>
+#include <asm/arch/fb.h>
+#include <asm/arch/pinmux.h>
#include <asm/arch/system.h>
#include <asm/gpio.h>
#include <asm-generic/errno.h>
-#include "exynos_fb.h"
-
DECLARE_GLOBAL_DATA_PTR;
-struct vidinfo panel_info = {
- /*
- * Insert a value here so that we don't end up in the BSS
- * Reference: drivers/video/tegra.c
- */
- .vl_col = -1,
+enum {
+ FIMD_RGB_INTERFACE = 1,
+ FIMD_CPU_INTERFACE = 2,
+};
+
+enum exynos_fb_rgb_mode_t {
+ MODE_RGB_P = 0,
+ MODE_BGR_P = 1,
+ MODE_RGB_S = 2,
+ MODE_BGR_S = 3,
};
-static void exynos_fimd_set_dualrgb(struct vidinfo *priv, unsigned int enabled)
+struct exynos_fb_priv {
+ ushort vl_col; /* Number of columns (i.e. 640) */
+ ushort vl_row; /* Number of rows (i.e. 480) */
+ ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */
+ ushort vl_width; /* Width of display area in millimeters */
+ ushort vl_height; /* Height of display area in millimeters */
+
+ /* LCD configuration register */
+ u_char vl_freq; /* Frequency */
+ u_char vl_clkp; /* Clock polarity */
+ u_char vl_oep; /* Output Enable polarity */
+ u_char vl_hsp; /* Horizontal Sync polarity */
+ u_char vl_vsp; /* Vertical Sync polarity */
+ u_char vl_dp; /* Data polarity */
+ u_char vl_bpix; /* Bits per pixel */
+
+ /* Horizontal control register. Timing from data sheet */
+ u_char vl_hspw; /* Horz sync pulse width */
+ u_char vl_hfpd; /* Wait before of line */
+ u_char vl_hbpd; /* Wait end of line */
+
+ /* Vertical control register. */
+ u_char vl_vspw; /* Vertical sync pulse width */
+ u_char vl_vfpd; /* Wait before of frame */
+ u_char vl_vbpd; /* Wait end of frame */
+ u_char vl_cmd_allow_len; /* Wait end of frame */
+
+ unsigned int win_id;
+ unsigned int init_delay;
+ unsigned int power_on_delay;
+ unsigned int reset_delay;
+ unsigned int interface_mode;
+ unsigned int mipi_enabled;
+ unsigned int dp_enabled;
+ unsigned int cs_setup;
+ unsigned int wr_setup;
+ unsigned int wr_act;
+ unsigned int wr_hold;
+ unsigned int logo_on;
+ unsigned int logo_width;
+ unsigned int logo_height;
+ int logo_x_offset;
+ int logo_y_offset;
+ unsigned long logo_addr;
+ unsigned int rgb_mode;
+ unsigned int resolution;
+
+ /* parent clock name(MPLL, EPLL or VPLL) */
+ unsigned int pclk_name;
+ /* ratio value for source clock from parent clock. */
+ unsigned int sclk_div;
+
+ unsigned int dual_lcd_enabled;
+ struct exynos_fb *reg;
+ struct exynos_platform_mipi_dsim *dsim_platform_data_dt;
+};
+
+static void exynos_fimd_set_dualrgb(struct exynos_fb_priv *priv, bool enabled)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -52,7 +117,7 @@ static void exynos_fimd_set_dualrgb(struct vidinfo *priv, unsigned int enabled)
writel(cfg, ®->dualrgb);
}
-static void exynos_fimd_set_dp_clkcon(struct vidinfo *priv,
+static void exynos_fimd_set_dp_clkcon(struct exynos_fb_priv *priv,
unsigned int enabled)
{
struct exynos_fb *reg = priv->reg;
@@ -64,7 +129,8 @@ static void exynos_fimd_set_dp_clkcon(struct vidinfo *priv,
writel(cfg, ®->dp_mie_clkcon);
}
-static void exynos_fimd_set_par(struct vidinfo *priv, unsigned int win_id)
+static void exynos_fimd_set_par(struct exynos_fb_priv *priv,
+ unsigned int win_id)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -117,7 +183,7 @@ static void exynos_fimd_set_par(struct vidinfo *priv, unsigned int win_id)
EXYNOS_VIDOSD(win_id));
}
-static void exynos_fimd_set_buffer_address(struct vidinfo *priv,
+static void exynos_fimd_set_buffer_address(struct exynos_fb_priv *priv,
unsigned int win_id,
ulong lcd_base_addr)
{
@@ -125,7 +191,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *priv,
unsigned long start_addr, end_addr;
start_addr = lcd_base_addr;
- end_addr = start_addr + ((priv->vl_col * (NBITS(priv->vl_bpix) / 8)) *
+ end_addr = start_addr + ((priv->vl_col * (VNBITS(priv->vl_bpix) / 8)) *
priv->vl_row);
writel(start_addr, (unsigned int)®->vidw00add0b0 +
@@ -134,7 +200,7 @@ static void exynos_fimd_set_buffer_address(struct vidinfo *priv,
EXYNOS_BUFFER_OFFSET(win_id));
}
-static void exynos_fimd_set_clock(struct vidinfo *priv)
+static void exynos_fimd_set_clock(struct exynos_fb_priv *priv)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0, div = 0, remainder, remainder_div;
@@ -188,7 +254,7 @@ static void exynos_fimd_set_clock(struct vidinfo *priv)
writel(cfg, ®->vidcon0);
}
-void exynos_set_trigger(struct vidinfo *priv)
+void exynos_set_trigger(struct exynos_fb_priv *priv)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -200,7 +266,7 @@ void exynos_set_trigger(struct vidinfo *priv)
writel(cfg, ®->trigcon);
}
-int exynos_is_i80_frame_done(struct vidinfo *priv)
+int exynos_is_i80_frame_done(struct exynos_fb_priv *priv)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -215,7 +281,7 @@ int exynos_is_i80_frame_done(struct vidinfo *priv)
return status;
}
-static void exynos_fimd_lcd_on(struct vidinfo *priv)
+static void exynos_fimd_lcd_on(struct exynos_fb_priv *priv)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -226,7 +292,8 @@ static void exynos_fimd_lcd_on(struct vidinfo *priv)
writel(cfg, ®->vidcon0);
}
-static void exynos_fimd_window_on(struct vidinfo *priv, unsigned int win_id)
+static void exynos_fimd_window_on(struct exynos_fb_priv *priv,
+ unsigned int win_id)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -243,7 +310,7 @@ static void exynos_fimd_window_on(struct vidinfo *priv, unsigned int win_id)
writel(cfg, ®->winshmap);
}
-void exynos_fimd_lcd_off(struct vidinfo *priv)
+void exynos_fimd_lcd_off(struct exynos_fb_priv *priv)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -253,7 +320,7 @@ void exynos_fimd_lcd_off(struct vidinfo *priv)
writel(cfg, ®->vidcon0);
}
-void exynos_fimd_window_off(struct vidinfo *priv, unsigned int win_id)
+void exynos_fimd_window_off(struct exynos_fb_priv *priv, unsigned int win_id)
{
struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0;
@@ -307,24 +374,16 @@ void exynos_fimd_disable_sysmmu(void)
}
}
-void exynos_fimd_lcd_init(struct vidinfo *priv, ulong lcd_base_address)
+void exynos_fimd_lcd_init(struct udevice *dev)
{
- struct exynos_fb *reg;
+ struct exynos_fb_priv *priv = dev_get_priv(dev);
+ struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+ struct exynos_fb *reg = priv->reg;
unsigned int cfg = 0, rgb_mode;
unsigned int offset;
unsigned int node;
- node = fdtdec_next_compatible(gd->fdt_blob,
- 0, COMPAT_SAMSUNG_EXYNOS_FIMD);
- if (node <= 0)
- debug("exynos_fb: Can't get device node for fimd\n");
-
- reg = (struct exynos_fb *)fdtdec_get_addr(gd->fdt_blob, node,
- "reg");
- if (reg == NULL)
- debug("Can't get the FIMD base address\n");
- priv->reg = reg;
-
+ node = dev->of_offset;
if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu"))
exynos_fimd_disable_sysmmu();
@@ -387,13 +446,13 @@ void exynos_fimd_lcd_init(struct vidinfo *priv, ulong lcd_base_address)
exynos_fimd_set_par(priv, priv->win_id);
/* set memory address */
- exynos_fimd_set_buffer_address(priv, priv->win_id, lcd_base_address);
+ exynos_fimd_set_buffer_address(priv, priv->win_id, plat->base);
/* set buffer size */
cfg = EXYNOS_VIDADDR_PAGEWIDTH(priv->vl_col *
- NBITS(priv->vl_bpix) / 8) |
+ VNBITS(priv->vl_bpix) / 8) |
EXYNOS_VIDADDR_PAGEWIDTH_E(priv->vl_col *
- NBITS(priv->vl_bpix) / 8) |
+ VNBITS(priv->vl_bpix) / 8) |
EXYNOS_VIDADDR_OFFSIZE(0) |
EXYNOS_VIDADDR_OFFSIZE_E(0);
@@ -415,26 +474,9 @@ void exynos_fimd_lcd_init(struct vidinfo *priv, ulong lcd_base_address)
exynos_fimd_set_dp_clkcon(priv, priv->dp_enabled);
}
-unsigned long exynos_fimd_calc_fbsize(struct vidinfo *priv)
-{
- return priv->vl_col * priv->vl_row * (NBITS(priv->vl_bpix) / 8);
-}
-
-ushort *configuration_get_cmap(void)
-{
-#if defined(CONFIG_LCD_LOGO)
- return bmp_logo_palette;
-#else
- return NULL;
-#endif
-}
-
-static void exynos_lcd_init(struct vidinfo *vid, ulong lcd_base)
+unsigned long exynos_fimd_calc_fbsize(struct exynos_fb_priv *priv)
{
- exynos_fimd_lcd_init(vid, lcd_base);
-
- /* Enable flushing after LCD writes if requested */
- lcd_set_flush_dcache(1);
+ return priv->vl_col * priv->vl_row * (VNBITS(priv->vl_bpix) / 8);
}
__weak void exynos_cfg_lcd_gpio(void)
@@ -470,217 +512,242 @@ __weak int exynos_lcd_misc_init(struct vidinfo *vid)
return 0;
}
-static void lcd_panel_on(struct vidinfo *vid)
+int exynos_fb_ofdata_to_platdata(struct udevice *dev)
{
- struct gpio_desc pwm_out_gpio;
- struct gpio_desc bl_en_gpio;
- unsigned int node;
-
- udelay(vid->init_delay);
-
- exynos_backlight_reset();
-
- exynos_cfg_lcd_gpio();
-
- exynos_lcd_power_on();
-
- udelay(vid->power_on_delay);
-
- if (vid->dp_enabled)
- exynos_init_dp();
-
- exynos_reset_lcd();
-
- udelay(vid->reset_delay);
-
- exynos_backlight_on(1);
-
- node = fdtdec_next_compatible(gd->fdt_blob, 0,
- COMPAT_SAMSUNG_EXYNOS_FIMD);
- if (node <= 0) {
- debug("FIMD: Can't get device node for FIMD\n");
- return;
- }
- gpio_request_by_name_nodev(gd->fdt_blob, node, "samsung,pwm-out-gpio",
- 0, &pwm_out_gpio,
- GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
-
- gpio_request_by_name_nodev(gd->fdt_blob, node, "samsung,bl-en-gpio", 0,
- &bl_en_gpio,
- GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
-
- exynos_cfg_ldo();
+ struct exynos_fb_priv *priv = dev_get_priv(dev);
+ unsigned int node = dev->of_offset;
+ const void *blob = gd->fdt_blob;
+ fdt_addr_t addr;
- exynos_enable_ldo(1);
-
- if (vid->mipi_enabled)
- exynos_mipi_dsi_init(panel_info.dsim_platform_data_dt);
-}
-
-int exynos_lcd_early_init(const void *blob)
-{
- unsigned int node;
- node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_FIMD);
- if (node <= 0) {
- debug("exynos_fb: Can't get device node for fimd\n");
- return -ENODEV;
+ addr = dev_get_addr(dev);
+ if (addr == FDT_ADDR_T_NONE) {
+ debug("Can't get the FIMD base address\n");
+ return -EINVAL;
}
+ priv->reg = (struct exynos_fb *)addr;
- panel_info.vl_col = fdtdec_get_int(blob, node, "samsung,vl-col", 0);
- if (panel_info.vl_col == 0) {
+ priv->vl_col = fdtdec_get_int(blob, node, "samsung,vl-col", 0);
+ if (priv->vl_col == 0) {
debug("Can't get XRES\n");
return -ENXIO;
}
- panel_info.vl_row = fdtdec_get_int(blob, node, "samsung,vl-row", 0);
- if (panel_info.vl_row == 0) {
+ priv->vl_row = fdtdec_get_int(blob, node, "samsung,vl-row", 0);
+ if (priv->vl_row == 0) {
debug("Can't get YRES\n");
return -ENXIO;
}
- panel_info.vl_width = fdtdec_get_int(blob, node,
+ priv->vl_width = fdtdec_get_int(blob, node,
"samsung,vl-width", 0);
- panel_info.vl_height = fdtdec_get_int(blob, node,
+ priv->vl_height = fdtdec_get_int(blob, node,
"samsung,vl-height", 0);
- panel_info.vl_freq = fdtdec_get_int(blob, node, "samsung,vl-freq", 0);
- if (panel_info.vl_freq == 0) {
+ priv->vl_freq = fdtdec_get_int(blob, node, "samsung,vl-freq", 0);
+ if (priv->vl_freq == 0) {
debug("Can't get refresh rate\n");
return -ENXIO;
}
if (fdtdec_get_bool(blob, node, "samsung,vl-clkp"))
- panel_info.vl_clkp = CONFIG_SYS_LOW;
+ priv->vl_clkp = VIDEO_ACTIVE_LOW;
if (fdtdec_get_bool(blob, node, "samsung,vl-oep"))
- panel_info.vl_oep = CONFIG_SYS_LOW;
+ priv->vl_oep = VIDEO_ACTIVE_LOW;
if (fdtdec_get_bool(blob, node, "samsung,vl-hsp"))
- panel_info.vl_hsp = CONFIG_SYS_LOW;
+ priv->vl_hsp = VIDEO_ACTIVE_LOW;
if (fdtdec_get_bool(blob, node, "samsung,vl-vsp"))
- panel_info.vl_vsp = CONFIG_SYS_LOW;
+ priv->vl_vsp = VIDEO_ACTIVE_LOW;
if (fdtdec_get_bool(blob, node, "samsung,vl-dp"))
- panel_info.vl_dp = CONFIG_SYS_LOW;
+ priv->vl_dp = VIDEO_ACTIVE_LOW;
- panel_info.vl_bpix = fdtdec_get_int(blob, node, "samsung,vl-bpix", 0);
- if (panel_info.vl_bpix == 0) {
+ priv->vl_bpix = fdtdec_get_int(blob, node, "samsung,vl-bpix", 0);
+ if (priv->vl_bpix == 0) {
debug("Can't get bits per pixel\n");
return -ENXIO;
}
- panel_info.vl_hspw = fdtdec_get_int(blob, node, "samsung,vl-hspw", 0);
- if (panel_info.vl_hspw == 0) {
+ priv->vl_hspw = fdtdec_get_int(blob, node, "samsung,vl-hspw", 0);
+ if (priv->vl_hspw == 0) {
debug("Can't get hsync width\n");
return -ENXIO;
}
- panel_info.vl_hfpd = fdtdec_get_int(blob, node, "samsung,vl-hfpd", 0);
- if (panel_info.vl_hfpd == 0) {
+ priv->vl_hfpd = fdtdec_get_int(blob, node, "samsung,vl-hfpd", 0);
+ if (priv->vl_hfpd == 0) {
debug("Can't get right margin\n");
return -ENXIO;
}
- panel_info.vl_hbpd = (u_char)fdtdec_get_int(blob, node,
+ priv->vl_hbpd = (u_char)fdtdec_get_int(blob, node,
"samsung,vl-hbpd", 0);
- if (panel_info.vl_hbpd == 0) {
+ if (priv->vl_hbpd == 0) {
debug("Can't get left margin\n");
return -ENXIO;
}
- panel_info.vl_vspw = (u_char)fdtdec_get_int(blob, node,
+ priv->vl_vspw = (u_char)fdtdec_get_int(blob, node,
"samsung,vl-vspw", 0);
- if (panel_info.vl_vspw == 0) {
+ if (priv->vl_vspw == 0) {
debug("Can't get vsync width\n");
return -ENXIO;
}
- panel_info.vl_vfpd = fdtdec_get_int(blob, node,
+ priv->vl_vfpd = fdtdec_get_int(blob, node,
"samsung,vl-vfpd", 0);
- if (panel_info.vl_vfpd == 0) {
+ if (priv->vl_vfpd == 0) {
debug("Can't get lower margin\n");
return -ENXIO;
}
- panel_info.vl_vbpd = fdtdec_get_int(blob, node, "samsung,vl-vbpd", 0);
- if (panel_info.vl_vbpd == 0) {
+ priv->vl_vbpd = fdtdec_get_int(blob, node, "samsung,vl-vbpd", 0);
+ if (priv->vl_vbpd == 0) {
debug("Can't get upper margin\n");
return -ENXIO;
}
- panel_info.vl_cmd_allow_len = fdtdec_get_int(blob, node,
+ priv->vl_cmd_allow_len = fdtdec_get_int(blob, node,
"samsung,vl-cmd-allow-len", 0);
- panel_info.win_id = fdtdec_get_int(blob, node, "samsung,winid", 0);
- panel_info.init_delay = fdtdec_get_int(blob, node,
+ priv->win_id = fdtdec_get_int(blob, node, "samsung,winid", 0);
+ priv->init_delay = fdtdec_get_int(blob, node,
"samsung,init-delay", 0);
- panel_info.power_on_delay = fdtdec_get_int(blob, node,
+ priv->power_on_delay = fdtdec_get_int(blob, node,
"samsung,power-on-delay", 0);
- panel_info.reset_delay = fdtdec_get_int(blob, node,
+ priv->reset_delay = fdtdec_get_int(blob, node,
"samsung,reset-delay", 0);
- panel_info.interface_mode = fdtdec_get_int(blob, node,
+ priv->interface_mode = fdtdec_get_int(blob, node,
"samsung,interface-mode", 0);
- panel_info.mipi_enabled = fdtdec_get_int(blob, node,
+ priv->mipi_enabled = fdtdec_get_int(blob, node,
"samsung,mipi-enabled", 0);
- panel_info.dp_enabled = fdtdec_get_int(blob, node,
+ priv->dp_enabled = fdtdec_get_int(blob, node,
"samsung,dp-enabled", 0);
- panel_info.cs_setup = fdtdec_get_int(blob, node,
+ priv->cs_setup = fdtdec_get_int(blob, node,
"samsung,cs-setup", 0);
- panel_info.wr_setup = fdtdec_get_int(blob, node,
+ priv->wr_setup = fdtdec_get_int(blob, node,
"samsung,wr-setup", 0);
- panel_info.wr_act = fdtdec_get_int(blob, node, "samsung,wr-act", 0);
- panel_info.wr_hold = fdtdec_get_int(blob, node, "samsung,wr-hold", 0);
+ priv->wr_act = fdtdec_get_int(blob, node, "samsung,wr-act", 0);
+ priv->wr_hold = fdtdec_get_int(blob, node, "samsung,wr-hold", 0);
- panel_info.logo_on = fdtdec_get_int(blob, node, "samsung,logo-on", 0);
- if (panel_info.logo_on) {
- panel_info.logo_width = fdtdec_get_int(blob, node,
+ priv->logo_on = fdtdec_get_int(blob, node, "samsung,logo-on", 0);
+ if (priv->logo_on) {
+ priv->logo_width = fdtdec_get_int(blob, node,
"samsung,logo-width", 0);
- panel_info.logo_height = fdtdec_get_int(blob, node,
+ priv->logo_height = fdtdec_get_int(blob, node,
"samsung,logo-height", 0);
- panel_info.logo_addr = fdtdec_get_int(blob, node,
+ priv->logo_addr = fdtdec_get_int(blob, node,
"samsung,logo-addr", 0);
}
- panel_info.rgb_mode = fdtdec_get_int(blob, node,
+ priv->rgb_mode = fdtdec_get_int(blob, node,
"samsung,rgb-mode", 0);
- panel_info.pclk_name = fdtdec_get_int(blob, node,
+ priv->pclk_name = fdtdec_get_int(blob, node,
"samsung,pclk-name", 0);
- panel_info.sclk_div = fdtdec_get_int(blob, node,
+ priv->sclk_div = fdtdec_get_int(blob, node,
"samsung,sclk-div", 0);
- panel_info.dual_lcd_enabled = fdtdec_get_int(blob, node,
+ priv->dual_lcd_enabled = fdtdec_get_int(blob, node,
"samsung,dual-lcd-enabled", 0);
return 0;
}
-void lcd_ctrl_init(void *lcdbase)
+static int exynos_fb_probe(struct udevice *dev)
{
+ struct video_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct exynos_fb_priv *priv = dev_get_priv(dev);
+ struct udevice *panel, *bridge;
+ struct udevice *dp;
+ int ret;
+
+ debug("%s: start\n", __func__);
set_system_display_ctrl();
set_lcd_clk();
#ifdef CONFIG_EXYNOS_MIPI_DSIM
exynos_init_dsim_platform_data(&panel_info);
#endif
- exynos_lcd_misc_init(&panel_info);
+ exynos_fimd_lcd_init(dev);
- exynos_lcd_init(&panel_info, (ulong)lcdbase);
-}
+ ret = uclass_first_device(UCLASS_PANEL, &panel);
+ if (ret) {
+ printf("LCD panel failed to probe\n");
+ return ret;
+ }
+ if (!panel) {
+ printf("LCD panel not found\n");
+ return -ENODEV;
+ }
-void lcd_enable(void)
-{
- if (panel_info.logo_on) {
- memset((void *)gd->fb_base, 0,
- panel_info.vl_width * panel_info.vl_height *
- (NBITS(panel_info.vl_bpix) >> 3));
+ ret = uclass_first_device(UCLASS_DISPLAY, &dp);
+ if (ret) {
+ debug("%s: Display device error %d\n", __func__, ret);
+ return ret;
+ }
+ if (!dev) {
+ debug("%s: Display device missing\n", __func__);
+ return -ENODEV;
+ }
+ ret = display_enable(dp, 18, NULL);
+ if (ret) {
+ debug("%s: Display enable error %d\n", __func__, ret);
+ return ret;
}
- lcd_panel_on(&panel_info);
+ /* backlight / pwm */
+ ret = panel_enable_backlight(panel);
+ if (ret) {
+ debug("%s: backlight error: %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &bridge);
+ if (!ret)
+ ret = video_bridge_set_backlight(bridge, 80);
+ if (ret) {
+ debug("%s: No video bridge, or no backlight on bridge\n",
+ __func__);
+ exynos_pinmux_config(PERIPH_ID_PWM0, 0);
+ }
+
+ uc_priv->xsize = priv->vl_col;
+ uc_priv->ysize = priv->vl_row;
+ uc_priv->bpix = priv->vl_bpix;
+
+ /* Enable flushing after LCD writes if requested */
+ video_set_flush_dcache(dev, true);
+
+ return 0;
}
-/* dummy function */
-void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
+static int exynos_fb_bind(struct udevice *dev)
{
- return;
+ struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
+
+ /* This is the maximum panel size we expect to see */
+ plat->size = 1920 * 1080 * 2;
+
+ return 0;
}
+
+static const struct video_ops exynos_fb_ops = {
+};
+
+static const struct udevice_id exynos_fb_ids[] = {
+ { .compatible = "samsung,exynos-fimd" },
+ { }
+};
+
+U_BOOT_DRIVER(exynos_fb) = {
+ .name = "exynos_fb",
+ .id = UCLASS_VIDEO,
+ .of_match = exynos_fb_ids,
+ .ops = &exynos_fb_ops,
+ .bind = exynos_fb_bind,
+ .probe = exynos_fb_probe,
+ .ofdata_to_platdata = exynos_fb_ofdata_to_platdata,
+ .priv_auto_alloc_size = sizeof(struct exynos_fb_priv),
+};
diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c
index c73f242..f57cd71 100644
--- a/drivers/video/simple_panel.c
+++ b/drivers/video/simple_panel.c
@@ -86,6 +86,8 @@ static const struct panel_ops simple_panel_ops = {
static const struct udevice_id simple_panel_ids[] = {
{ .compatible = "simple-panel" },
{ .compatible = "auo,b133xtn01" },
+ { .compatible = "auo,b116xw03" },
+ { .compatible = "auo,b133htn01" },
{ }
};
diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h
index 8b61a52..3d81f94 100644
--- a/include/configs/exynos5-dt-common.h
+++ b/include/configs/exynos5-dt-common.h
@@ -13,8 +13,8 @@
#undef EXYNOS_DEVICE_SETTINGS
#define EXYNOS_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
- "stdout=serial,lcd\0" \
- "stderr=serial,lcd\0"
+ "stdout=serial,vidconsole\0" \
+ "stderr=serial,vidconsole\0"
#define CONFIG_EXYNOS5_DT
@@ -32,6 +32,7 @@
#define CONFIG_EXYNOS_FB
#define CONFIG_EXYNOS_DP
#define LCD_BPP LCD_COLOR16
+#define CONFIG_SYS_WHITE_ON_BLACK
#endif
/* Enable keyboard */
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 25/25] exynos: video: Drop old unused code
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
` (23 preceding siblings ...)
2016-01-15 0:00 ` [U-Boot] [PATCH 24/25] exynos: video: Convert several boards to driver model for video Simon Glass
@ 2016-01-15 0:00 ` Simon Glass
24 siblings, 0 replies; 27+ messages in thread
From: Simon Glass @ 2016-01-15 0:00 UTC (permalink / raw)
To: u-boot
Now that we are using driver model, we can drop the weak functions and LCD
init in the board file.
Signed-off-by: Simon Glass <sjg@chromium.org>
---
board/samsung/common/exynos5-dt.c | 153 --------------------------------------
drivers/video/exynos/exynos_fb.c | 33 --------
drivers/video/exynos/exynos_fb.h | 41 ----------
3 files changed, 227 deletions(-)
delete mode 100644 drivers/video/exynos/exynos_fb.h
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
index 0dcea71..2e3b16d 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -147,159 +147,6 @@ int board_get_revision(void)
return 0;
}
-#ifdef CONFIG_LCD
-
-static int board_dp_bridge_init(struct udevice *dev)
-{
- const int max_tries = 10;
- int num_tries;
- int ret;
-
- debug("%s\n", __func__);
- ret = video_bridge_attach(dev);
- if (ret) {
- debug("video bridge init failed: %d\n", ret);
- return ret;
- }
-
- /*
- * We need to wait for 90ms after bringing up the bridge since there
- * is a phantom "high" on the HPD chip during its bootup. The phantom
- * high comes within 7ms of de-asserting PD and persists for at least
- * 15ms. The real high comes roughly 50ms after PD is de-asserted. The
- * phantom high makes it hard for us to know when the NXP chip is up.
- */
- mdelay(90);
-
- for (num_tries = 0; num_tries < max_tries; num_tries++) {
- /* Check HPD. If it's high, or we don't have it, all is well */
- ret = video_bridge_check_attached(dev);
- if (!ret || ret == -ENOENT)
- return 0;
-
- debug("%s: eDP bridge failed to come up; try %d of %d\n",
- __func__, num_tries, max_tries);
- }
-
- /* Immediately go into bridge reset if the hp line is not high */
- return -EIO;
-}
-
-static int board_dp_bridge_setup(const void *blob)
-{
- const int max_tries = 2;
- int num_tries;
- struct udevice *dev;
- int ret;
-
- /* Configure I2C registers for Parade bridge */
- ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev);
- if (ret) {
- debug("video bridge init failed: %d\n", ret);
- return ret;
- }
-
- if (strncmp(dev->driver->name, "parade", 6)) {
- /* Mux HPHPD to the special hotplug detect mode */
- exynos_pinmux_config(PERIPH_ID_DPHPD, 0);
- }
-
- for (num_tries = 0; num_tries < max_tries; num_tries++) {
- ret = board_dp_bridge_init(dev);
- if (!ret)
- return 0;
- if (num_tries == max_tries - 1)
- break;
-
- /*
- * If we're here, the bridge chip failed to initialise.
- * Power down the bridge in an attempt to reset.
- */
- video_bridge_set_active(dev, false);
-
- /*
- * Arbitrarily wait 300ms here with DP_N low. Don't know for
- * sure how long we should wait, but we're being paranoid.
- */
- mdelay(300);
- }
-
- return ret;
-}
-
-void exynos_cfg_lcd_gpio(void)
-{
- /* For Backlight */
- gpio_request(EXYNOS5_GPIO_B20, "lcd_backlight");
- gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_OUTPUT);
- gpio_set_value(EXYNOS5_GPIO_B20, 1);
-}
-
-static int board_dp_set_backlight(int percent)
-{
- struct udevice *dev;
- int ret;
-
- ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, &dev);
- if (!ret)
- ret = video_bridge_set_backlight(dev, percent);
-
- return ret;
-}
-
-void exynos_backlight_on(unsigned int on)
-{
- struct udevice *dev;
- int ret;
-
- debug("%s(%u)\n", __func__, on);
- if (!on)
- return;
-
- ret = regulator_get_by_platname("vcd_led", &dev);
- if (!ret)
- ret = regulator_set_enable(dev, true);
- if (ret)
- debug("Failed to enable backlight: ret=%d\n", ret);
-
- /* T5 in the LCD timing spec (defined as > 10ms) */
- mdelay(10);
-
- /* board_dp_backlight_pwm */
- gpio_direction_output(EXYNOS5_GPIO_B20, 1);
-
- /* T6 in the LCD timing spec (defined as > 10ms) */
- mdelay(10);
-
- /* try to set the backlight in the bridge registers */
- ret = board_dp_set_backlight(80);
-
- /* if we have no bridge or it does not support backlight, use a GPIO */
- if (ret == -ENODEV || ret == -ENOSYS) {
- gpio_request(EXYNOS5_GPIO_X30, "board_dp_backlight_en");
- gpio_direction_output(EXYNOS5_GPIO_X30, 1);
- }
-}
-
-void exynos_lcd_power_on(void)
-{
- struct udevice *dev;
- int ret;
-
- debug("%s\n", __func__);
- ret = regulator_get_by_platname("lcd_vdd", &dev);
- if (!ret)
- ret = regulator_set_enable(dev, true);
- if (ret)
- debug("Failed to enable LCD panel: ret=%d\n", ret);
-
- ret = board_dp_bridge_setup(gd->fdt_blob);
- if (ret && ret != -ENODEV)
- printf("LCD bridge failed to enable: %d\n", ret);
-}
-
-#endif
-
#ifdef CONFIG_USB_DWC3
static struct dwc3_device dwc3_device_data = {
.maximum_speed = USB_SPEED_SUPER,
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index c8fef63..97228cd 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -479,39 +479,6 @@ unsigned long exynos_fimd_calc_fbsize(struct exynos_fb_priv *priv)
return priv->vl_col * priv->vl_row * (VNBITS(priv->vl_bpix) / 8);
}
-__weak void exynos_cfg_lcd_gpio(void)
-{
-}
-
-__weak void exynos_backlight_on(unsigned int onoff)
-{
-}
-
-__weak void exynos_reset_lcd(void)
-{
-}
-
-__weak void exynos_lcd_power_on(void)
-{
-}
-
-__weak void exynos_cfg_ldo(void)
-{
-}
-
-__weak void exynos_enable_ldo(unsigned int onoff)
-{
-}
-
-__weak void exynos_backlight_reset(void)
-{
-}
-
-__weak int exynos_lcd_misc_init(struct vidinfo *vid)
-{
- return 0;
-}
-
int exynos_fb_ofdata_to_platdata(struct udevice *dev)
{
struct exynos_fb_priv *priv = dev_get_priv(dev);
diff --git a/drivers/video/exynos/exynos_fb.h b/drivers/video/exynos/exynos_fb.h
deleted file mode 100644
index f59cce0..0000000
--- a/drivers/video/exynos/exynos_fb.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2012 Samsung Electronics
- *
- * Author: InKi Dae <inki.dae@samsung.com>
- * Author: Donghwa Lee <dh09.lee@samsung.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _EXYNOS_FB_H_
-#define _EXYNOS_FB_H_
-
-#include <asm/arch/fb.h>
-
-#define MAX_CLOCK (86 * 1000000)
-
-enum exynos_cpu_auto_cmd_rate {
- DISABLE_AUTO_FRM,
- PER_TWO_FRM,
- PER_FOUR_FRM,
- PER_SIX_FRM,
- PER_EIGHT_FRM,
- PER_TEN_FRM,
- PER_TWELVE_FRM,
- PER_FOURTEEN_FRM,
- PER_SIXTEEN_FRM,
- PER_EIGHTEEN_FRM,
- PER_TWENTY_FRM,
- PER_TWENTY_TWO_FRM,
- PER_TWENTY_FOUR_FRM,
- PER_TWENTY_SIX_FRM,
- PER_TWENTY_EIGHT_FRM,
- PER_THIRTY_FRM,
-};
-
-void exynos_fimd_lcd_init_mem(unsigned long screen_base, unsigned long fb_size,
- unsigned long palette_size);
-void exynos_fimd_lcd_init(struct vidinfo *vid, ulong lcd_base_address);
-unsigned long exynos_fimd_calc_fbsize(struct vidinfo *pvid);
-
-#endif
--
2.6.0.rc2.230.g3dd15c0
^ permalink raw reply related [flat|nested] 27+ messages in thread
* [U-Boot] [PATCH 19/25] exynos: Allow PWM0 pinmux to be set up
2016-01-15 0:00 ` [U-Boot] [PATCH 19/25] exynos: Allow PWM0 pinmux to be set up Simon Glass
@ 2016-01-15 9:31 ` Minkyu Kang
0 siblings, 0 replies; 27+ messages in thread
From: Minkyu Kang @ 2016-01-15 9:31 UTC (permalink / raw)
To: u-boot
On 15/01/16 09:00, Simon Glass wrote:
> This is commonly used for LCD backlight control. Add pinmux support for it
> on exynos5250 and 5420.
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
>
> arch/arm/mach-exynos/pinmux.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c
> index 12eb79c..fec2df9 100644
> --- a/arch/arm/mach-exynos/pinmux.c
> +++ b/arch/arm/mach-exynos/pinmux.c
> @@ -506,6 +506,9 @@ static int exynos5_pinmux_config(int peripheral, int flags)
> */
> gpio_set_pull(EXYNOS5_GPIO_X07, S5P_GPIO_PULL_NONE);
> break;
> + case PERIPH_ID_PWM0:
> + gpio_cfg_pin(EXYNOS5_GPIO_B20, S5P_GPIO_FUNC(2));
> + break;
> default:
> debug("%s: invalid peripheral %d", __func__, peripheral);
> return -1;
> @@ -548,6 +551,9 @@ static int exynos5420_pinmux_config(int peripheral, int flags)
> case PERIPH_ID_I2C10:
> exynos5420_i2c_config(peripheral);
> break;
> + case PERIPH_ID_PWM0:
> + gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(2));
> + break;
> default:
> debug("%s: invalid peripheral %d", __func__, peripheral);
> return -1;
>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Thanks,
Minkyu Kang.
^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2016-01-15 9:31 UTC | newest]
Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-01-14 23:59 [U-Boot] [PATCH 00/25] exynos: video: Convert exynos LCD driver to use driver model Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 01/25] exynos: video: Move driver files into their own directory Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 02/25] exynos: video: Drop dead code Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 03/25] exynos: video: Remove use of vidinfo_t typedef Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 04/25] exynos: video: Drop the static lcd_base_addr variable Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 05/25] exynos: video: Drop static variables in exynos_fimd.c Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 06/25] exynos: video: Drop static variables in exynos_fb.c Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 07/25] exynos: video: Drop static variables in exynos_dp_lowlevel.c Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 08/25] exynos: video: Move dsim_config_dt into a function Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 09/25] exynos: video: Move struct exynos_platform_mipi_dsim into vidinfo Simon Glass
2016-01-14 23:59 ` [U-Boot] [PATCH 10/25] exynos: video: Move mipi_lcd_device_dt into a function Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 11/25] exynos: video: Combine LCD driver into one file Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 12/25] exynos: pwm: Add a driver for the exynos5 PWM Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 13/25] video: Add an enum for active low/high Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 14/25] exynos: dts: Add pwm device tree node Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 15/25] exynos: Allow tizen to be built without an LCD Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 16/25] exynos: Allow CONFIG_MISC_COMMON to be build " Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 17/25] exynos: Disable LCD display for boards we can't convert Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 18/25] dts: Add clock and regulator binding files for max77802 Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 19/25] exynos: Allow PWM0 pinmux to be set up Simon Glass
2016-01-15 9:31 ` Minkyu Kang
2016-01-15 0:00 ` [U-Boot] [PATCH 20/25] exynos: Simplify calling of exynos_dp_phy_ctrl() Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 21/25] exynos: dts: Add display-related device tree fragments Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 22/25] exynos: video: Rename edp_device_info to exynos_dp_priv Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 23/25] exynos: video: Rename variables for driver model Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 24/25] exynos: video: Convert several boards to driver model for video Simon Glass
2016-01-15 0:00 ` [U-Boot] [PATCH 25/25] exynos: video: Drop old unused code Simon Glass
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