* [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement
@ 2016-01-26 14:01 Ye Li
2016-01-26 14:01 ` [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation Ye Li
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Ye Li @ 2016-01-26 14:01 UTC (permalink / raw)
To: u-boot
Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always
enter the -EINVAL return.
Signed-off-by: Ye Li <ye.li@nxp.com>
---
arch/arm/cpu/armv7/mx6/clock.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 27a3f2f..007204d 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr)
u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask;
if (is_cpu_type(MXC_CPU_MX6SX)) {
- if ((base_addr == LCDIF1_BASE_ADDR) ||
- (base_addr == LCDIF2_BASE_ADDR)) {
+ if ((base_addr != LCDIF1_BASE_ADDR) &&
+ (base_addr != LCDIF2_BASE_ADDR)) {
puts("Wrong LCD interface!\n");
return -EINVAL;
}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation
2016-01-26 14:01 [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement Ye Li
@ 2016-01-26 14:01 ` Ye Li
2016-01-26 14:12 ` Stefano Babic
2016-02-02 20:26 ` Stefano Babic
2016-01-26 14:11 ` [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement Stefano Babic
2016-02-02 20:25 ` Stefano Babic
2 siblings, 2 replies; 6+ messages in thread
From: Ye Li @ 2016-01-26 14:01 UTC (permalink / raw)
To: u-boot
The checking with max frequency supported is not correct, because the temp
is calculated by max pre and post dividers. We can decrease any divider to
meet the max frequency limitation. Actually, the calculation below the codes
is doing this way to find best pre and post dividers.
Signed-off-by: Ye Li <ye.li@nxp.com>
---
arch/arm/cpu/armv7/mx6/clock.c | 4 ----
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 007204d..88380a6 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -638,10 +638,6 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
}
temp = freq * max_pred * max_postd;
- if (temp > max) {
- puts("Please decrease freq, too large!\n");
- return;
- }
if (temp < min) {
/*
* Register: PLL_VIDEO
--
1.7.4.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement
2016-01-26 14:01 [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement Ye Li
2016-01-26 14:01 ` [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation Ye Li
@ 2016-01-26 14:11 ` Stefano Babic
2016-02-02 20:25 ` Stefano Babic
2 siblings, 0 replies; 6+ messages in thread
From: Stefano Babic @ 2016-01-26 14:11 UTC (permalink / raw)
To: u-boot
On 26/01/2016 15:01, Ye Li wrote:
> Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always
> enter the -EINVAL return.
>
> Signed-off-by: Ye Li <ye.li@nxp.com>
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 27a3f2f..007204d 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr)
> u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask;
>
> if (is_cpu_type(MXC_CPU_MX6SX)) {
> - if ((base_addr == LCDIF1_BASE_ADDR) ||
> - (base_addr == LCDIF2_BASE_ADDR)) {
> + if ((base_addr != LCDIF1_BASE_ADDR) &&
> + (base_addr != LCDIF2_BASE_ADDR)) {
> puts("Wrong LCD interface!\n");
> return -EINVAL;
> }
>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation
2016-01-26 14:01 ` [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation Ye Li
@ 2016-01-26 14:12 ` Stefano Babic
2016-02-02 20:26 ` Stefano Babic
1 sibling, 0 replies; 6+ messages in thread
From: Stefano Babic @ 2016-01-26 14:12 UTC (permalink / raw)
To: u-boot
On 26/01/2016 15:01, Ye Li wrote:
> The checking with max frequency supported is not correct, because the temp
> is calculated by max pre and post dividers. We can decrease any divider to
> meet the max frequency limitation. Actually, the calculation below the codes
> is doing this way to find best pre and post dividers.
>
> Signed-off-by: Ye Li <ye.li@nxp.com>
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 4 ----
> 1 files changed, 0 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 007204d..88380a6 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -638,10 +638,6 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
> }
>
> temp = freq * max_pred * max_postd;
> - if (temp > max) {
> - puts("Please decrease freq, too large!\n");
> - return;
> - }
> if (temp < min) {
> /*
> * Register: PLL_VIDEO
>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement
2016-01-26 14:01 [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement Ye Li
2016-01-26 14:01 ` [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation Ye Li
2016-01-26 14:11 ` [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement Stefano Babic
@ 2016-02-02 20:25 ` Stefano Babic
2 siblings, 0 replies; 6+ messages in thread
From: Stefano Babic @ 2016-02-02 20:25 UTC (permalink / raw)
To: u-boot
On 26/01/2016 15:01, Ye Li wrote:
> Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always
> enter the -EINVAL return.
>
> Signed-off-by: Ye Li <ye.li@nxp.com>
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 27a3f2f..007204d 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -742,8 +742,8 @@ int enable_lcdif_clock(u32 base_addr)
> u32 lcdif_clk_sel_mask, lcdif_ccgr3_mask;
>
> if (is_cpu_type(MXC_CPU_MX6SX)) {
> - if ((base_addr == LCDIF1_BASE_ADDR) ||
> - (base_addr == LCDIF2_BASE_ADDR)) {
> + if ((base_addr != LCDIF1_BASE_ADDR) &&
> + (base_addr != LCDIF2_BASE_ADDR)) {
> puts("Wrong LCD interface!\n");
> return -EINVAL;
> }
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation
2016-01-26 14:01 ` [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation Ye Li
2016-01-26 14:12 ` Stefano Babic
@ 2016-02-02 20:26 ` Stefano Babic
1 sibling, 0 replies; 6+ messages in thread
From: Stefano Babic @ 2016-02-02 20:26 UTC (permalink / raw)
To: u-boot
On 26/01/2016 15:01, Ye Li wrote:
> The checking with max frequency supported is not correct, because the temp
> is calculated by max pre and post dividers. We can decrease any divider to
> meet the max frequency limitation. Actually, the calculation below the codes
> is doing this way to find best pre and post dividers.
>
> Signed-off-by: Ye Li <ye.li@nxp.com>
> ---
> arch/arm/cpu/armv7/mx6/clock.c | 4 ----
> 1 files changed, 0 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
> index 007204d..88380a6 100644
> --- a/arch/arm/cpu/armv7/mx6/clock.c
> +++ b/arch/arm/cpu/armv7/mx6/clock.c
> @@ -638,10 +638,6 @@ void mxs_set_lcdclk(u32 base_addr, u32 freq)
> }
>
> temp = freq * max_pred * max_postd;
> - if (temp > max) {
> - puts("Please decrease freq, too large!\n");
> - return;
> - }
> if (temp < min) {
> /*
> * Register: PLL_VIDEO
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-02-02 20:26 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-01-26 14:01 [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement Ye Li
2016-01-26 14:01 ` [U-Boot] [PATCH 2/2] imx: mx6ul/sx: Fix issue in LCDIF clock dividers calculation Ye Li
2016-01-26 14:12 ` Stefano Babic
2016-02-02 20:26 ` Stefano Babic
2016-01-26 14:11 ` [U-Boot] [PATCH 1/2] imx: mx6sx: Fix issue in LCDIF clock enablement Stefano Babic
2016-02-02 20:25 ` Stefano Babic
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