* [U-Boot] [PATCH v2] arm: use common instructions applicable to armv7m & other arm archs
@ 2016-02-04 20:41 Vikas Manocha
2016-02-05 5:38 ` Heiko Schocher
0 siblings, 1 reply; 3+ messages in thread
From: Vikas Manocha @ 2016-02-04 20:41 UTC (permalink / raw)
To: u-boot
This patch cleans the code by using instructions allowed for armv7m as well as
other Arm archs.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
Changes in v2: reword message commit. Removed info regarding BIC
instruction on SP, was creating confusion.
arch/arm/lib/crt0.S | 25 +++++++------------------
1 file changed, 7 insertions(+), 18 deletions(-)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 2f4c14e..3731d0c 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -71,18 +71,12 @@ ENTRY(_main)
*/
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
- ldr sp, =(CONFIG_SPL_STACK)
+ ldr r0, =(CONFIG_SPL_STACK)
#else
- ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
+ ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
#endif
-#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */
- mov r3, sp
- bic r3, r3, #7
- mov sp, r3
-#else
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-#endif
- mov r0, sp
+ bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
+ mov sp, r0
bl board_init_f_alloc_reserve
mov sp, r0
/* set up gd here, outside any C code */
@@ -100,14 +94,9 @@ ENTRY(_main)
* 'here' but relocated.
*/
- ldr sp, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
-#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */
- mov r3, sp
- bic r3, r3, #7
- mov sp, r3
-#else
- bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
-#endif
+ ldr r0, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
+ bic r0, r0, #7
+ mov sp, r0 /* 8-byte alignment for ABI compliance */
ldr r9, [r9, #GD_BD] /* r9 = gd->bd */
sub r9, r9, #GD_SIZE /* new GD is below bd */
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v2] arm: use common instructions applicable to armv7m & other arm archs
2016-02-04 20:41 [U-Boot] [PATCH v2] arm: use common instructions applicable to armv7m & other arm archs Vikas Manocha
@ 2016-02-05 5:38 ` Heiko Schocher
2016-02-05 18:29 ` Vikas MANOCHA
0 siblings, 1 reply; 3+ messages in thread
From: Heiko Schocher @ 2016-02-05 5:38 UTC (permalink / raw)
To: u-boot
Hello Vikas,
Am 04.02.2016 um 21:41 schrieb Vikas Manocha:
> This patch cleans the code by using instructions allowed for armv7m as well as
> other Arm archs.
>
> Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> Changes in v2: reword message commit. Removed info regarding BIC
> instruction on SP, was creating confusion.
>
> arch/arm/lib/crt0.S | 25 +++++++------------------
> 1 file changed, 7 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
> index 2f4c14e..3731d0c 100644
> --- a/arch/arm/lib/crt0.S
> +++ b/arch/arm/lib/crt0.S
> @@ -71,18 +71,12 @@ ENTRY(_main)
> */
>
> #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
> - ldr sp, =(CONFIG_SPL_STACK)
> + ldr r0, =(CONFIG_SPL_STACK)
> #else
> - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
> + ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
> #endif
> -#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */
> - mov r3, sp
> - bic r3, r3, #7
> - mov sp, r3
> -#else
> - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
> -#endif
> - mov r0, sp
> + bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
> + mov sp, r0
> bl board_init_f_alloc_reserve
> mov sp, r0
> /* set up gd here, outside any C code */
> @@ -100,14 +94,9 @@ ENTRY(_main)
> * 'here' but relocated.
> */
>
> - ldr sp, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
> -#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC destination */
> - mov r3, sp
> - bic r3, r3, #7
> - mov sp, r3
> -#else
> - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
> -#endif
> + ldr r0, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
> + bic r0, r0, #7
> + mov sp, r0 /* 8-byte alignment for ABI compliance */
Why do you move this comment to the mov instruction? the "bic r0, r0, #7"
does the 8-byte alignment ... please add this comment to this line,
thanks!
> ldr r9, [r9, #GD_BD] /* r9 = gd->bd */
> sub r9, r9, #GD_SIZE /* new GD is below bd */
Beside of this nitpick:
Reviewed-by: Heiko Schocher <hs@denx.de>
bye,
Heiko
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 3+ messages in thread
* [U-Boot] [PATCH v2] arm: use common instructions applicable to armv7m & other arm archs
2016-02-05 5:38 ` Heiko Schocher
@ 2016-02-05 18:29 ` Vikas MANOCHA
0 siblings, 0 replies; 3+ messages in thread
From: Vikas MANOCHA @ 2016-02-05 18:29 UTC (permalink / raw)
To: u-boot
Thanks Heiko,
> -----Original Message-----
> From: Heiko Schocher [mailto:hs at denx.de]
> Sent: Thursday, February 04, 2016 9:39 PM
> To: Vikas MANOCHA
> Cc: albert.u.boot at aribaud.net; Simon Glass; Przemyslaw Marczak; Heiko
> Schocher; rev13 at wp.pl; open list
> Subject: Re: [PATCH v2] arm: use common instructions applicable to armv7m
> & other arm archs
>
> Hello Vikas,
>
> Am 04.02.2016 um 21:41 schrieb Vikas Manocha:
> > This patch cleans the code by using instructions allowed for armv7m as
> > well as other Arm archs.
> >
> > Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
> > Reviewed-by: Simon Glass <sjg@chromium.org>
> > ---
> > Changes in v2: reword message commit. Removed info regarding BIC
> > instruction on SP, was creating confusion.
> >
> > arch/arm/lib/crt0.S | 25 +++++++------------------
> > 1 file changed, 7 insertions(+), 18 deletions(-)
> >
> > diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index
> > 2f4c14e..3731d0c 100644
> > --- a/arch/arm/lib/crt0.S
> > +++ b/arch/arm/lib/crt0.S
> > @@ -71,18 +71,12 @@ ENTRY(_main)
> > */
> >
> > #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
> > - ldr sp, =(CONFIG_SPL_STACK)
> > + ldr r0, =(CONFIG_SPL_STACK)
> > #else
> > - ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
> > + ldr r0, =(CONFIG_SYS_INIT_SP_ADDR)
> > #endif
> > -#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC
> destination */
> > - mov r3, sp
> > - bic r3, r3, #7
> > - mov sp, r3
> > -#else
> > - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
> > -#endif
> > - mov r0, sp
> > + bic r0, r0, #7 /* 8-byte alignment for ABI compliance */
> > + mov sp, r0
> > bl board_init_f_alloc_reserve
> > mov sp, r0
> > /* set up gd here, outside any C code */ @@ -100,14 +94,9 @@
> > ENTRY(_main)
> > * 'here' but relocated.
> > */
> >
> > - ldr sp, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
> > -#if defined(CONFIG_CPU_V7M) /* v7M forbids using SP as BIC
> destination */
> > - mov r3, sp
> > - bic r3, r3, #7
> > - mov sp, r3
> > -#else
> > - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
> > -#endif
> > + ldr r0, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */
> > + bic r0, r0, #7
> > + mov sp, r0 /* 8-byte alignment for ABI compliance */
>
> Why do you move this comment to the mov instruction? the "bic r0, r0, #7"
> does the 8-byte alignment ... please add this comment to this line, thanks!
Ok, I will send v3 with this correction.
Cheers,
Vikas
>
> > ldr r9, [r9, #GD_BD] /* r9 = gd->bd */
> > sub r9, r9, #GD_SIZE /* new GD is below bd */
>
> Beside of this nitpick:
> Reviewed-by: Heiko Schocher <hs@denx.de>
>
> bye,
> Heiko
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-02-04 20:41 [U-Boot] [PATCH v2] arm: use common instructions applicable to armv7m & other arm archs Vikas Manocha
2016-02-05 5:38 ` Heiko Schocher
2016-02-05 18:29 ` Vikas MANOCHA
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