[PATCH 0/9] ARC clockevent/clocksource modernization

[PATCH 0/9] ARC clockevent/clocksource modernization

[Vineet Gupta]

Hi,

This mini-series came out as a result of discussions during EZChip platform
code review.

This switches ARC timers to DT based probe and removes the homebrew clk API
we had before.

@Rob could you please take a look at the DT bindings.
@Daniel any comments would be appreciated !

Thx,
-Vineet

Alexey Brodkin (3):
  ARC: use fixed frequencies in arc_set_early_base_baud()
  ARC: [plat-axs] Don't use arc_{get|set}_core_freq() for manipulating
    core clk
  ARC: RIP arc_{get|set}_core_freq() clk API

Noam Camus (2):
  ARC: clockevent: switch to cpu notifier for clockevent setup
  ARC: clockevent: Prepare for DT based probe

Vineet Gupta (4):
  ARC: [dts] Add clk feeding into timers to DTs
  ARC: [dts] Introduce Timer bindings
  ARC: clockevent: DT based probe
  ARC: clocksource: DT based probe

 .../devicetree/bindings/timer/snps,arc-timer0.txt  |  23 +++
 .../devicetree/bindings/timer/snps,arc-timer1.txt  |  17 ++
 .../devicetree/bindings/timer/snps,archs-gfrc.txt  |  14 ++
 .../devicetree/bindings/timer/snps,archs-rtc.txt   |  14 ++
 arch/arc/Kconfig                                   |   3 +-
 arch/arc/boot/dts/abilis_tb10x.dtsi                |  12 ++
 arch/arc/boot/dts/axc001.dtsi                      |   6 +
 arch/arc/boot/dts/axc003.dtsi                      |   6 +
 arch/arc/boot/dts/axc003_idu.dtsi                  |   6 +
 arch/arc/boot/dts/nsim_700.dts                     |   6 +
 arch/arc/boot/dts/nsim_hs.dts                      |   6 +
 arch/arc/boot/dts/nsim_hs_idu.dts                  |   6 +
 arch/arc/boot/dts/nsimosci.dts                     |   6 +
 arch/arc/boot/dts/nsimosci_hs.dts                  |   6 +
 arch/arc/boot/dts/nsimosci_hs_idu.dts              |   6 +
 arch/arc/boot/dts/skeleton.dtsi                    |  12 ++
 arch/arc/boot/dts/skeleton_hs.dtsi                 |  12 ++
 arch/arc/boot/dts/skeleton_hs_idu.dtsi             |  12 ++
 arch/arc/boot/dts/vdk_axc003.dtsi                  |   6 +
 arch/arc/boot/dts/vdk_axc003_idu.dtsi              |   6 +
 arch/arc/include/asm/clk.h                         |  22 ---
 arch/arc/include/asm/irq.h                         |   5 -
 arch/arc/kernel/Makefile                           |   2 +-
 arch/arc/kernel/clk.c                              |  21 ---
 arch/arc/kernel/devtree.c                          |  13 +-
 arch/arc/kernel/intc-compact.c                     |   2 +
 arch/arc/kernel/mcip.c                             |   4 +-
 arch/arc/kernel/setup.c                            |  16 +-
 arch/arc/kernel/smp.c                              |   2 -
 arch/arc/kernel/time.c                             | 208 +++++++++++++--------
 arch/arc/plat-axs10x/axs10x.c                      |  27 ++-
 31 files changed, 352 insertions(+), 155 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
 delete mode 100644 arch/arc/include/asm/clk.h
 delete mode 100644 arch/arc/kernel/clk.c

-- 
2.5.0

[PATCH 0/9] ARC clockevent/clocksource modernization

[Vineet Gupta]

Hi,

This mini-series came out as a result of discussions during EZChip platform
code review.

This switches ARC timers to DT based probe and removes the homebrew clk API
we had before.

@Rob could you please take a look at the DT bindings.
@Daniel any comments would be appreciated !

Thx,
-Vineet

Alexey Brodkin (3):
  ARC: use fixed frequencies in arc_set_early_base_baud()
  ARC: [plat-axs] Don't use arc_{get|set}_core_freq() for manipulating
    core clk
  ARC: RIP arc_{get|set}_core_freq() clk API

Noam Camus (2):
  ARC: clockevent: switch to cpu notifier for clockevent setup
  ARC: clockevent: Prepare for DT based probe

Vineet Gupta (4):
  ARC: [dts] Add clk feeding into timers to DTs
  ARC: [dts] Introduce Timer bindings
  ARC: clockevent: DT based probe
  ARC: clocksource: DT based probe

 .../devicetree/bindings/timer/snps,arc-timer0.txt  |  23 +++
 .../devicetree/bindings/timer/snps,arc-timer1.txt  |  17 ++
 .../devicetree/bindings/timer/snps,archs-gfrc.txt  |  14 ++
 .../devicetree/bindings/timer/snps,archs-rtc.txt   |  14 ++
 arch/arc/Kconfig                                   |   3 +-
 arch/arc/boot/dts/abilis_tb10x.dtsi                |  12 ++
 arch/arc/boot/dts/axc001.dtsi                      |   6 +
 arch/arc/boot/dts/axc003.dtsi                      |   6 +
 arch/arc/boot/dts/axc003_idu.dtsi                  |   6 +
 arch/arc/boot/dts/nsim_700.dts                     |   6 +
 arch/arc/boot/dts/nsim_hs.dts                      |   6 +
 arch/arc/boot/dts/nsim_hs_idu.dts                  |   6 +
 arch/arc/boot/dts/nsimosci.dts                     |   6 +
 arch/arc/boot/dts/nsimosci_hs.dts                  |   6 +
 arch/arc/boot/dts/nsimosci_hs_idu.dts              |   6 +
 arch/arc/boot/dts/skeleton.dtsi                    |  12 ++
 arch/arc/boot/dts/skeleton_hs.dtsi                 |  12 ++
 arch/arc/boot/dts/skeleton_hs_idu.dtsi             |  12 ++
 arch/arc/boot/dts/vdk_axc003.dtsi                  |   6 +
 arch/arc/boot/dts/vdk_axc003_idu.dtsi              |   6 +
 arch/arc/include/asm/clk.h                         |  22 ---
 arch/arc/include/asm/irq.h                         |   5 -
 arch/arc/kernel/Makefile                           |   2 +-
 arch/arc/kernel/clk.c                              |  21 ---
 arch/arc/kernel/devtree.c                          |  13 +-
 arch/arc/kernel/intc-compact.c                     |   2 +
 arch/arc/kernel/mcip.c                             |   4 +-
 arch/arc/kernel/setup.c                            |  16 +-
 arch/arc/kernel/smp.c                              |   2 -
 arch/arc/kernel/time.c                             | 208 +++++++++++++--------
 arch/arc/plat-axs10x/axs10x.c                      |  27 ++-
 31 files changed, 352 insertions(+), 155 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
 delete mode 100644 arch/arc/include/asm/clk.h
 delete mode 100644 arch/arc/kernel/clk.c

-- 
2.5.0

[PATCH 1/9] ARC: [dts] Add clk feeding into timers to DTs

[Vineet Gupta]

This allows us to introduce timers in DT in next commit

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/boot/dts/axc001.dtsi         | 6 ++++++
 arch/arc/boot/dts/axc003.dtsi         | 6 ++++++
 arch/arc/boot/dts/axc003_idu.dtsi     | 6 ++++++
 arch/arc/boot/dts/nsim_700.dts        | 6 ++++++
 arch/arc/boot/dts/nsim_hs.dts         | 6 ++++++
 arch/arc/boot/dts/nsim_hs_idu.dts     | 6 ++++++
 arch/arc/boot/dts/nsimosci.dts        | 6 ++++++
 arch/arc/boot/dts/nsimosci_hs.dts     | 6 ++++++
 arch/arc/boot/dts/nsimosci_hs_idu.dts | 6 ++++++
 arch/arc/boot/dts/vdk_axc003.dtsi     | 6 ++++++
 arch/arc/boot/dts/vdk_axc003_idu.dtsi | 6 ++++++
 11 files changed, 66 insertions(+)

diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index e7a83d19c5a3..40bcecfc3687 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -26,6 +26,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <750000000>;
+		};
+
 		core_intc: arc700-intc@cpu {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index b0e3ccdf8fc7..cabe0deeb2d8 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <90000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index f87ae409c8ed..8955881db794 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <90000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 987921f711c1..5d5e373e0ebc 100644
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -32,6 +32,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: interrupt-controller {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index bd46aec88c6a..cbd08fa38339 100644
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -38,6 +38,12 @@
 		/* only perip space at end of low mem accessible */
 		ranges = <0x80000000 0x0 0x80000000 0x80000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index cc82781727a1..99eabe1a2bf6 100644
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -29,6 +29,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index 1c169dc74ad1..bc3161ab8f82 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -35,6 +35,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <20000000>;
+		};
+
 		intc: interrupt-controller {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 9444956156d9..273dcce2cc66 100644
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -35,6 +35,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <20000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index ff11388ee484..8fe60967a4c5 100644
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -33,6 +33,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <5000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi
index 035759ee62a5..ad4ee43bd2ac 100644
--- a/arch/arc/boot/dts/vdk_axc003.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
index 90e18f404889..a3cb6263c581 100644
--- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
@@ -26,6 +26,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
-- 
2.5.0

[PATCH 1/9] ARC: [dts] Add clk feeding into timers to DTs

[Vineet Gupta]

This allows us to introduce timers in DT in next commit

Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
Cc: Rob Herring <robh at kernel.org>
Cc: devicetree at vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/boot/dts/axc001.dtsi         | 6 ++++++
 arch/arc/boot/dts/axc003.dtsi         | 6 ++++++
 arch/arc/boot/dts/axc003_idu.dtsi     | 6 ++++++
 arch/arc/boot/dts/nsim_700.dts        | 6 ++++++
 arch/arc/boot/dts/nsim_hs.dts         | 6 ++++++
 arch/arc/boot/dts/nsim_hs_idu.dts     | 6 ++++++
 arch/arc/boot/dts/nsimosci.dts        | 6 ++++++
 arch/arc/boot/dts/nsimosci_hs.dts     | 6 ++++++
 arch/arc/boot/dts/nsimosci_hs_idu.dts | 6 ++++++
 arch/arc/boot/dts/vdk_axc003.dtsi     | 6 ++++++
 arch/arc/boot/dts/vdk_axc003_idu.dtsi | 6 ++++++
 11 files changed, 66 insertions(+)

diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index e7a83d19c5a3..40bcecfc3687 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -26,6 +26,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <750000000>;
+		};
+
 		core_intc: arc700-intc at cpu {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index b0e3ccdf8fc7..cabe0deeb2d8 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <90000000>;
+		};
+
 		core_intc: archs-intc at cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index f87ae409c8ed..8955881db794 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <90000000>;
+		};
+
 		core_intc: archs-intc at cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 987921f711c1..5d5e373e0ebc 100644
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -32,6 +32,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: interrupt-controller {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index bd46aec88c6a..cbd08fa38339 100644
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -38,6 +38,12 @@
 		/* only perip space at end of low mem accessible */
 		ranges = <0x80000000 0x0 0x80000000 0x80000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index cc82781727a1..99eabe1a2bf6 100644
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -29,6 +29,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index 1c169dc74ad1..bc3161ab8f82 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -35,6 +35,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <20000000>;
+		};
+
 		intc: interrupt-controller {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 9444956156d9..273dcce2cc66 100644
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -35,6 +35,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <20000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index ff11388ee484..8fe60967a4c5 100644
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -33,6 +33,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <5000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi
index 035759ee62a5..ad4ee43bd2ac 100644
--- a/arch/arc/boot/dts/vdk_axc003.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+		};
+
 		core_intc: archs-intc at cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
index 90e18f404889..a3cb6263c581 100644
--- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
@@ -26,6 +26,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+		};
+
 		core_intc: archs-intc at cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
-- 
2.5.0

[PATCH 1/9] ARC: [dts] Add clk feeding into timers to DTs

[Vineet Gupta]

This allows us to introduce timers in DT in next commit

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/boot/dts/axc001.dtsi         | 6 ++++++
 arch/arc/boot/dts/axc003.dtsi         | 6 ++++++
 arch/arc/boot/dts/axc003_idu.dtsi     | 6 ++++++
 arch/arc/boot/dts/nsim_700.dts        | 6 ++++++
 arch/arc/boot/dts/nsim_hs.dts         | 6 ++++++
 arch/arc/boot/dts/nsim_hs_idu.dts     | 6 ++++++
 arch/arc/boot/dts/nsimosci.dts        | 6 ++++++
 arch/arc/boot/dts/nsimosci_hs.dts     | 6 ++++++
 arch/arc/boot/dts/nsimosci_hs_idu.dts | 6 ++++++
 arch/arc/boot/dts/vdk_axc003.dtsi     | 6 ++++++
 arch/arc/boot/dts/vdk_axc003_idu.dtsi | 6 ++++++
 11 files changed, 66 insertions(+)

diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi
index e7a83d19c5a3..40bcecfc3687 100644
--- a/arch/arc/boot/dts/axc001.dtsi
+++ b/arch/arc/boot/dts/axc001.dtsi
@@ -26,6 +26,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <750000000>;
+		};
+
 		core_intc: arc700-intc@cpu {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi
index b0e3ccdf8fc7..cabe0deeb2d8 100644
--- a/arch/arc/boot/dts/axc003.dtsi
+++ b/arch/arc/boot/dts/axc003.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <90000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi
index f87ae409c8ed..8955881db794 100644
--- a/arch/arc/boot/dts/axc003_idu.dtsi
+++ b/arch/arc/boot/dts/axc003_idu.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <90000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_700.dts b/arch/arc/boot/dts/nsim_700.dts
index 987921f711c1..5d5e373e0ebc 100644
--- a/arch/arc/boot/dts/nsim_700.dts
+++ b/arch/arc/boot/dts/nsim_700.dts
@@ -32,6 +32,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: interrupt-controller {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs.dts b/arch/arc/boot/dts/nsim_hs.dts
index bd46aec88c6a..cbd08fa38339 100644
--- a/arch/arc/boot/dts/nsim_hs.dts
+++ b/arch/arc/boot/dts/nsim_hs.dts
@@ -38,6 +38,12 @@
 		/* only perip space at end of low mem accessible */
 		ranges = <0x80000000 0x0 0x80000000 0x80000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsim_hs_idu.dts b/arch/arc/boot/dts/nsim_hs_idu.dts
index cc82781727a1..99eabe1a2bf6 100644
--- a/arch/arc/boot/dts/nsim_hs_idu.dts
+++ b/arch/arc/boot/dts/nsim_hs_idu.dts
@@ -29,6 +29,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <80000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci.dts b/arch/arc/boot/dts/nsimosci.dts
index 1c169dc74ad1..bc3161ab8f82 100644
--- a/arch/arc/boot/dts/nsimosci.dts
+++ b/arch/arc/boot/dts/nsimosci.dts
@@ -35,6 +35,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <20000000>;
+		};
+
 		intc: interrupt-controller {
 			compatible = "snps,arc700-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs.dts b/arch/arc/boot/dts/nsimosci_hs.dts
index 9444956156d9..273dcce2cc66 100644
--- a/arch/arc/boot/dts/nsimosci_hs.dts
+++ b/arch/arc/boot/dts/nsimosci_hs.dts
@@ -35,6 +35,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <20000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/nsimosci_hs_idu.dts b/arch/arc/boot/dts/nsimosci_hs_idu.dts
index ff11388ee484..8fe60967a4c5 100644
--- a/arch/arc/boot/dts/nsimosci_hs_idu.dts
+++ b/arch/arc/boot/dts/nsimosci_hs_idu.dts
@@ -33,6 +33,12 @@
 		/* child and parent address space 1:1 mapped */
 		ranges;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <5000000>;
+		};
+
 		core_intc: core-interrupt-controller {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003.dtsi b/arch/arc/boot/dts/vdk_axc003.dtsi
index 035759ee62a5..ad4ee43bd2ac 100644
--- a/arch/arc/boot/dts/vdk_axc003.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003.dtsi
@@ -25,6 +25,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
diff --git a/arch/arc/boot/dts/vdk_axc003_idu.dtsi b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
index 90e18f404889..a3cb6263c581 100644
--- a/arch/arc/boot/dts/vdk_axc003_idu.dtsi
+++ b/arch/arc/boot/dts/vdk_axc003_idu.dtsi
@@ -26,6 +26,12 @@
 
 		ranges = <0x00000000 0xf0000000 0x10000000>;
 
+		core_clk: core_clk {
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <50000000>;
+		};
+
 		core_intc: archs-intc@cpu {
 			compatible = "snps,archs-intc";
 			interrupt-controller;
-- 
2.5.0

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

ARC Timers have historically been probed directly.
As precursor to start probing Timers thru DT introduce these bindings

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 .../devicetree/bindings/timer/snps,arc-timer0.txt  | 23 ++++++++++++++++++++++
 .../devicetree/bindings/timer/snps,arc-timer1.txt  | 17 ++++++++++++++++
 .../devicetree/bindings/timer/snps,archs-gfrc.txt  | 14 +++++++++++++
 .../devicetree/bindings/timer/snps,archs-rtc.txt   | 14 +++++++++++++
 arch/arc/boot/dts/abilis_tb10x.dtsi                | 12 +++++++++++
 arch/arc/boot/dts/skeleton.dtsi                    | 12 +++++++++++
 arch/arc/boot/dts/skeleton_hs.dtsi                 | 12 +++++++++++
 arch/arc/boot/dts/skeleton_hs_idu.dtsi             | 12 +++++++++++
 8 files changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt

diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
new file mode 100644
index 000000000000..ceb80c72a90b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
@@ -0,0 +1,23 @@
+Synopsys ARC Local Timer with Interrupt Capabilities
+- Found on all ARC CPUs (ARC700/ARCHS)
+- Mandatory clockevent provider
+
+Required properties:
+
+- compatible : should be "snps,arc-timer0"
+- interrupts : single Interrupt going into parent intc
+	       (16 for ARCHS cores, 3 for ARC700 cores)
+- clocks     : phandle to the source clock
+
+Optional properties:
+
+- interrupt-parent : phandle to parent intc
+
+Example:
+
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
new file mode 100644
index 000000000000..4886192ce2f2
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
@@ -0,0 +1,17 @@
+Synopsys ARC Free Running Local 32-bit Timer
+- Found on all ARC CPUs (ARC700/ARCHS)
+- Mandatory clocksource provider on ARC700
+- Optional clocksource provider on UP ARC HS CPUs
+  (and if better timer archs-rtc not available in SoC)
+
+Required properties:
+
+- compatible : should be "snps,arc-timer1"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
new file mode 100644
index 000000000000..cce60e16aa0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
@@ -0,0 +1,14 @@
+Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
+- clocksourc provider for SMP SoC
+
+Required properties:
+
+- compatible : should be "snps,archs-gfrc"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,archs-gfrc";
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
new file mode 100644
index 000000000000..f3b49938812b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
@@ -0,0 +1,14 @@
+Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
+- clocksourc provider for UP SoC
+
+Required properties:
+
+- compatible : should be "snps,archs-rtc"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-rtc";
+		clocks = <&timer0_clk>;
+	};
diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
index cfb5052239a1..f9f138efa92c 100644
--- a/arch/arc/boot/dts/abilis_tb10x.dtsi
+++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
@@ -35,6 +35,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&intc>;
+		clocks = <&cpu_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&cpu_clk>;
+	};
+
 	soc100 {
 		#address-cells	= <1>;
 		#size-cells	= <1>;
diff --git a/arch/arc/boot/dts/skeleton.dtsi b/arch/arc/boot/dts/skeleton.dtsi
index 296d371a335c..bcb08b36210d 100644
--- a/arch/arc/boot/dts/skeleton.dtsi
+++ b/arch/arc/boot/dts/skeleton.dtsi
@@ -30,6 +30,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
diff --git a/arch/arc/boot/dts/skeleton_hs.dtsi b/arch/arc/boot/dts/skeleton_hs.dtsi
index a53876669030..46c5b05aea90 100644
--- a/arch/arc/boot/dts/skeleton_hs.dtsi
+++ b/arch/arc/boot/dts/skeleton_hs.dtsi
@@ -25,6 +25,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <16>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
diff --git a/arch/arc/boot/dts/skeleton_hs_idu.dtsi b/arch/arc/boot/dts/skeleton_hs_idu.dtsi
index 74898d017f7a..2a40bd9e2e2a 100644
--- a/arch/arc/boot/dts/skeleton_hs_idu.dtsi
+++ b/arch/arc/boot/dts/skeleton_hs_idu.dtsi
@@ -25,6 +25,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <16>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,archs-timer-gfrc";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
-- 
2.5.0

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

ARC Timers have historically been probed directly.
As precursor to start probing Timers thru DT introduce these bindings

Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
Cc: Rob Herring <robh at kernel.org>
Cc: devicetree at vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 .../devicetree/bindings/timer/snps,arc-timer0.txt  | 23 ++++++++++++++++++++++
 .../devicetree/bindings/timer/snps,arc-timer1.txt  | 17 ++++++++++++++++
 .../devicetree/bindings/timer/snps,archs-gfrc.txt  | 14 +++++++++++++
 .../devicetree/bindings/timer/snps,archs-rtc.txt   | 14 +++++++++++++
 arch/arc/boot/dts/abilis_tb10x.dtsi                | 12 +++++++++++
 arch/arc/boot/dts/skeleton.dtsi                    | 12 +++++++++++
 arch/arc/boot/dts/skeleton_hs.dtsi                 | 12 +++++++++++
 arch/arc/boot/dts/skeleton_hs_idu.dtsi             | 12 +++++++++++
 8 files changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt

diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
new file mode 100644
index 000000000000..ceb80c72a90b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
@@ -0,0 +1,23 @@
+Synopsys ARC Local Timer with Interrupt Capabilities
+- Found on all ARC CPUs (ARC700/ARCHS)
+- Mandatory clockevent provider
+
+Required properties:
+
+- compatible : should be "snps,arc-timer0"
+- interrupts : single Interrupt going into parent intc
+	       (16 for ARCHS cores, 3 for ARC700 cores)
+- clocks     : phandle to the source clock
+
+Optional properties:
+
+- interrupt-parent : phandle to parent intc
+
+Example:
+
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
new file mode 100644
index 000000000000..4886192ce2f2
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
@@ -0,0 +1,17 @@
+Synopsys ARC Free Running Local 32-bit Timer
+- Found on all ARC CPUs (ARC700/ARCHS)
+- Mandatory clocksource provider on ARC700
+- Optional clocksource provider on UP ARC HS CPUs
+  (and if better timer archs-rtc not available in SoC)
+
+Required properties:
+
+- compatible : should be "snps,arc-timer1"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
new file mode 100644
index 000000000000..cce60e16aa0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
@@ -0,0 +1,14 @@
+Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
+- clocksourc provider for SMP SoC
+
+Required properties:
+
+- compatible : should be "snps,archs-gfrc"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,archs-gfrc";
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
new file mode 100644
index 000000000000..f3b49938812b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
@@ -0,0 +1,14 @@
+Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
+- clocksourc provider for UP SoC
+
+Required properties:
+
+- compatible : should be "snps,archs-rtc"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-rtc";
+		clocks = <&timer0_clk>;
+	};
diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
index cfb5052239a1..f9f138efa92c 100644
--- a/arch/arc/boot/dts/abilis_tb10x.dtsi
+++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
@@ -35,6 +35,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&intc>;
+		clocks = <&cpu_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&cpu_clk>;
+	};
+
 	soc100 {
 		#address-cells	= <1>;
 		#size-cells	= <1>;
diff --git a/arch/arc/boot/dts/skeleton.dtsi b/arch/arc/boot/dts/skeleton.dtsi
index 296d371a335c..bcb08b36210d 100644
--- a/arch/arc/boot/dts/skeleton.dtsi
+++ b/arch/arc/boot/dts/skeleton.dtsi
@@ -30,6 +30,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
diff --git a/arch/arc/boot/dts/skeleton_hs.dtsi b/arch/arc/boot/dts/skeleton_hs.dtsi
index a53876669030..46c5b05aea90 100644
--- a/arch/arc/boot/dts/skeleton_hs.dtsi
+++ b/arch/arc/boot/dts/skeleton_hs.dtsi
@@ -25,6 +25,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <16>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
diff --git a/arch/arc/boot/dts/skeleton_hs_idu.dtsi b/arch/arc/boot/dts/skeleton_hs_idu.dtsi
index 74898d017f7a..2a40bd9e2e2a 100644
--- a/arch/arc/boot/dts/skeleton_hs_idu.dtsi
+++ b/arch/arc/boot/dts/skeleton_hs_idu.dtsi
@@ -25,6 +25,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <16>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,archs-timer-gfrc";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
-- 
2.5.0

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

ARC Timers have historically been probed directly.
As precursor to start probing Timers thru DT introduce these bindings

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 .../devicetree/bindings/timer/snps,arc-timer0.txt  | 23 ++++++++++++++++++++++
 .../devicetree/bindings/timer/snps,arc-timer1.txt  | 17 ++++++++++++++++
 .../devicetree/bindings/timer/snps,archs-gfrc.txt  | 14 +++++++++++++
 .../devicetree/bindings/timer/snps,archs-rtc.txt   | 14 +++++++++++++
 arch/arc/boot/dts/abilis_tb10x.dtsi                | 12 +++++++++++
 arch/arc/boot/dts/skeleton.dtsi                    | 12 +++++++++++
 arch/arc/boot/dts/skeleton_hs.dtsi                 | 12 +++++++++++
 arch/arc/boot/dts/skeleton_hs_idu.dtsi             | 12 +++++++++++
 8 files changed, 116 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
 create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt

diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
new file mode 100644
index 000000000000..ceb80c72a90b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
@@ -0,0 +1,23 @@
+Synopsys ARC Local Timer with Interrupt Capabilities
+- Found on all ARC CPUs (ARC700/ARCHS)
+- Mandatory clockevent provider
+
+Required properties:
+
+- compatible : should be "snps,arc-timer0"
+- interrupts : single Interrupt going into parent intc
+	       (16 for ARCHS cores, 3 for ARC700 cores)
+- clocks     : phandle to the source clock
+
+Optional properties:
+
+- interrupt-parent : phandle to parent intc
+
+Example:
+
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
new file mode 100644
index 000000000000..4886192ce2f2
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
@@ -0,0 +1,17 @@
+Synopsys ARC Free Running Local 32-bit Timer
+- Found on all ARC CPUs (ARC700/ARCHS)
+- Mandatory clocksource provider on ARC700
+- Optional clocksource provider on UP ARC HS CPUs
+  (and if better timer archs-rtc not available in SoC)
+
+Required properties:
+
+- compatible : should be "snps,arc-timer1"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
new file mode 100644
index 000000000000..cce60e16aa0d
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
@@ -0,0 +1,14 @@
+Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
+- clocksourc provider for SMP SoC
+
+Required properties:
+
+- compatible : should be "snps,archs-gfrc"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,archs-gfrc";
+		clocks = <&timer0_clk>;
+	};
diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
new file mode 100644
index 000000000000..f3b49938812b
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
@@ -0,0 +1,14 @@
+Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
+- clocksourc provider for UP SoC
+
+Required properties:
+
+- compatible : should be "snps,archs-rtc"
+- clocks     : phandle to the source clock
+
+Example:
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-rtc";
+		clocks = <&timer0_clk>;
+	};
diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
index cfb5052239a1..f9f138efa92c 100644
--- a/arch/arc/boot/dts/abilis_tb10x.dtsi
+++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
@@ -35,6 +35,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&intc>;
+		clocks = <&cpu_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&cpu_clk>;
+	};
+
 	soc100 {
 		#address-cells	= <1>;
 		#size-cells	= <1>;
diff --git a/arch/arc/boot/dts/skeleton.dtsi b/arch/arc/boot/dts/skeleton.dtsi
index 296d371a335c..bcb08b36210d 100644
--- a/arch/arc/boot/dts/skeleton.dtsi
+++ b/arch/arc/boot/dts/skeleton.dtsi
@@ -30,6 +30,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <3>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
diff --git a/arch/arc/boot/dts/skeleton_hs.dtsi b/arch/arc/boot/dts/skeleton_hs.dtsi
index a53876669030..46c5b05aea90 100644
--- a/arch/arc/boot/dts/skeleton_hs.dtsi
+++ b/arch/arc/boot/dts/skeleton_hs.dtsi
@@ -25,6 +25,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <16>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,arc-timer1";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
diff --git a/arch/arc/boot/dts/skeleton_hs_idu.dtsi b/arch/arc/boot/dts/skeleton_hs_idu.dtsi
index 74898d017f7a..2a40bd9e2e2a 100644
--- a/arch/arc/boot/dts/skeleton_hs_idu.dtsi
+++ b/arch/arc/boot/dts/skeleton_hs_idu.dtsi
@@ -25,6 +25,18 @@
 		};
 	};
 
+	timer0: timer_clkevt {
+		compatible = "snps,arc-timer0";
+		interrupts = <16>;
+		interrupt-parent = <&core_intc>;
+		clocks = <&core_clk>;
+	};
+
+	timer1: timer_clksrc {
+		compatible = "snps,archs-timer-gfrc";
+		clocks = <&core_clk>;
+	};
+
 	memory {
 		device_type = "memory";
 		reg = <0x80000000 0x10000000>;	/* 256M */
-- 
2.5.0

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---

[snip]

> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"
> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock
> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;

Even though this is an example maybe we may
use the same "core_clk" as in real .dts below?

-Alexey

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
> Cc: Rob Herring <robh at kernel.org>
> Cc: devicetree at vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
> ---

[snip]

> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"
> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock
> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;

Even though this is an example maybe we may
use the same "core_clk" as in real .dts below?

-Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 1133 bytes --]

Hi Vineet,

On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---

[snip]

> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"
> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock
> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;

Even though this is an example maybe we may
use the same "core_clk" as in real .dts below?

-AlexeyN‹§²æìr¸›yúèšØb²X¬¶Ç§vØ^–)Þº{.nÇ+‰·zøœzÚÞz)í…æèw*\x1fjg¬±¨\x1e¶‰šŽŠÝ¢j.ïÛ°\½½MŽúgjÌæa×\x02››–' ™©Þ¢¸\f¢·¦j:+v‰¨ŠwèjØm¶Ÿÿ¾\a«‘êçzZ+ƒùšŽŠÝ¢j"ú!¶i

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---

[snip]

> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> new file mode 100644
> index 000000000000..ceb80c72a90b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> @@ -0,0 +1,23 @@
> +Synopsys ARC Local Timer with Interrupt Capabilities
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clockevent provider
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"
> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock

Actually we're not flexible here.
See we have hard-coded "core_clk" in [PATCH 8/9].
We use it directly in show_cpuinfo() for reading clock speed
as well as in axs103_early_init().

So "source clock" here MUST be "core_clk", otherwise
/proc/cpuinfo will report junk instead of meaningful data at least.


> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> new file mode 100644
> index 000000000000..4886192ce2f2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> @@ -0,0 +1,17 @@
> +Synopsys ARC Free Running Local 32-bit Timer
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clocksource provider on ARC700
> +- Optional clocksource provider on UP ARC HS CPUs
> +  (and if better timer archs-rtc not available in SoC)
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer1"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&timer0_clk>;

Ditto, "clocks = <&core_clk>".

> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> new file mode 100644
> index 000000000000..cce60e16aa0d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
> +- clocksourc provider for SMP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-gfrc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,archs-gfrc";
> +		clocks = <&timer0_clk>;

Ditto, "clocks = <&core_clk>".

> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> new file mode 100644
> index 000000000000..f3b49938812b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
> +- clocksourc provider for UP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-rtc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-rtc";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
> index cfb5052239a1..f9f138efa92c 100644
> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi
> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
> @@ -35,6 +35,18 @@
>  		};
>  	};
>  
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&intc>;
> +		clocks = <&cpu_clk>;
>
> +	};
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&cpu_clk>;
> +	};
> +

Hm now that's a question how to fix /proc/cpuinfo output
for Abilis? There's no "core_clk" DTS node for Abilis and so
show_cpuinfo() won't get proper clock value.

Probably we may fix it with modification of their "pll" node
from
------------------------>8----------------------
		pll0: oscillator {
			clock-frequency  = <1000000000>;
		};
------------------------>8----------------------

to
------------------------>8----------------------
		core_clk: oscillator {
			clock
-frequency  = <1000000000>;
		};
------------------------>8----------------------

-Alexey

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
> Cc: Rob Herring <robh at kernel.org>
> Cc: devicetree at vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
> ---

[snip]

> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> new file mode 100644
> index 000000000000..ceb80c72a90b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> @@ -0,0 +1,23 @@
> +Synopsys ARC Local Timer with Interrupt Capabilities
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clockevent provider
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"
> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock

Actually we're not flexible here.
See we have hard-coded "core_clk" in [PATCH 8/9].
We use it directly in show_cpuinfo() for reading clock speed
as well as in axs103_early_init().

So "source clock" here MUST be "core_clk", otherwise
/proc/cpuinfo will report junk instead of meaningful data at least.


> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> new file mode 100644
> index 000000000000..4886192ce2f2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> @@ -0,0 +1,17 @@
> +Synopsys ARC Free Running Local 32-bit Timer
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clocksource provider on ARC700
> +- Optional clocksource provider on UP ARC HS CPUs
> +  (and if better timer archs-rtc not available in SoC)
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer1"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&timer0_clk>;

Ditto, "clocks = <&core_clk>".

> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> new file mode 100644
> index 000000000000..cce60e16aa0d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
> +- clocksourc provider for SMP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-gfrc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,archs-gfrc";
> +		clocks = <&timer0_clk>;

Ditto, "clocks = <&core_clk>".

> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> new file mode 100644
> index 000000000000..f3b49938812b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
> +- clocksourc provider for UP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-rtc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-rtc";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
> index cfb5052239a1..f9f138efa92c 100644
> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi
> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
> @@ -35,6 +35,18 @@
>  		};
>  	};
>  
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&intc>;
> +		clocks = <&cpu_clk>;
>
> +	};
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&cpu_clk>;
> +	};
> +

Hm now that's a question how to fix /proc/cpuinfo output
for Abilis? There's no "core_clk" DTS node for Abilis and so
show_cpuinfo() won't get proper clock value.

Probably we may fix it with modification of their "pll" node
from
------------------------>8----------------------
		pll0: oscillator {
			clock-frequency  = <1000000000>;
		};
------------------------>8----------------------

to
------------------------>8----------------------
		core_clk: oscillator {
			clock
-frequency  = <1000000000>;
		};
------------------------>8----------------------

-Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---

[snip]

> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> new file mode 100644
> index 000000000000..ceb80c72a90b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> @@ -0,0 +1,23 @@
> +Synopsys ARC Local Timer with Interrupt Capabilities
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clockevent provider
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"
> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock

Actually we're not flexible here.
See we have hard-coded "core_clk" in [PATCH 8/9].
We use it directly in show_cpuinfo() for reading clock speed
as well as in axs103_early_init().

So "source clock" here MUST be "core_clk", otherwise
/proc/cpuinfo will report junk instead of meaningful data at least.


> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> new file mode 100644
> index 000000000000..4886192ce2f2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> @@ -0,0 +1,17 @@
> +Synopsys ARC Free Running Local 32-bit Timer
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clocksource provider on ARC700
> +- Optional clocksource provider on UP ARC HS CPUs
> +  (and if better timer archs-rtc not available in SoC)
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer1"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&timer0_clk>;

Ditto, "clocks = <&core_clk>".

> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> new file mode 100644
> index 000000000000..cce60e16aa0d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
> +- clocksourc provider for SMP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-gfrc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,archs-gfrc";
> +		clocks = <&timer0_clk>;

Ditto, "clocks = <&core_clk>".

> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> new file mode 100644
> index 000000000000..f3b49938812b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
> +- clocksourc provider for UP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-rtc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-rtc";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
> index cfb5052239a1..f9f138efa92c 100644
> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi
> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
> @@ -35,6 +35,18 @@
>  		};
>  	};
>  
> +	timer0: timer_clkevt {
> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&intc>;
> +		clocks = <&cpu_clk>;
>
> +	};
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&cpu_clk>;
> +	};
> +

Hm now that's a question how to fix /proc/cpuinfo output
for Abilis? There's no "core_clk" DTS node for Abilis and so
show_cpuinfo() won't get proper clock value.

Probably we may fix it with modification of their "pll" node
from
------------------------>8----------------------
		pll0: oscillator {
			clock-frequency  = <1000000000>;
		};
------------------------>8----------------------

to
------------------------>8----------------------
		core_clk: oscillator {
			clock
-frequency  = <1000000000>;
		};
------------------------>8----------------------

-Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

Hi Alexey,

On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
>> +
>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer0"
>> +- interrupts : single Interrupt going into parent intc
>> +	       (16 for ARCHS cores, 3 for ARC700 cores)
>> +- clocks     : phandle to the source clock
> 
> Actually we're not flexible here.
> See we have hard-coded "core_clk" in [PATCH 8/9].
> We use it directly in show_cpuinfo() for reading clock speed
> as well as in axs103_early_init().
> 
> So "source clock" here MUST be "core_clk", otherwise
> /proc/cpuinfo will report junk instead of meaningful data at least.

Using hardcoded DT names in generic code is total BS and I slap myself for missing
that in reviewing 8/9. Please fix it !

FWIW, it is OK to have such hardcoding in say AXS103 DTS and AXS103 platform code
but it is not the way to go in setup.c

>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer1"
>> +- clocks     : phandle to the source clock
>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&timer0_clk>;
> 
> Ditto, "clocks = <&core_clk>".

Yeah I fixed all those !

>> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
>> index cfb5052239a1..f9f138efa92c 100644
>> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi
>> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
>> @@ -35,6 +35,18 @@
>>  		};
>>  	};
>>  
>> +	timer0: timer_clkevt {
>> +		compatible = "snps,arc-timer0";
>> +		interrupts = <3>;
>> +		interrupt-parent = <&intc>;
>> +		clocks = <&cpu_clk>;
>>
>> +	};
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&cpu_clk>;
>> +	};
>> +
> 
> Hm now that's a question how to fix /proc/cpuinfo output
> for Abilis? There's no "core_clk" DTS node for Abilis and so
> show_cpuinfo() won't get proper clock value.
> 
> Probably we may fix it with modification of their "pll" node
> from
> ------------------------>8----------------------
> 		pll0: oscillator {
> 			clock-frequency  = <1000000000>;
> 		};
> ------------------------>8----------------------
> 
> to
> ------------------------>8----------------------
> 		core_clk: oscillator {
> 			clock
> -frequency  = <1000000000>;
> 		};
> ------------------------>8----------------------

This is all moot once we fix the orig problem.

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

Hi Alexey,

On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
>> +
>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer0"
>> +- interrupts : single Interrupt going into parent intc
>> +	       (16 for ARCHS cores, 3 for ARC700 cores)
>> +- clocks     : phandle to the source clock
> 
> Actually we're not flexible here.
> See we have hard-coded "core_clk" in [PATCH 8/9].
> We use it directly in show_cpuinfo() for reading clock speed
> as well as in axs103_early_init().
> 
> So "source clock" here MUST be "core_clk", otherwise
> /proc/cpuinfo will report junk instead of meaningful data at least.

Using hardcoded DT names in generic code is total BS and I slap myself for missing
that in reviewing 8/9. Please fix it !

FWIW, it is OK to have such hardcoding in say AXS103 DTS and AXS103 platform code
but it is not the way to go in setup.c

>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer1"
>> +- clocks     : phandle to the source clock
>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&timer0_clk>;
> 
> Ditto, "clocks = <&core_clk>".

Yeah I fixed all those !

>> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
>> index cfb5052239a1..f9f138efa92c 100644
>> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi
>> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
>> @@ -35,6 +35,18 @@
>>  		};
>>  	};
>>  
>> +	timer0: timer_clkevt {
>> +		compatible = "snps,arc-timer0";
>> +		interrupts = <3>;
>> +		interrupt-parent = <&intc>;
>> +		clocks = <&cpu_clk>;
>>
>> +	};
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&cpu_clk>;
>> +	};
>> +
> 
> Hm now that's a question how to fix /proc/cpuinfo output
> for Abilis? There's no "core_clk" DTS node for Abilis and so
> show_cpuinfo() won't get proper clock value.
> 
> Probably we may fix it with modification of their "pll" node
> from
> ------------------------>8----------------------
> 		pll0: oscillator {
> 			clock-frequency  = <1000000000>;
> 		};
> ------------------------>8----------------------
> 
> to
> ------------------------>8----------------------
> 		core_clk: oscillator {
> 			clock
> -frequency  = <1000000000>;
> 		};
> ------------------------>8----------------------

This is all moot once we fix the orig problem.

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

Hi Alexey,

On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
>> +
>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer0"
>> +- interrupts : single Interrupt going into parent intc
>> +	       (16 for ARCHS cores, 3 for ARC700 cores)
>> +- clocks     : phandle to the source clock
> 
> Actually we're not flexible here.
> See we have hard-coded "core_clk" in [PATCH 8/9].
> We use it directly in show_cpuinfo() for reading clock speed
> as well as in axs103_early_init().
> 
> So "source clock" here MUST be "core_clk", otherwise
> /proc/cpuinfo will report junk instead of meaningful data at least.

Using hardcoded DT names in generic code is total BS and I slap myself for missing
that in reviewing 8/9. Please fix it !

FWIW, it is OK to have such hardcoding in say AXS103 DTS and AXS103 platform code
but it is not the way to go in setup.c

>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer1"
>> +- clocks     : phandle to the source clock
>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&timer0_clk>;
> 
> Ditto, "clocks = <&core_clk>".

Yeah I fixed all those !

>> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi b/arch/arc/boot/dts/abilis_tb10x.dtsi
>> index cfb5052239a1..f9f138efa92c 100644
>> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi
>> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi
>> @@ -35,6 +35,18 @@
>>  		};
>>  	};
>>  
>> +	timer0: timer_clkevt {
>> +		compatible = "snps,arc-timer0";
>> +		interrupts = <3>;
>> +		interrupt-parent = <&intc>;
>> +		clocks = <&cpu_clk>;
>>
>> +	};
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&cpu_clk>;
>> +	};
>> +
> 
> Hm now that's a question how to fix /proc/cpuinfo output
> for Abilis? There's no "core_clk" DTS node for Abilis and so
> show_cpuinfo() won't get proper clock value.
> 
> Probably we may fix it with modification of their "pll" node
> from
> ------------------------>8----------------------
> 		pll0: oscillator {
> 			clock-frequency  = <1000000000>;
> 		};
> ------------------------>8----------------------
> 
> to
> ------------------------>8----------------------
> 		core_clk: oscillator {
> 			clock
> -frequency  = <1000000000>;
> 		};
> ------------------------>8----------------------

This is all moot once we fix the orig problem.

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> Hi Alexey,
> 
> On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > +
> > > +Required properties:
> > > +
> > > +- compatible : should be "snps,arc-timer0"
> > > +- interrupts : single Interrupt going into parent intc
> > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > +- clocks     : phandle to the source clock
> > 
> > Actually we're not flexible here.
> > See we have hard-coded "core_clk" in [PATCH 8/9].
> > We use it directly in show_cpuinfo() for reading clock speed
> > as well as in axs103_early_init().
> > 
> > So "source clock" here MUST be "core_clk", otherwise
> > /proc/cpuinfo will report junk instead of meaningful data at least.
> 
> Using hardcoded DT names in generic code is total BS and I slap myself for missing
> that in reviewing 8/9. Please fix it !

But the only other alternative to hard-coded name is use of some internal variable
like "arc_timer_freq".

I.e. we make "arc_timer_freq" global and use it for displaying core frequency.

Are you OK with that?

-Alexey

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02@19:59 +0530, Vineet Gupta wrote:
> Hi Alexey,
> 
> On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> > > +
> > > +Required properties:
> > > +
> > > +- compatible : should be "snps,arc-timer0"
> > > +- interrupts : single Interrupt going into parent intc
> > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > +- clocks     : phandle to the source clock
> > 
> > Actually we're not flexible here.
> > See we have hard-coded "core_clk" in [PATCH 8/9].
> > We use it directly in show_cpuinfo() for reading clock speed
> > as well as in axs103_early_init().
> > 
> > So "source clock" here MUST be "core_clk", otherwise
> > /proc/cpuinfo will report junk instead of meaningful data at least.
> 
> Using hardcoded DT names in generic code is total BS and I slap myself for missing
> that in reviewing 8/9. Please fix it !

But the only other alternative to hard-coded name is use of some internal variable
like "arc_timer_freq".

I.e. we make "arc_timer_freq" global and use it for displaying core frequency.

Are you OK with that?

-Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 1337 bytes --]

Hi Vineet,

On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> Hi Alexey,
> 
> On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > +
> > > +Required properties:
> > > +
> > > +- compatible : should be "snps,arc-timer0"
> > > +- interrupts : single Interrupt going into parent intc
> > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > +- clocks     : phandle to the source clock
> > 
> > Actually we're not flexible here.
> > See we have hard-coded "core_clk" in [PATCH 8/9].
> > We use it directly in show_cpuinfo() for reading clock speed
> > as well as in axs103_early_init().
> > 
> > So "source clock" here MUST be "core_clk", otherwise
> > /proc/cpuinfo will report junk instead of meaningful data at least.
> 
> Using hardcoded DT names in generic code is total BS and I slap myself for missing
> that in reviewing 8/9. Please fix it !

But the only other alternative to hard-coded name is use of some internal variable
like "arc_timer_freq".

I.e. we make "arc_timer_freq" global and use it for displaying core frequency.

Are you OK with that?

-AlexeyN‹§²æìr¸›yúèšØb²X¬¶Ç§vØ^–)Þº{.nÇ+‰·zøœzÚÞz)í…æèw*\x1fjg¬±¨\x1e¶‰šŽŠÝ¢j.ïÛ°\½½MŽúgjÌæa×\x02››–' ™©Þ¢¸\f¢·¦j:+v‰¨ŠwèjØm¶Ÿÿ¾\a«‘êçzZ+ƒùšŽŠÝ¢j"ú!¶i

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02 at 18:36 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> > Hi Alexey,
> > 
> > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > Hi Vineet,
> > > 
> > > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > > +
> > > > +Required properties:
> > > > +
> > > > +- compatible : should be "snps,arc-timer0"
> > > > +- interrupts : single Interrupt going into parent intc
> > > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > > +- clocks     : phandle to the source clock
> > > 
> > > Actually we're not flexible here.
> > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > We use it directly in show_cpuinfo() for reading clock speed
> > > as well as in axs103_early_init().
> > > 
> > > So "source clock" here MUST be "core_clk", otherwise
> > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > 
> > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > that in reviewing 8/9. Please fix it !
> 
> But the only other alternative to hard-coded name is use of some internal variable
> like "arc_timer_freq".
> 
> I.e. we make "arc_timer_freq" global and use it for displaying core frequency.

Well actually there's another possibility that is used on many other platforms
(ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
of additional core frequency.

-Alexey

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Vineet,

On Tue, 2016-02-02@18:36 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02@19:59 +0530, Vineet Gupta wrote:
> > Hi Alexey,
> > 
> > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > Hi Vineet,
> > > 
> > > On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> > > > +
> > > > +Required properties:
> > > > +
> > > > +- compatible : should be "snps,arc-timer0"
> > > > +- interrupts : single Interrupt going into parent intc
> > > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > > +- clocks     : phandle to the source clock
> > > 
> > > Actually we're not flexible here.
> > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > We use it directly in show_cpuinfo() for reading clock speed
> > > as well as in axs103_early_init().
> > > 
> > > So "source clock" here MUST be "core_clk", otherwise
> > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > 
> > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > that in reviewing 8/9. Please fix it !
> 
> But the only other alternative to hard-coded name is use of some internal variable
> like "arc_timer_freq".
> 
> I.e. we make "arc_timer_freq" global and use it for displaying core frequency.

Well actually there's another possibility that is used on many other platforms
(ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
of additional core frequency.

-Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 1643 bytes --]

Hi Vineet,

On Tue, 2016-02-02 at 18:36 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> > Hi Alexey,
> > 
> > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > Hi Vineet,
> > > 
> > > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > > +
> > > > +Required properties:
> > > > +
> > > > +- compatible : should be "snps,arc-timer0"
> > > > +- interrupts : single Interrupt going into parent intc
> > > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > > +- clocks     : phandle to the source clock
> > > 
> > > Actually we're not flexible here.
> > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > We use it directly in show_cpuinfo() for reading clock speed
> > > as well as in axs103_early_init().
> > > 
> > > So "source clock" here MUST be "core_clk", otherwise
> > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > 
> > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > that in reviewing 8/9. Please fix it !
> 
> But the only other alternative to hard-coded name is use of some internal variable
> like "arc_timer_freq".
> 
> I.e. we make "arc_timer_freq" global and use it for displaying core frequency.

Well actually there's another possibility that is used on many other platforms
(ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
of additional core frequency.

-AlexeyN‹§²æìr¸›yúèšØb²X¬¶Ç§vØ^–)Þº{.nÇ+‰·zøœzÚÞz)í…æèw*\x1fjg¬±¨\x1e¶‰šŽŠÝ¢j.ïÛ°\½½MŽúgjÌæa×\x02››–' ™©Þ¢¸\f¢·¦j:+v‰¨ŠwèjØm¶Ÿÿ¾\a«‘êçzZ+ƒùšŽŠÝ¢j"ú!¶i

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Mike,

On Wed, 2016-02-03 at 01:57 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 18:36 +0300, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> > > Hi Alexey,
> > > 
> > > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > > Hi Vineet,
> > > > 
> > > > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > > > +
> > > > > +Required properties:
> > > > > +
> > > > > +- compatible : should be "snps,arc-timer0"
> > > > > +- interrupts : single Interrupt going into parent intc
> > > > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > > > +- clocks     : phandle to the source clock
> > > > 
> > > > Actually we're not flexible here.
> > > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > > We use it directly in show_cpuinfo() for reading clock speed
> > > > as well as in axs103_early_init().
> > > > 
> > > > So "source clock" here MUST be "core_clk", otherwise
> > > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > > 
> > > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > > that in reviewing 8/9. Please fix it !
> > 
> > But the only other alternative to hard-coded name is use of some internal variable
> > like "arc_timer_freq".
> > 
> > I.e. we make "arc_timer_freq" global and use it for displaying core frequency.
> 
> Well actually there's another possibility that is used on many other platforms
> (ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
> of additional core frequency.

We're in the process of switching ARC to generic clk framework.

One of the problems we're trying to solve now is how to obtain
precise CPU frequency value for outputting it for example by /proc/cpuinfo.

This precise (in terms of what value was set via Device Tree or extracted and decoded
from CPU configuration registers) CPU frequency is very useful for example for
benchmarking. In comparison bogomips might be misleading at times.

Before moving to clk framework we used to have 2 ARC-specific calls
arc_get_core_freq() and  arc_set_core_freq() which were basically wrappers for
one variable where we stored CPU frequency.

I took a look at what other architectures do and so far saw these options:
 [1] Just print bogomips (ARM both 32- and 64-bit, m64k, Microblaze, Mips,
                          mn10300, openrisc, s390, sh, um, unicore32, )
 [2] Get frequency from some kind of architecture-specific structure or variable
     (Alpha, AVR32, c6x, nios2, powerpc, sparc, tile, xtensa) 
 [3] Get frequency from cpufreq framework (ia64, x86)
 [4] Decode frequency from hardware registers (Blackfin)

Any thoughts on what's the best way to get CPU frequency in run-time
(preferably with use of clk framework so we'll need no arch-specific
variables)?

Regards,
Alexey

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Mike,

On Wed, 2016-02-03@01:57 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02@18:36 +0300, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02@19:59 +0530, Vineet Gupta wrote:
> > > Hi Alexey,
> > > 
> > > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > > Hi Vineet,
> > > > 
> > > > On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> > > > > +
> > > > > +Required properties:
> > > > > +
> > > > > +- compatible : should be "snps,arc-timer0"
> > > > > +- interrupts : single Interrupt going into parent intc
> > > > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > > > +- clocks     : phandle to the source clock
> > > > 
> > > > Actually we're not flexible here.
> > > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > > We use it directly in show_cpuinfo() for reading clock speed
> > > > as well as in axs103_early_init().
> > > > 
> > > > So "source clock" here MUST be "core_clk", otherwise
> > > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > > 
> > > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > > that in reviewing 8/9. Please fix it !
> > 
> > But the only other alternative to hard-coded name is use of some internal variable
> > like "arc_timer_freq".
> > 
> > I.e. we make "arc_timer_freq" global and use it for displaying core frequency.
> 
> Well actually there's another possibility that is used on many other platforms
> (ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
> of additional core frequency.

We're in the process of switching ARC to generic clk framework.

One of the problems we're trying to solve now is how to obtain
precise CPU frequency value for outputting it for example by /proc/cpuinfo.

This precise (in terms of what value was set via Device Tree or extracted and decoded
from CPU configuration registers) CPU frequency is very useful for example for
benchmarking. In comparison bogomips might be misleading at times.

Before moving to clk framework we used to have 2 ARC-specific calls
arc_get_core_freq() and  arc_set_core_freq() which were basically wrappers for
one variable where we stored CPU frequency.

I took a look at what other architectures do and so far saw these options:
 [1] Just print bogomips (ARM both 32- and 64-bit, m64k, Microblaze, Mips,
                          mn10300, openrisc, s390, sh, um, unicore32, )
 [2] Get frequency from some kind of architecture-specific structure or variable
     (Alpha, AVR32, c6x, nios2, powerpc, sparc, tile, xtensa) 
 [3] Get frequency from cpufreq framework (ia64, x86)
 [4] Decode frequency from hardware registers (Blackfin)

Any thoughts on what's the best way to get CPU frequency in run-time
(preferably with use of clk framework so we'll need no arch-specific
variables)?

Regards,
Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

Hi Mike,

On Wed, 2016-02-03 at 01:57 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 18:36 +0300, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> > > Hi Alexey,
> > > 
> > > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > > Hi Vineet,
> > > > 
> > > > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > > > +
> > > > > +Required properties:
> > > > > +
> > > > > +- compatible : should be "snps,arc-timer0"
> > > > > +- interrupts : single Interrupt going into parent intc
> > > > > +	       (16 for ARCHS cores, 3 for ARC700 cores)
> > > > > +- clocks     : phandle to the source clock
> > > > 
> > > > Actually we're not flexible here.
> > > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > > We use it directly in show_cpuinfo() for reading clock speed
> > > > as well as in axs103_early_init().
> > > > 
> > > > So "source clock" here MUST be "core_clk", otherwise
> > > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > > 
> > > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > > that in reviewing 8/9. Please fix it !
> > 
> > But the only other alternative to hard-coded name is use of some internal variable
> > like "arc_timer_freq".
> > 
> > I.e. we make "arc_timer_freq" global and use it for displaying core frequency.
> 
> Well actually there's another possibility that is used on many other platforms
> (ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
> of additional core frequency.

We're in the process of switching ARC to generic clk framework.

One of the problems we're trying to solve now is how to obtain
precise CPU frequency value for outputting it for example by /proc/cpuinfo.

This precise (in terms of what value was set via Device Tree or extracted and decoded
from CPU configuration registers) CPU frequency is very useful for example for
benchmarking. In comparison bogomips might be misleading at times.

Before moving to clk framework we used to have 2 ARC-specific calls
arc_get_core_freq() and  arc_set_core_freq() which were basically wrappers for
one variable where we stored CPU frequency.

I took a look at what other architectures do and so far saw these options:
 [1] Just print bogomips (ARM both 32- and 64-bit, m64k, Microblaze, Mips,
                          mn10300, openrisc, s390, sh, um, unicore32, )
 [2] Get frequency from some kind of architecture-specific structure or variable
     (Alpha, AVR32, c6x, nios2, powerpc, sparc, tile, xtensa) 
 [3] Get frequency from cpufreq framework (ia64, x86)
 [4] Decode frequency from hardware registers (Blackfin)

Any thoughts on what's the best way to get CPU frequency in run-time
(preferably with use of clk framework so we'll need no arch-specific
variables)?

Regards,
Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

(re-sending because Mike's email @ti is no longer valid)

Hi Mike,

On Wed, 2016-02-03 at 01:57 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 18:36 +0300, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> > > Hi Alexey,
> > > 
> > > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > > Hi Vineet,
> > > > 
> > > > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > > > +
> > > > > +Required properties:
> > > > > +
> > > > > +- compatible : should be "snps,arc-timer0"
> > > > > +- interrupts : single Interrupt going into parent intc
> > > > > +            (16 for ARCHS cores, 3 for ARC700 cores)
> > > > > +- clocks     : phandle to the source clock
> > > > 
> > > > Actually we're not flexible here.
> > > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > > We use it directly in show_cpuinfo() for reading clock speed
> > > > as well as in axs103_early_init().
> > > > 
> > > > So "source clock" here MUST be "core_clk", otherwise
> > > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > > 
> > > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > > that in reviewing 8/9. Please fix it !
> > 
> > But the only other alternative to hard-coded name is use of some internal variable
> > like "arc_timer_freq".
> > 
> > I.e. we make "arc_timer_freq" global and use it for displaying core frequency.
> 
> Well actually there's another possibility that is used on many other platforms
> (ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
> of additional core frequency.

We're in the process of switching ARC to generic clk framework.

One of the problems we're trying to solve now is how to obtain
precise CPU frequency value for outputting it for example by /proc/cpuinfo.

This precise (in terms of what value was set via Device Tree or extracted and decoded
from CPU configuration registers) CPU frequency is very useful for example for
benchmarking. In comparison bogomips might be misleading at times.

Before moving to clk framework we used to have 2 ARC-specific calls
arc_get_core_freq() and  arc_set_core_freq() which were basically wrappers for
one variable where we stored CPU frequency.

I took a look at what other architectures do and so far saw these options:
 [1] Just print bogomips (ARM both 32- and 64-bit, m64k, Microblaze, Mips,
                          mn10300, openrisc, s390, sh, um, unicore32, )
 [2] Get frequency from some kind of architecture-specific structure or variable
     (Alpha, AVR32, c6x, nios2, powerpc, sparc, tile, xtensa) 
 [3] Get frequency from cpufreq framework (ia64, x86)
 [4] Decode frequency from hardware registers (Blackfin)

Any thoughts on what's the best way to get CPU frequency in run-time
(preferably with use of clk framework so we'll need no arch-specific
variables)?

Regards,
Alexey

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

(re-sending because Mike's email @ti is no longer valid)

Hi Mike,

On Wed, 2016-02-03@01:57 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02@18:36 +0300, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02@19:59 +0530, Vineet Gupta wrote:
> > > Hi Alexey,
> > > 
> > > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > > Hi Vineet,
> > > > 
> > > > On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> > > > > +
> > > > > +Required properties:
> > > > > +
> > > > > +- compatible : should be "snps,arc-timer0"
> > > > > +- interrupts : single Interrupt going into parent intc
> > > > > +            (16 for ARCHS cores, 3 for ARC700 cores)
> > > > > +- clocks     : phandle to the source clock
> > > > 
> > > > Actually we're not flexible here.
> > > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > > We use it directly in show_cpuinfo() for reading clock speed
> > > > as well as in axs103_early_init().
> > > > 
> > > > So "source clock" here MUST be "core_clk", otherwise
> > > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > > 
> > > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > > that in reviewing 8/9. Please fix it !
> > 
> > But the only other alternative to hard-coded name is use of some internal variable
> > like "arc_timer_freq".
> > 
> > I.e. we make "arc_timer_freq" global and use it for displaying core frequency.
> 
> Well actually there's another possibility that is used on many other platforms
> (ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
> of additional core frequency.

We're in the process of switching ARC to generic clk framework.

One of the problems we're trying to solve now is how to obtain
precise CPU frequency value for outputting it for example by /proc/cpuinfo.

This precise (in terms of what value was set via Device Tree or extracted and decoded
from CPU configuration registers) CPU frequency is very useful for example for
benchmarking. In comparison bogomips might be misleading at times.

Before moving to clk framework we used to have 2 ARC-specific calls
arc_get_core_freq() and  arc_set_core_freq() which were basically wrappers for
one variable where we stored CPU frequency.

I took a look at what other architectures do and so far saw these options:
 [1] Just print bogomips (ARM both 32- and 64-bit, m64k, Microblaze, Mips,
                          mn10300, openrisc, s390, sh, um, unicore32, )
 [2] Get frequency from some kind of architecture-specific structure or variable
     (Alpha, AVR32, c6x, nios2, powerpc, sparc, tile, xtensa) 
 [3] Get frequency from cpufreq framework (ia64, x86)
 [4] Decode frequency from hardware registers (Blackfin)

Any thoughts on what's the best way to get CPU frequency in run-time
(preferably with use of clk framework so we'll need no arch-specific
variables)?

Regards,
Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Alexey Brodkin]

(re-sending because Mike's email @ti is no longer valid)

Hi Mike,

On Wed, 2016-02-03 at 01:57 +0300, Alexey Brodkin wrote:
> Hi Vineet,
> 
> On Tue, 2016-02-02 at 18:36 +0300, Alexey Brodkin wrote:
> > Hi Vineet,
> > 
> > On Tue, 2016-02-02 at 19:59 +0530, Vineet Gupta wrote:
> > > Hi Alexey,
> > > 
> > > On Tuesday 02 February 2016 06:45 PM, Alexey Brodkin wrote:
> > > > Hi Vineet,
> > > > 
> > > > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > > > +
> > > > > +Required properties:
> > > > > +
> > > > > +- compatible : should be "snps,arc-timer0"
> > > > > +- interrupts : single Interrupt going into parent intc
> > > > > +            (16 for ARCHS cores, 3 for ARC700 cores)
> > > > > +- clocks     : phandle to the source clock
> > > > 
> > > > Actually we're not flexible here.
> > > > See we have hard-coded "core_clk" in [PATCH 8/9].
> > > > We use it directly in show_cpuinfo() for reading clock speed
> > > > as well as in axs103_early_init().
> > > > 
> > > > So "source clock" here MUST be "core_clk", otherwise
> > > > /proc/cpuinfo will report junk instead of meaningful data at least.
> > > 
> > > Using hardcoded DT names in generic code is total BS and I slap myself for missing
> > > that in reviewing 8/9. Please fix it !
> > 
> > But the only other alternative to hard-coded name is use of some internal variable
> > like "arc_timer_freq".
> > 
> > I.e. we make "arc_timer_freq" global and use it for displaying core frequency.
> 
> Well actually there's another possibility that is used on many other platforms
> (ARM both 32 and 64-bit flavors is a good example) - just print bogomips instead
> of additional core frequency.

We're in the process of switching ARC to generic clk framework.

One of the problems we're trying to solve now is how to obtain
precise CPU frequency value for outputting it for example by /proc/cpuinfo.

This precise (in terms of what value was set via Device Tree or extracted and decoded
from CPU configuration registers) CPU frequency is very useful for example for
benchmarking. In comparison bogomips might be misleading at times.

Before moving to clk framework we used to have 2 ARC-specific calls
arc_get_core_freq() and  arc_set_core_freq() which were basically wrappers for
one variable where we stored CPU frequency.

I took a look at what other architectures do and so far saw these options:
 [1] Just print bogomips (ARM both 32- and 64-bit, m64k, Microblaze, Mips,
                          mn10300, openrisc, s390, sh, um, unicore32, )
 [2] Get frequency from some kind of architecture-specific structure or variable
     (Alpha, AVR32, c6x, nios2, powerpc, sparc, tile, xtensa) 
 [3] Get frequency from cpufreq framework (ia64, x86)
 [4] Decode frequency from hardware registers (Blackfin)

Any thoughts on what's the best way to get CPU frequency in run-time
(preferably with use of clk framework so we'll need no arch-specific
variables)?

Regards,
Alexey

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Rob Herring]

On Tue, Feb 02, 2016 at 04:28:52PM +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Rob Herring <robh@kernel.org>
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---
>  .../devicetree/bindings/timer/snps,arc-timer0.txt  | 23 ++++++++++++++++++++++
>  .../devicetree/bindings/timer/snps,arc-timer1.txt  | 17 ++++++++++++++++
>  .../devicetree/bindings/timer/snps,archs-gfrc.txt  | 14 +++++++++++++
>  .../devicetree/bindings/timer/snps,archs-rtc.txt   | 14 +++++++++++++
>  arch/arc/boot/dts/abilis_tb10x.dtsi                | 12 +++++++++++
>  arch/arc/boot/dts/skeleton.dtsi                    | 12 +++++++++++
>  arch/arc/boot/dts/skeleton_hs.dtsi                 | 12 +++++++++++
>  arch/arc/boot/dts/skeleton_hs_idu.dtsi             | 12 +++++++++++
>  8 files changed, 116 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> new file mode 100644
> index 000000000000..ceb80c72a90b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> @@ -0,0 +1,23 @@
> +Synopsys ARC Local Timer with Interrupt Capabilities
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clockevent provider
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"

timer0 and timer1 are different h/w blocks, not just different 
instances?

> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock
> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {

just "timer" for node name. clkevt is a Linuxism.

> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> new file mode 100644
> index 000000000000..4886192ce2f2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> @@ -0,0 +1,17 @@
> +Synopsys ARC Free Running Local 32-bit Timer
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clocksource provider on ARC700
> +- Optional clocksource provider on UP ARC HS CPUs
> +  (and if better timer archs-rtc not available in SoC)
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer1"
> +- clocks     : phandle to the source clock

No interrupt because it doesn't have one or you use this as a 
clocksource and don't need it?

> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> new file mode 100644
> index 000000000000..cce60e16aa0d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
> +- clocksourc provider for SMP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-gfrc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,archs-gfrc";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> new file mode 100644
> index 000000000000..f3b49938812b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
> +- clocksourc provider for UP SoC

local timer on a UP processor?

> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-rtc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-rtc";
> +		clocks = <&timer0_clk>;
> +	};

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Rob Herring]

On Tue, Feb 02, 2016@04:28:52PM +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
> Cc: Rob Herring <robh at kernel.org>
> Cc: devicetree at vger.kernel.org
> Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
> ---
>  .../devicetree/bindings/timer/snps,arc-timer0.txt  | 23 ++++++++++++++++++++++
>  .../devicetree/bindings/timer/snps,arc-timer1.txt  | 17 ++++++++++++++++
>  .../devicetree/bindings/timer/snps,archs-gfrc.txt  | 14 +++++++++++++
>  .../devicetree/bindings/timer/snps,archs-rtc.txt   | 14 +++++++++++++
>  arch/arc/boot/dts/abilis_tb10x.dtsi                | 12 +++++++++++
>  arch/arc/boot/dts/skeleton.dtsi                    | 12 +++++++++++
>  arch/arc/boot/dts/skeleton_hs.dtsi                 | 12 +++++++++++
>  arch/arc/boot/dts/skeleton_hs_idu.dtsi             | 12 +++++++++++
>  8 files changed, 116 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> new file mode 100644
> index 000000000000..ceb80c72a90b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> @@ -0,0 +1,23 @@
> +Synopsys ARC Local Timer with Interrupt Capabilities
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clockevent provider
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"

timer0 and timer1 are different h/w blocks, not just different 
instances?

> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock
> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {

just "timer" for node name. clkevt is a Linuxism.

> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> new file mode 100644
> index 000000000000..4886192ce2f2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> @@ -0,0 +1,17 @@
> +Synopsys ARC Free Running Local 32-bit Timer
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clocksource provider on ARC700
> +- Optional clocksource provider on UP ARC HS CPUs
> +  (and if better timer archs-rtc not available in SoC)
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer1"
> +- clocks     : phandle to the source clock

No interrupt because it doesn't have one or you use this as a 
clocksource and don't need it?

> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> new file mode 100644
> index 000000000000..cce60e16aa0d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
> +- clocksourc provider for SMP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-gfrc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,archs-gfrc";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> new file mode 100644
> index 000000000000..f3b49938812b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
> +- clocksourc provider for UP SoC

local timer on a UP processor?

> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-rtc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-rtc";
> +		clocks = <&timer0_clk>;
> +	};

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Rob Herring]

On Tue, Feb 02, 2016 at 04:28:52PM +0530, Vineet Gupta wrote:
> ARC Timers have historically been probed directly.
> As precursor to start probing Timers thru DT introduce these bindings
> 
> Cc: Daniel Lezcano <daniel.lezcano-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Cc: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> Signed-off-by: Vineet Gupta <vgupta-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
> ---
>  .../devicetree/bindings/timer/snps,arc-timer0.txt  | 23 ++++++++++++++++++++++
>  .../devicetree/bindings/timer/snps,arc-timer1.txt  | 17 ++++++++++++++++
>  .../devicetree/bindings/timer/snps,archs-gfrc.txt  | 14 +++++++++++++
>  .../devicetree/bindings/timer/snps,archs-rtc.txt   | 14 +++++++++++++
>  arch/arc/boot/dts/abilis_tb10x.dtsi                | 12 +++++++++++
>  arch/arc/boot/dts/skeleton.dtsi                    | 12 +++++++++++
>  arch/arc/boot/dts/skeleton_hs.dtsi                 | 12 +++++++++++
>  arch/arc/boot/dts/skeleton_hs_idu.dtsi             | 12 +++++++++++
>  8 files changed, 116 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
>  create mode 100644 Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> 
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> new file mode 100644
> index 000000000000..ceb80c72a90b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer0.txt
> @@ -0,0 +1,23 @@
> +Synopsys ARC Local Timer with Interrupt Capabilities
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clockevent provider
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer0"

timer0 and timer1 are different h/w blocks, not just different 
instances?

> +- interrupts : single Interrupt going into parent intc
> +	       (16 for ARCHS cores, 3 for ARC700 cores)
> +- clocks     : phandle to the source clock
> +
> +Optional properties:
> +
> +- interrupt-parent : phandle to parent intc
> +
> +Example:
> +
> +	timer0: timer_clkevt {

just "timer" for node name. clkevt is a Linuxism.

> +		compatible = "snps,arc-timer0";
> +		interrupts = <3>;
> +		interrupt-parent = <&core_intc>;
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> new file mode 100644
> index 000000000000..4886192ce2f2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
> @@ -0,0 +1,17 @@
> +Synopsys ARC Free Running Local 32-bit Timer
> +- Found on all ARC CPUs (ARC700/ARCHS)
> +- Mandatory clocksource provider on ARC700
> +- Optional clocksource provider on UP ARC HS CPUs
> +  (and if better timer archs-rtc not available in SoC)
> +
> +Required properties:
> +
> +- compatible : should be "snps,arc-timer1"
> +- clocks     : phandle to the source clock

No interrupt because it doesn't have one or you use this as a 
clocksource and don't need it?

> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-timer1";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> new file mode 100644
> index 000000000000..cce60e16aa0d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
> +- clocksourc provider for SMP SoC
> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-gfrc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,archs-gfrc";
> +		clocks = <&timer0_clk>;
> +	};
> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> new file mode 100644
> index 000000000000..f3b49938812b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
> @@ -0,0 +1,14 @@
> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
> +- clocksourc provider for UP SoC

local timer on a UP processor?

> +
> +Required properties:
> +
> +- compatible : should be "snps,archs-rtc"
> +- clocks     : phandle to the source clock
> +
> +Example:
> +
> +	timer1: timer_clksrc {
> +		compatible = "snps,arc-rtc";
> +		clocks = <&timer0_clk>;
> +	};
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Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

Hi Rob,

On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
> On Tue, Feb 02, 2016 at 04:28:52PM +0530, Vineet Gupta wrote:
>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer0"
> 
> timer0 and timer1 are different h/w blocks, not just different 
> instances?

Functionality wise they are identical (only the address of aux regs used to
program them are different). Either can be configured to interrupt-on-limit or
free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
uses timer0 for tick handling, timer1 for gtod.

Do you prefer they not be differentiated as timer0 and timer1 ?

So we have

CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);

I don't know how to achieve above, by keeping the DT names the same.

> 
>> +- interrupts : single Interrupt going into parent intc
>> +	       (16 for ARCHS cores, 3 for ARC700 cores)
>> +- clocks     : phandle to the source clock
>> +
>> +Optional properties:
>> +
>> +- interrupt-parent : phandle to parent intc
>> +
>> +Example:
>> +
>> +	timer0: timer_clkevt {
> 
> just "timer" for node name. clkevt is a Linuxism.

OK. So to document that this is for clockevent, change the label ?

timer_clkevent: timer {

> 
>> +		compatible = "snps,arc-timer0";
>> +		interrupts = <3>;
>> +		interrupt-parent = <&core_intc>;
>> +		clocks = <&timer0_clk>;
>> +	};
>> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>> new file mode 100644
>> index 000000000000..4886192ce2f2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>> @@ -0,0 +1,17 @@
>> +Synopsys ARC Free Running Local 32-bit Timer
>> +- Found on all ARC CPUs (ARC700/ARCHS)
>> +- Mandatory clocksource provider on ARC700
>> +- Optional clocksource provider on UP ARC HS CPUs
>> +  (and if better timer archs-rtc not available in SoC)
>> +
>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer1"
>> +- clocks     : phandle to the source clock
> 
> No interrupt because it doesn't have one or you use this as a 
> clocksource and don't need it?

Latter !


>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&timer0_clk>;
>> +	};
>> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
>> new file mode 100644
>> index 000000000000..cce60e16aa0d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
>> @@ -0,0 +1,14 @@
>> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
>> +- clocksourc provider for SMP SoC
>> +
>> +Required properties:
>> +
>> +- compatible : should be "snps,archs-gfrc"
>> +- clocks     : phandle to the source clock
>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,archs-gfrc";
>> +		clocks = <&timer0_clk>;
>> +	};
>> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
>> new file mode 100644
>> index 000000000000..f3b49938812b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
>> @@ -0,0 +1,14 @@
>> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
>> +- clocksourc provider for UP SoC
> 
> local timer on a UP processor?

Not sure what you mean to change.

This timer could be present in UP or SMP hardware configs but only usable as
clocksource for UP since it is local and we don't do tick broadcast etc for SMP.

To me clocksource is one level higher in level of abstraction than processor and
thus applies to overall system / SoC than the processor.

Thx,
-Vineet

>> +Required properties:
>> +
>> +- compatible : should be "snps,archs-rtc"
>> +- clocks     : phandle to the source clock
>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-rtc";
>> +		clocks = <&timer0_clk>;
>> +	};
> --

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

Hi Rob,

On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
> On Tue, Feb 02, 2016@04:28:52PM +0530, Vineet Gupta wrote:
>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer0"
> 
> timer0 and timer1 are different h/w blocks, not just different 
> instances?

Functionality wise they are identical (only the address of aux regs used to
program them are different). Either can be configured to interrupt-on-limit or
free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
uses timer0 for tick handling, timer1 for gtod.

Do you prefer they not be differentiated as timer0 and timer1 ?

So we have

CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);

I don't know how to achieve above, by keeping the DT names the same.

> 
>> +- interrupts : single Interrupt going into parent intc
>> +	       (16 for ARCHS cores, 3 for ARC700 cores)
>> +- clocks     : phandle to the source clock
>> +
>> +Optional properties:
>> +
>> +- interrupt-parent : phandle to parent intc
>> +
>> +Example:
>> +
>> +	timer0: timer_clkevt {
> 
> just "timer" for node name. clkevt is a Linuxism.

OK. So to document that this is for clockevent, change the label ?

timer_clkevent: timer {

> 
>> +		compatible = "snps,arc-timer0";
>> +		interrupts = <3>;
>> +		interrupt-parent = <&core_intc>;
>> +		clocks = <&timer0_clk>;
>> +	};
>> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>> new file mode 100644
>> index 000000000000..4886192ce2f2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>> @@ -0,0 +1,17 @@
>> +Synopsys ARC Free Running Local 32-bit Timer
>> +- Found on all ARC CPUs (ARC700/ARCHS)
>> +- Mandatory clocksource provider on ARC700
>> +- Optional clocksource provider on UP ARC HS CPUs
>> +  (and if better timer archs-rtc not available in SoC)
>> +
>> +Required properties:
>> +
>> +- compatible : should be "snps,arc-timer1"
>> +- clocks     : phandle to the source clock
> 
> No interrupt because it doesn't have one or you use this as a 
> clocksource and don't need it?

Latter !


>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-timer1";
>> +		clocks = <&timer0_clk>;
>> +	};
>> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
>> new file mode 100644
>> index 000000000000..cce60e16aa0d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/snps,archs-gfrc.txt
>> @@ -0,0 +1,14 @@
>> +Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
>> +- clocksourc provider for SMP SoC
>> +
>> +Required properties:
>> +
>> +- compatible : should be "snps,archs-gfrc"
>> +- clocks     : phandle to the source clock
>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,archs-gfrc";
>> +		clocks = <&timer0_clk>;
>> +	};
>> diff --git a/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
>> new file mode 100644
>> index 000000000000..f3b49938812b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/timer/snps,archs-rtc.txt
>> @@ -0,0 +1,14 @@
>> +Synopsys ARC Free Running 64-bit Local Timer for ARC HS CPUs
>> +- clocksourc provider for UP SoC
> 
> local timer on a UP processor?

Not sure what you mean to change.

This timer could be present in UP or SMP hardware configs but only usable as
clocksource for UP since it is local and we don't do tick broadcast etc for SMP.

To me clocksource is one level higher in level of abstraction than processor and
thus applies to overall system / SoC than the processor.

Thx,
-Vineet

>> +Required properties:
>> +
>> +- compatible : should be "snps,archs-rtc"
>> +- clocks     : phandle to the source clock
>> +
>> +Example:
>> +
>> +	timer1: timer_clksrc {
>> +		compatible = "snps,arc-rtc";
>> +		clocks = <&timer0_clk>;
>> +	};
> --

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Rob Herring]

On Wed, Feb 3, 2016 at 2:04 AM, Vineet Gupta <Vineet.Gupta1@synopsys.com> wrote:
> Hi Rob,
>
> On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
>> On Tue, Feb 02, 2016 at 04:28:52PM +0530, Vineet Gupta wrote:
>>> +Required properties:
>>> +
>>> +- compatible : should be "snps,arc-timer0"
>>
>> timer0 and timer1 are different h/w blocks, not just different
>> instances?
>
> Functionality wise they are identical (only the address of aux regs used to
> program them are different). Either can be configured to interrupt-on-limit or
> free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
> uses timer0 for tick handling, timer1 for gtod.
>
> Do you prefer they not be differentiated as timer0 and timer1 ?
>
> So we have
>
> CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
> CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
>
> I don't know how to achieve above, by keeping the DT names the same.

You just need a single CLOCKSOURCE_OF_DECLARE which will be called
twice. On the first call, setup one timer and on the 2nd call setup
the other one. IIRC the sp804 timer has something similar.

You'll need a unit address in the node name to distinguish them.

>
>>
>>> +- interrupts : single Interrupt going into parent intc
>>> +           (16 for ARCHS cores, 3 for ARC700 cores)
>>> +- clocks     : phandle to the source clock
>>> +
>>> +Optional properties:
>>> +
>>> +- interrupt-parent : phandle to parent intc
>>> +
>>> +Example:
>>> +
>>> +    timer0: timer_clkevt {
>>
>> just "timer" for node name. clkevt is a Linuxism.
>
> OK. So to document that this is for clockevent, change the label ?

That shouldn't be documented in the DT at all.

>
> timer_clkevent: timer {
>
>>
>>> +            compatible = "snps,arc-timer0";
>>> +            interrupts = <3>;
>>> +            interrupt-parent = <&core_intc>;
>>> +            clocks = <&timer0_clk>;
>>> +    };
>>> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>>> new file mode 100644
>>> index 000000000000..4886192ce2f2
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>>> @@ -0,0 +1,17 @@
>>> +Synopsys ARC Free Running Local 32-bit Timer
>>> +- Found on all ARC CPUs (ARC700/ARCHS)
>>> +- Mandatory clocksource provider on ARC700
>>> +- Optional clocksource provider on UP ARC HS CPUs
>>> +  (and if better timer archs-rtc not available in SoC)
>>> +
>>> +Required properties:
>>> +
>>> +- compatible : should be "snps,arc-timer1"
>>> +- clocks     : phandle to the source clock
>>
>> No interrupt because it doesn't have one or you use this as a
>> clocksource and don't need it?
>
> Latter !

Then you should have the interrupt in the DT anyway.

Rob

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Rob Herring]

On Wed, Feb 3, 2016@2:04 AM, Vineet Gupta <Vineet.Gupta1@synopsys.com> wrote:
> Hi Rob,
>
> On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
>> On Tue, Feb 02, 2016@04:28:52PM +0530, Vineet Gupta wrote:
>>> +Required properties:
>>> +
>>> +- compatible : should be "snps,arc-timer0"
>>
>> timer0 and timer1 are different h/w blocks, not just different
>> instances?
>
> Functionality wise they are identical (only the address of aux regs used to
> program them are different). Either can be configured to interrupt-on-limit or
> free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
> uses timer0 for tick handling, timer1 for gtod.
>
> Do you prefer they not be differentiated as timer0 and timer1 ?
>
> So we have
>
> CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
> CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
>
> I don't know how to achieve above, by keeping the DT names the same.

You just need a single CLOCKSOURCE_OF_DECLARE which will be called
twice. On the first call, setup one timer and on the 2nd call setup
the other one. IIRC the sp804 timer has something similar.

You'll need a unit address in the node name to distinguish them.

>
>>
>>> +- interrupts : single Interrupt going into parent intc
>>> +           (16 for ARCHS cores, 3 for ARC700 cores)
>>> +- clocks     : phandle to the source clock
>>> +
>>> +Optional properties:
>>> +
>>> +- interrupt-parent : phandle to parent intc
>>> +
>>> +Example:
>>> +
>>> +    timer0: timer_clkevt {
>>
>> just "timer" for node name. clkevt is a Linuxism.
>
> OK. So to document that this is for clockevent, change the label ?

That shouldn't be documented in the DT at all.

>
> timer_clkevent: timer {
>
>>
>>> +            compatible = "snps,arc-timer0";
>>> +            interrupts = <3>;
>>> +            interrupt-parent = <&core_intc>;
>>> +            clocks = <&timer0_clk>;
>>> +    };
>>> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>>> new file mode 100644
>>> index 000000000000..4886192ce2f2
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>>> @@ -0,0 +1,17 @@
>>> +Synopsys ARC Free Running Local 32-bit Timer
>>> +- Found on all ARC CPUs (ARC700/ARCHS)
>>> +- Mandatory clocksource provider on ARC700
>>> +- Optional clocksource provider on UP ARC HS CPUs
>>> +  (and if better timer archs-rtc not available in SoC)
>>> +
>>> +Required properties:
>>> +
>>> +- compatible : should be "snps,arc-timer1"
>>> +- clocks     : phandle to the source clock
>>
>> No interrupt because it doesn't have one or you use this as a
>> clocksource and don't need it?
>
> Latter !

Then you should have the interrupt in the DT anyway.

Rob

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Rob Herring]

On Wed, Feb 3, 2016 at 2:04 AM, Vineet Gupta <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> wrote:
> Hi Rob,
>
> On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
>> On Tue, Feb 02, 2016 at 04:28:52PM +0530, Vineet Gupta wrote:
>>> +Required properties:
>>> +
>>> +- compatible : should be "snps,arc-timer0"
>>
>> timer0 and timer1 are different h/w blocks, not just different
>> instances?
>
> Functionality wise they are identical (only the address of aux regs used to
> program them are different). Either can be configured to interrupt-on-limit or
> free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
> uses timer0 for tick handling, timer1 for gtod.
>
> Do you prefer they not be differentiated as timer0 and timer1 ?
>
> So we have
>
> CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
> CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
>
> I don't know how to achieve above, by keeping the DT names the same.

You just need a single CLOCKSOURCE_OF_DECLARE which will be called
twice. On the first call, setup one timer and on the 2nd call setup
the other one. IIRC the sp804 timer has something similar.

You'll need a unit address in the node name to distinguish them.

>
>>
>>> +- interrupts : single Interrupt going into parent intc
>>> +           (16 for ARCHS cores, 3 for ARC700 cores)
>>> +- clocks     : phandle to the source clock
>>> +
>>> +Optional properties:
>>> +
>>> +- interrupt-parent : phandle to parent intc
>>> +
>>> +Example:
>>> +
>>> +    timer0: timer_clkevt {
>>
>> just "timer" for node name. clkevt is a Linuxism.
>
> OK. So to document that this is for clockevent, change the label ?

That shouldn't be documented in the DT at all.

>
> timer_clkevent: timer {
>
>>
>>> +            compatible = "snps,arc-timer0";
>>> +            interrupts = <3>;
>>> +            interrupt-parent = <&core_intc>;
>>> +            clocks = <&timer0_clk>;
>>> +    };
>>> diff --git a/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>>> new file mode 100644
>>> index 000000000000..4886192ce2f2
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/timer/snps,arc-timer1.txt
>>> @@ -0,0 +1,17 @@
>>> +Synopsys ARC Free Running Local 32-bit Timer
>>> +- Found on all ARC CPUs (ARC700/ARCHS)
>>> +- Mandatory clocksource provider on ARC700
>>> +- Optional clocksource provider on UP ARC HS CPUs
>>> +  (and if better timer archs-rtc not available in SoC)
>>> +
>>> +Required properties:
>>> +
>>> +- compatible : should be "snps,arc-timer1"
>>> +- clocks     : phandle to the source clock
>>
>> No interrupt because it doesn't have one or you use this as a
>> clocksource and don't need it?
>
> Latter !

Then you should have the interrupt in the DT anyway.

Rob
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Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

On Wednesday 03 February 2016 09:09 PM, Rob Herring wrote:
> On Wed, Feb 3, 2016 at 2:04 AM, Vineet Gupta <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> wrote:
>> Hi Rob,
>>
>> On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
>>> On Tue, Feb 02, 2016 at 04:28:52PM +0530, Vineet Gupta wrote:
>>>> +Required properties:
>>>> +
>>>> +- compatible : should be "snps,arc-timer0"
>>>
>>> timer0 and timer1 are different h/w blocks, not just different
>>> instances?
>>
>> Functionality wise they are identical (only the address of aux regs used to
>> program them are different). Either can be configured to interrupt-on-limit or
>> free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
>> uses timer0 for tick handling, timer1 for gtod.
>>
>> Do you prefer they not be differentiated as timer0 and timer1 ?
>>
>> So we have
>>
>> CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
>> CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
>>
>> I don't know how to achieve above, by keeping the DT names the same.
> 
> You just need a single CLOCKSOURCE_OF_DECLARE which will be called
> twice. On the first call, setup one timer and on the 2nd call setup
> the other one. IIRC the sp804 timer has something similar.
> 
> You'll need a unit address in the node name to distinguish them.

So this is just to distinguish them in DT, but the callback uses a static counter
to do 1st vs. 2nd (and this unit address is not really exposed to code) - correct ?

[PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

On Wednesday 03 February 2016 09:09 PM, Rob Herring wrote:
> On Wed, Feb 3, 2016@2:04 AM, Vineet Gupta <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> wrote:
>> Hi Rob,
>>
>> On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
>>> On Tue, Feb 02, 2016@04:28:52PM +0530, Vineet Gupta wrote:
>>>> +Required properties:
>>>> +
>>>> +- compatible : should be "snps,arc-timer0"
>>>
>>> timer0 and timer1 are different h/w blocks, not just different
>>> instances?
>>
>> Functionality wise they are identical (only the address of aux regs used to
>> program them are different). Either can be configured to interrupt-on-limit or
>> free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
>> uses timer0 for tick handling, timer1 for gtod.
>>
>> Do you prefer they not be differentiated as timer0 and timer1 ?
>>
>> So we have
>>
>> CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
>> CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
>>
>> I don't know how to achieve above, by keeping the DT names the same.
> 
> You just need a single CLOCKSOURCE_OF_DECLARE which will be called
> twice. On the first call, setup one timer and on the 2nd call setup
> the other one. IIRC the sp804 timer has something similar.
> 
> You'll need a unit address in the node name to distinguish them.

So this is just to distinguish them in DT, but the callback uses a static counter
to do 1st vs. 2nd (and this unit address is not really exposed to code) - correct ?

Re: [PATCH 2/9] ARC: [dts] Introduce Timer bindings

[Vineet Gupta]

On Wednesday 03 February 2016 09:09 PM, Rob Herring wrote:
> On Wed, Feb 3, 2016 at 2:04 AM, Vineet Gupta <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> wrote:
>> Hi Rob,
>>
>> On Wednesday 03 February 2016 03:33 AM, Rob Herring wrote:
>>> On Tue, Feb 02, 2016 at 04:28:52PM +0530, Vineet Gupta wrote:
>>>> +Required properties:
>>>> +
>>>> +- compatible : should be "snps,arc-timer0"
>>>
>>> timer0 and timer1 are different h/w blocks, not just different
>>> instances?
>>
>> Functionality wise they are identical (only the address of aux regs used to
>> program them are different). Either can be configured to interrupt-on-limit or
>> free-run-and-wrap-around. So we can indeed consider them 2 instances. ARC Linux
>> uses timer0 for tick handling, timer1 for gtod.
>>
>> Do you prefer they not be differentiated as timer0 and timer1 ?
>>
>> So we have
>>
>> CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
>> CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
>>
>> I don't know how to achieve above, by keeping the DT names the same.
> 
> You just need a single CLOCKSOURCE_OF_DECLARE which will be called
> twice. On the first call, setup one timer and on the 2nd call setup
> the other one. IIRC the sp804 timer has something similar.
> 
> You'll need a unit address in the node name to distinguish them.

So this is just to distinguish them in DT, but the callback uses a static counter
to do 1st vs. 2nd (and this unit address is not really exposed to code) - correct ?


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[PATCH 3/9] ARC: clockevent: switch to cpu notifier for clockevent setup

[Vineet Gupta]

From: Noam Camus <noamc@ezchip.com>

ARC Timers so far have been handled as "legacy" w/o explicit description
in DT. This poses challenge for newer platforms wanting to use them.
This series will eventually help move timers over to DT.

This patch does a small change of using a CPU notifier to set clockevent
on non-boot CPUs. So explicit setup is done only on boot CPU (which will
later be done by DT)

This also helps
 - wean away from arc_request_percpu_irq() which has a design flaw as
   noted in c6317bc7c5ab
   ("ARCv2: perf: Ensure perf intr gets enabled on all cores")
 - Remove exposing timer function to smp.c

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Noam Camus <noamc@ezchip.com>
[vgupta: broken off from a bigger patch]
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/include/asm/irq.h |  1 -
 arch/arc/kernel/smp.c      |  2 --
 arch/arc/kernel/time.c     | 48 ++++++++++++++++++++++++++++++++++++++--------
 3 files changed, 40 insertions(+), 11 deletions(-)

diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h
index 4fd7d62a6e30..0c86f0787bcd 100644
--- a/arch/arc/include/asm/irq.h
+++ b/arch/arc/include/asm/irq.h
@@ -27,7 +27,6 @@
 #include <asm-generic/irq.h>
 
 extern void arc_init_IRQ(void);
-void arc_local_timer_setup(void);
 void arc_request_percpu_irq(int irq, int cpu,
                             irqreturn_t (*isr)(int irq, void *dev),
                             const char *irq_nm, void *percpu_dev);
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
index ef6e9e15b82a..ea790f1c1107 100644
--- a/arch/arc/kernel/smp.c
+++ b/arch/arc/kernel/smp.c
@@ -138,8 +138,6 @@ void start_kernel_secondary(void)
 	if (machine_desc->init_per_cpu)
 		machine_desc->init_per_cpu(cpu);
 
-	arc_local_timer_setup();
-
 	local_irq_enable();
 	preempt_disable();
 	cpu_startup_entry(CPUHP_ONLINE);
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 156d9833ff84..bdfc621d5d85 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -183,6 +183,8 @@ static struct clocksource arc_counter = {
 
 /********** Clock Event Device *********/
 
+static int arc_timer_irq = TIMER0_IRQ;
+
 /*
  * Arm the timer to interrupt after @cycles
  * The distinction for oneshot/periodic is done in arc_event_timer_ack() below
@@ -244,21 +246,52 @@ static irqreturn_t timer_irq_handler(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+static int arc_timer_cpu_notify(struct notifier_block *self,
+				unsigned long action, void *hcpu)
+{
+	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
+
+	evt->cpumask = cpumask_of(smp_processor_id());
+
+	switch (action & ~CPU_TASKS_FROZEN) {
+	case CPU_STARTING:
+		clockevents_config_and_register(evt, arc_get_core_freq(),
+						0, ULONG_MAX);
+		enable_percpu_irq(arc_timer_irq, 0);
+		break;
+	case CPU_DYING:
+		disable_percpu_irq(arc_timer_irq);
+		break;
+	}
+
+	return NOTIFY_OK;
+}
+
+static struct notifier_block nps_timer_cpu_nb = {
+	.notifier_call = arc_timer_cpu_notify,
+};
+
 /*
- * Setup the local event timer for @cpu
+ * clockevent setup for boot CPU
  */
-void arc_local_timer_setup()
+static void __init arc_clockevent_setup()
 {
 	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
-	int cpu = smp_processor_id();
 
-	evt->cpumask = cpumask_of(cpu);
+	register_cpu_notifier(&arc_timer_cpu_nb);
+
+	evt->cpumask = cpumask_of(smp_processor_id());
 	clockevents_config_and_register(evt, arc_get_core_freq(),
 					0, ARC_TIMER_MAX);
 
 	/* setup the per-cpu timer IRQ handler - for all cpus */
-	arc_request_percpu_irq(TIMER0_IRQ, cpu, timer_irq_handler,
-			       "Timer0 (per-cpu-tick)", evt);
+	request_percpu_irq(arc_timer_irq, timer_irq_handler,
+			   "Timer0 (per-cpu-tick)", evt);
+
+	enable_percpu_irq(arc_timer_irq, 0);
+
+	if (ret)
+		pr_err("Unable to register interrupt\n");
 }
 
 /*
@@ -283,6 +316,5 @@ void __init time_init(void)
 		 */
 		clocksource_register_hz(&arc_counter, arc_get_core_freq());
 
-	/* sets up the periodic event timer */
-	arc_local_timer_setup();
+	arc_clockevent_setup();
 }
-- 
2.5.0

[PATCH 3/9] ARC: clockevent: switch to cpu notifier for clockevent setup

[Vineet Gupta]

From: Noam Camus <noamc@ezchip.com>

ARC Timers so far have been handled as "legacy" w/o explicit description
in DT. This poses challenge for newer platforms wanting to use them.
This series will eventually help move timers over to DT.

This patch does a small change of using a CPU notifier to set clockevent
on non-boot CPUs. So explicit setup is done only on boot CPU (which will
later be done by DT)

This also helps
 - wean away from arc_request_percpu_irq() which has a design flaw as
   noted in c6317bc7c5ab
   ("ARCv2: perf: Ensure perf intr gets enabled on all cores")
 - Remove exposing timer function to smp.c

Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
Signed-off-by: Noam Camus <noamc at ezchip.com>
[vgupta: broken off from a bigger patch]
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>

Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/include/asm/irq.h |  1 -
 arch/arc/kernel/smp.c      |  2 --
 arch/arc/kernel/time.c     | 48 ++++++++++++++++++++++++++++++++++++++--------
 3 files changed, 40 insertions(+), 11 deletions(-)

diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h
index 4fd7d62a6e30..0c86f0787bcd 100644
--- a/arch/arc/include/asm/irq.h
+++ b/arch/arc/include/asm/irq.h
@@ -27,7 +27,6 @@
 #include <asm-generic/irq.h>
 
 extern void arc_init_IRQ(void);
-void arc_local_timer_setup(void);
 void arc_request_percpu_irq(int irq, int cpu,
                             irqreturn_t (*isr)(int irq, void *dev),
                             const char *irq_nm, void *percpu_dev);
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
index ef6e9e15b82a..ea790f1c1107 100644
--- a/arch/arc/kernel/smp.c
+++ b/arch/arc/kernel/smp.c
@@ -138,8 +138,6 @@ void start_kernel_secondary(void)
 	if (machine_desc->init_per_cpu)
 		machine_desc->init_per_cpu(cpu);
 
-	arc_local_timer_setup();
-
 	local_irq_enable();
 	preempt_disable();
 	cpu_startup_entry(CPUHP_ONLINE);
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 156d9833ff84..bdfc621d5d85 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -183,6 +183,8 @@ static struct clocksource arc_counter = {
 
 /********** Clock Event Device *********/
 
+static int arc_timer_irq = TIMER0_IRQ;
+
 /*
  * Arm the timer to interrupt after @cycles
  * The distinction for oneshot/periodic is done in arc_event_timer_ack() below
@@ -244,21 +246,52 @@ static irqreturn_t timer_irq_handler(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
+static int arc_timer_cpu_notify(struct notifier_block *self,
+				unsigned long action, void *hcpu)
+{
+	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
+
+	evt->cpumask = cpumask_of(smp_processor_id());
+
+	switch (action & ~CPU_TASKS_FROZEN) {
+	case CPU_STARTING:
+		clockevents_config_and_register(evt, arc_get_core_freq(),
+						0, ULONG_MAX);
+		enable_percpu_irq(arc_timer_irq, 0);
+		break;
+	case CPU_DYING:
+		disable_percpu_irq(arc_timer_irq);
+		break;
+	}
+
+	return NOTIFY_OK;
+}
+
+static struct notifier_block nps_timer_cpu_nb = {
+	.notifier_call = arc_timer_cpu_notify,
+};
+
 /*
- * Setup the local event timer for @cpu
+ * clockevent setup for boot CPU
  */
-void arc_local_timer_setup()
+static void __init arc_clockevent_setup()
 {
 	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
-	int cpu = smp_processor_id();
 
-	evt->cpumask = cpumask_of(cpu);
+	register_cpu_notifier(&arc_timer_cpu_nb);
+
+	evt->cpumask = cpumask_of(smp_processor_id());
 	clockevents_config_and_register(evt, arc_get_core_freq(),
 					0, ARC_TIMER_MAX);
 
 	/* setup the per-cpu timer IRQ handler - for all cpus */
-	arc_request_percpu_irq(TIMER0_IRQ, cpu, timer_irq_handler,
-			       "Timer0 (per-cpu-tick)", evt);
+	request_percpu_irq(arc_timer_irq, timer_irq_handler,
+			   "Timer0 (per-cpu-tick)", evt);
+
+	enable_percpu_irq(arc_timer_irq, 0);
+
+	if (ret)
+		pr_err("Unable to register interrupt\n");
 }
 
 /*
@@ -283,6 +316,5 @@ void __init time_init(void)
 		 */
 		clocksource_register_hz(&arc_counter, arc_get_core_freq());
 
-	/* sets up the periodic event timer */
-	arc_local_timer_setup();
+	arc_clockevent_setup();
 }
-- 
2.5.0

[PATCH 4/9] ARC: clockevent: Prepare for DT based probe

[Vineet Gupta]

From: Noam Camus <noamc@ezchip.com>

 - call clocksource_probe()
 - This in turns needs of_clk_init() to be called earlier

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Noam Camus <noamc@ezchip.com>
[vgupta: broken off from a bigger patch]
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/Kconfig        | 3 ++-
 arch/arc/kernel/setup.c | 1 -
 arch/arc/kernel/time.c  | 4 ++++
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index bb15e8062b1f..0faf954c860c 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -10,8 +10,9 @@ config ARC
 	def_bool y
 	select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
 	select BUILDTIME_EXTABLE_SORT
-	select COMMON_CLK
+	select CLKSRC_OF
 	select CLONE_BACKWARDS
+	select COMMON_CLK
 	# ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
 	select DEVTMPFS if !INITRAMFS_SOURCE=""
 	select GENERIC_ATOMIC64
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 7f0a3cb300a8..8129c8e8f20b 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -438,7 +438,6 @@ void __init setup_arch(char **cmdline_p)
 
 static int __init customize_machine(void)
 {
-	of_clk_init(NULL);
 	/*
 	 * Traverses flattened DeviceTree - registering platform devices
 	 * (if any) complete with their resources
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index bdfc621d5d85..1f5a6fe03bcc 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -38,6 +38,7 @@
 #include <linux/init.h>
 #include <linux/timex.h>
 #include <linux/profile.h>
+#include <linux/clk-provider.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <asm/irq.h>
@@ -305,6 +306,9 @@ static void __init arc_clockevent_setup()
  */
 void __init time_init(void)
 {
+	of_clk_init(NULL);
+	clocksource_probe();
+
 	/*
 	 * sets up the timekeeping free-flowing counter which also returns
 	 * whether the counter is usable as clocksource
-- 
2.5.0

[PATCH 4/9] ARC: clockevent: Prepare for DT based probe

[Vineet Gupta]

From: Noam Camus <noamc@ezchip.com>

 - call clocksource_probe()
 - This in turns needs of_clk_init() to be called earlier

Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
Signed-off-by: Noam Camus <noamc at ezchip.com>
[vgupta: broken off from a bigger patch]
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>

Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/Kconfig        | 3 ++-
 arch/arc/kernel/setup.c | 1 -
 arch/arc/kernel/time.c  | 4 ++++
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index bb15e8062b1f..0faf954c860c 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -10,8 +10,9 @@ config ARC
 	def_bool y
 	select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
 	select BUILDTIME_EXTABLE_SORT
-	select COMMON_CLK
+	select CLKSRC_OF
 	select CLONE_BACKWARDS
+	select COMMON_CLK
 	# ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
 	select DEVTMPFS if !INITRAMFS_SOURCE=""
 	select GENERIC_ATOMIC64
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 7f0a3cb300a8..8129c8e8f20b 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -438,7 +438,6 @@ void __init setup_arch(char **cmdline_p)
 
 static int __init customize_machine(void)
 {
-	of_clk_init(NULL);
 	/*
 	 * Traverses flattened DeviceTree - registering platform devices
 	 * (if any) complete with their resources
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index bdfc621d5d85..1f5a6fe03bcc 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -38,6 +38,7 @@
 #include <linux/init.h>
 #include <linux/timex.h>
 #include <linux/profile.h>
+#include <linux/clk-provider.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <asm/irq.h>
@@ -305,6 +306,9 @@ static void __init arc_clockevent_setup()
  */
 void __init time_init(void)
 {
+	of_clk_init(NULL);
+	clocksource_probe();
+
 	/*
 	 * sets up the timekeeping free-flowing counter which also returns
 	 * whether the counter is usable as clocksource
-- 
2.5.0

[PATCH 5/9] ARC: clockevent: DT based probe

[Vineet Gupta]

 - timer frequency is derived from DT (no longer rely on top level
   DT "clock-frequency" probed early and exported by asm/clk.h)

 - TIMER0_IRQ need not be exported across arch code, confided to intc as
   it is property of same

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/include/asm/irq.h     |  4 ---
 arch/arc/kernel/intc-compact.c |  2 ++
 arch/arc/kernel/time.c         | 67 ++++++++++++++++++++++++++----------------
 3 files changed, 44 insertions(+), 29 deletions(-)

diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h
index 0c86f0787bcd..44b6ea85e8fb 100644
--- a/arch/arc/include/asm/irq.h
+++ b/arch/arc/include/asm/irq.h
@@ -14,12 +14,8 @@
 
 /* Platform Independent IRQs */
 #ifdef CONFIG_ISA_ARCOMPACT
-#define TIMER0_IRQ      3
-#define TIMER1_IRQ      4
 #define IPI_IRQ		(NR_CPU_IRQS-1) /* dummy to enable SMP build for up hardware */
 #else
-#define TIMER0_IRQ      16
-#define TIMER1_IRQ      17
 #define IPI_IRQ         19
 #endif
 
diff --git a/arch/arc/kernel/intc-compact.c b/arch/arc/kernel/intc-compact.c
index 06bcedf19b62..5d390958d233 100644
--- a/arch/arc/kernel/intc-compact.c
+++ b/arch/arc/kernel/intc-compact.c
@@ -14,6 +14,8 @@
 #include <linux/irqchip.h>
 #include <asm/irq.h>
 
+#define TIMER0_IRQ	3	/* Fixed by ISA */
+
 /*
  * Early Hardware specific Interrupt setup
  * -Platform independent, needed for each CPU (not foldable into init_IRQ)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 1f5a6fe03bcc..43ef22853473 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -29,22 +29,16 @@
  * which however is currently broken
  */
 
-#include <linux/spinlock.h>
 #include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/init.h>
-#include <linux/timex.h>
-#include <linux/profile.h>
 #include <linux/clk-provider.h>
+#include <linux/clk.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 #include <asm/irq.h>
 #include <asm/arcregs.h>
-#include <asm/clk.h>
-#include <asm/mach_desc.h>
 
 #include <asm/mcip.h>
 
@@ -61,6 +55,24 @@
 
 #define ARC_TIMER_MAX	0xFFFFFFFF
 
+static unsigned long arc_timer_freq;
+
+static void noinline arc_get_timer_clk(struct device_node *node)
+{
+	struct clk *clk;
+	int ret;
+
+	clk = of_clk_get(node, 0);
+	if (IS_ERR(clk))
+		panic("Can't get timer clock");
+
+	ret = clk_prepare_enable(clk);
+	if (ret)
+		pr_err("Couldn't enable parent clock\n");
+
+	arc_timer_freq = clk_get_rate(clk);
+}
+
 /********** Clock Source Device *********/
 
 #ifdef CONFIG_ARC_HAS_GFRC
@@ -184,7 +196,7 @@ static struct clocksource arc_counter = {
 
 /********** Clock Event Device *********/
 
-static int arc_timer_irq = TIMER0_IRQ;
+static int arc_timer_irq;
 
 /*
  * Arm the timer to interrupt after @cycles
@@ -212,7 +224,7 @@ static int arc_clkevent_set_periodic(struct clock_event_device *dev)
 	 * At X Hz, 1 sec = 1000ms -> X cycles;
 	 *		      10ms -> X / 100 cycles
 	 */
-	arc_timer_event_setup(arc_get_core_freq() / HZ);
+	arc_timer_event_setup(arc_timer_freq / HZ);
 	return 0;
 }
 
@@ -221,7 +233,6 @@ static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = {
 	.features		= CLOCK_EVT_FEAT_ONESHOT |
 				  CLOCK_EVT_FEAT_PERIODIC,
 	.rating			= 300,
-	.irq			= TIMER0_IRQ,	/* hardwired, no need for resources */
 	.set_next_event		= arc_clkevent_set_next_event,
 	.set_state_periodic	= arc_clkevent_set_periodic,
 };
@@ -256,7 +267,7 @@ static int arc_timer_cpu_notify(struct notifier_block *self,
 
 	switch (action & ~CPU_TASKS_FROZEN) {
 	case CPU_STARTING:
-		clockevents_config_and_register(evt, arc_get_core_freq(),
+		clockevents_config_and_register(evt, arc_timer_freq,
 						0, ULONG_MAX);
 		enable_percpu_irq(arc_timer_irq, 0);
 		break;
@@ -268,32 +279,41 @@ static int arc_timer_cpu_notify(struct notifier_block *self,
 	return NOTIFY_OK;
 }
 
-static struct notifier_block nps_timer_cpu_nb = {
+static struct notifier_block arc_timer_cpu_nb = {
 	.notifier_call = arc_timer_cpu_notify,
 };
 
 /*
  * clockevent setup for boot CPU
  */
-static void __init arc_clockevent_setup()
+static void __init arc_clockevent_setup(struct device_node *node)
 {
 	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
+	int ret;
 
 	register_cpu_notifier(&arc_timer_cpu_nb);
 
+	arc_timer_irq = irq_of_parse_and_map(node, 0);
+	if (arc_timer_irq <= 0)
+		panic("Can't parse IRQ");
+
+	arc_get_timer_clk(node);
+
+	evt->irq = arc_timer_irq;
 	evt->cpumask = cpumask_of(smp_processor_id());
-	clockevents_config_and_register(evt, arc_get_core_freq(),
+	clockevents_config_and_register(evt, arc_timer_freq,
 					0, ARC_TIMER_MAX);
 
 	/* setup the per-cpu timer IRQ handler - for all cpus */
-	request_percpu_irq(arc_timer_irq, timer_irq_handler,
-			   "Timer0 (per-cpu-tick)", evt);
+	ret = request_percpu_irq(arc_timer_irq, timer_irq_handler,
+				 "Timer0 (per-cpu-tick)", evt);
+	if (ret)
+		pr_err("Unable to register interrupt\n");
 
 	enable_percpu_irq(arc_timer_irq, 0);
 
-	if (ret)
-		pr_err("Unable to register interrupt\n");
 }
+CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
 
 /*
  * Called from start_kernel() - boot CPU only
@@ -302,7 +322,6 @@ static void __init arc_clockevent_setup()
  * -Also sets up any global state needed for timer subsystem:
  *    - for "counting" timer, registers a clocksource, usable across CPUs
  *      (provided that underlying counter h/w is synchronized across cores)
- *    - for "event" timer, sets up TIMER0 IRQ (as that is platform agnostic)
  */
 void __init time_init(void)
 {
@@ -318,7 +337,5 @@ void __init time_init(void)
 		 * CLK upto 4.29 GHz can be safely represented in 32 bits
 		 * because Max 32 bit number is 4,294,967,295
 		 */
-		clocksource_register_hz(&arc_counter, arc_get_core_freq());
-
-	arc_clockevent_setup();
+		clocksource_register_hz(&arc_counter, arc_timer_freq);
 }
-- 
2.5.0

[PATCH 5/9] ARC: clockevent: DT based probe

[Vineet Gupta]

 - timer frequency is derived from DT (no longer rely on top level
   DT "clock-frequency" probed early and exported by asm/clk.h)

 - TIMER0_IRQ need not be exported across arch code, confided to intc as
   it is property of same

Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/include/asm/irq.h     |  4 ---
 arch/arc/kernel/intc-compact.c |  2 ++
 arch/arc/kernel/time.c         | 67 ++++++++++++++++++++++++++----------------
 3 files changed, 44 insertions(+), 29 deletions(-)

diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h
index 0c86f0787bcd..44b6ea85e8fb 100644
--- a/arch/arc/include/asm/irq.h
+++ b/arch/arc/include/asm/irq.h
@@ -14,12 +14,8 @@
 
 /* Platform Independent IRQs */
 #ifdef CONFIG_ISA_ARCOMPACT
-#define TIMER0_IRQ      3
-#define TIMER1_IRQ      4
 #define IPI_IRQ		(NR_CPU_IRQS-1) /* dummy to enable SMP build for up hardware */
 #else
-#define TIMER0_IRQ      16
-#define TIMER1_IRQ      17
 #define IPI_IRQ         19
 #endif
 
diff --git a/arch/arc/kernel/intc-compact.c b/arch/arc/kernel/intc-compact.c
index 06bcedf19b62..5d390958d233 100644
--- a/arch/arc/kernel/intc-compact.c
+++ b/arch/arc/kernel/intc-compact.c
@@ -14,6 +14,8 @@
 #include <linux/irqchip.h>
 #include <asm/irq.h>
 
+#define TIMER0_IRQ	3	/* Fixed by ISA */
+
 /*
  * Early Hardware specific Interrupt setup
  * -Platform independent, needed for each CPU (not foldable into init_IRQ)
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 1f5a6fe03bcc..43ef22853473 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -29,22 +29,16 @@
  * which however is currently broken
  */
 
-#include <linux/spinlock.h>
 #include <linux/interrupt.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/time.h>
-#include <linux/init.h>
-#include <linux/timex.h>
-#include <linux/profile.h>
 #include <linux/clk-provider.h>
+#include <linux/clk.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 #include <asm/irq.h>
 #include <asm/arcregs.h>
-#include <asm/clk.h>
-#include <asm/mach_desc.h>
 
 #include <asm/mcip.h>
 
@@ -61,6 +55,24 @@
 
 #define ARC_TIMER_MAX	0xFFFFFFFF
 
+static unsigned long arc_timer_freq;
+
+static void noinline arc_get_timer_clk(struct device_node *node)
+{
+	struct clk *clk;
+	int ret;
+
+	clk = of_clk_get(node, 0);
+	if (IS_ERR(clk))
+		panic("Can't get timer clock");
+
+	ret = clk_prepare_enable(clk);
+	if (ret)
+		pr_err("Couldn't enable parent clock\n");
+
+	arc_timer_freq = clk_get_rate(clk);
+}
+
 /********** Clock Source Device *********/
 
 #ifdef CONFIG_ARC_HAS_GFRC
@@ -184,7 +196,7 @@ static struct clocksource arc_counter = {
 
 /********** Clock Event Device *********/
 
-static int arc_timer_irq = TIMER0_IRQ;
+static int arc_timer_irq;
 
 /*
  * Arm the timer to interrupt after @cycles
@@ -212,7 +224,7 @@ static int arc_clkevent_set_periodic(struct clock_event_device *dev)
 	 * At X Hz, 1 sec = 1000ms -> X cycles;
 	 *		      10ms -> X / 100 cycles
 	 */
-	arc_timer_event_setup(arc_get_core_freq() / HZ);
+	arc_timer_event_setup(arc_timer_freq / HZ);
 	return 0;
 }
 
@@ -221,7 +233,6 @@ static DEFINE_PER_CPU(struct clock_event_device, arc_clockevent_device) = {
 	.features		= CLOCK_EVT_FEAT_ONESHOT |
 				  CLOCK_EVT_FEAT_PERIODIC,
 	.rating			= 300,
-	.irq			= TIMER0_IRQ,	/* hardwired, no need for resources */
 	.set_next_event		= arc_clkevent_set_next_event,
 	.set_state_periodic	= arc_clkevent_set_periodic,
 };
@@ -256,7 +267,7 @@ static int arc_timer_cpu_notify(struct notifier_block *self,
 
 	switch (action & ~CPU_TASKS_FROZEN) {
 	case CPU_STARTING:
-		clockevents_config_and_register(evt, arc_get_core_freq(),
+		clockevents_config_and_register(evt, arc_timer_freq,
 						0, ULONG_MAX);
 		enable_percpu_irq(arc_timer_irq, 0);
 		break;
@@ -268,32 +279,41 @@ static int arc_timer_cpu_notify(struct notifier_block *self,
 	return NOTIFY_OK;
 }
 
-static struct notifier_block nps_timer_cpu_nb = {
+static struct notifier_block arc_timer_cpu_nb = {
 	.notifier_call = arc_timer_cpu_notify,
 };
 
 /*
  * clockevent setup for boot CPU
  */
-static void __init arc_clockevent_setup()
+static void __init arc_clockevent_setup(struct device_node *node)
 {
 	struct clock_event_device *evt = this_cpu_ptr(&arc_clockevent_device);
+	int ret;
 
 	register_cpu_notifier(&arc_timer_cpu_nb);
 
+	arc_timer_irq = irq_of_parse_and_map(node, 0);
+	if (arc_timer_irq <= 0)
+		panic("Can't parse IRQ");
+
+	arc_get_timer_clk(node);
+
+	evt->irq = arc_timer_irq;
 	evt->cpumask = cpumask_of(smp_processor_id());
-	clockevents_config_and_register(evt, arc_get_core_freq(),
+	clockevents_config_and_register(evt, arc_timer_freq,
 					0, ARC_TIMER_MAX);
 
 	/* setup the per-cpu timer IRQ handler - for all cpus */
-	request_percpu_irq(arc_timer_irq, timer_irq_handler,
-			   "Timer0 (per-cpu-tick)", evt);
+	ret = request_percpu_irq(arc_timer_irq, timer_irq_handler,
+				 "Timer0 (per-cpu-tick)", evt);
+	if (ret)
+		pr_err("Unable to register interrupt\n");
 
 	enable_percpu_irq(arc_timer_irq, 0);
 
-	if (ret)
-		pr_err("Unable to register interrupt\n");
 }
+CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
 
 /*
  * Called from start_kernel() - boot CPU only
@@ -302,7 +322,6 @@ static void __init arc_clockevent_setup()
  * -Also sets up any global state needed for timer subsystem:
  *    - for "counting" timer, registers a clocksource, usable across CPUs
  *      (provided that underlying counter h/w is synchronized across cores)
- *    - for "event" timer, sets up TIMER0 IRQ (as that is platform agnostic)
  */
 void __init time_init(void)
 {
@@ -318,7 +337,5 @@ void __init time_init(void)
 		 * CLK upto 4.29 GHz can be safely represented in 32 bits
 		 * because Max 32 bit number is 4,294,967,295
 		 */
-		clocksource_register_hz(&arc_counter, arc_get_core_freq());
-
-	arc_clockevent_setup();
+		clocksource_register_hz(&arc_counter, arc_timer_freq);
 }
-- 
2.5.0

[PATCH 6/9] ARC: clocksource: DT based probe

[Vineet Gupta]

- Remove explicit clocksource setup and let it be done by OF framework
  by defining CLOCKSOURCE_OF_DECLARE() for various timers

- This allows multiple clocksources to be potentially registered
  simultaneouly: previously we could only do one - as all of them had
  same arc_counter_setup() routine for registration

- Setup routines also ensure that the underlying timer actually exists.

- Remove some of the panic() calls if underlying timer is NOT detcted as
  a fallback clocksource might still be available
  1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
  2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
     always present)

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/kernel/mcip.c  |   4 +-
 arch/arc/kernel/setup.c |   3 --
 arch/arc/kernel/time.c  | 111 +++++++++++++++++++++++++-----------------------
 3 files changed, 60 insertions(+), 58 deletions(-)

diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index bc771f58fefb..79c09d20c905 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -118,15 +118,13 @@ static void mcip_probe_n_setup(void)
 		IS_AVAIL1(mp.dbg, "DEBUG "),
 		IS_AVAIL1(mp.gfrc, "GFRC"));
 
+	cpuinfo_arc700[0].extn.gfrc = mp.gfrc;
 	idu_detected = mp.idu;
 
 	if (mp.dbg) {
 		__mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, 0xf);
 		__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
 	}
-
-	if (IS_ENABLED(CONFIG_ARC_HAS_GFRC) && !mp.gfrc)
-		panic("kernel trying to use non-existent GFRC\n");
 }
 
 struct plat_smp_ops plat_smp_ops = {
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 8129c8e8f20b..953068e9c9e1 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -304,9 +304,6 @@ static void arc_chk_core_config(void)
 	if (!cpu->extn.timer1)
 		panic("Timer1 is not present!\n");
 
-	if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->extn.rtc)
-		panic("RTC is not present\n");
-
 #ifdef CONFIG_ARC_HAS_DCCM
 	/*
 	 * DCCM can be arbit placed in hardware.
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 43ef22853473..0987de53ed95 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -77,12 +77,7 @@ static void noinline arc_get_timer_clk(struct device_node *node)
 
 #ifdef CONFIG_ARC_HAS_GFRC
 
-static int arc_counter_setup(void)
-{
-	return 1;
-}
-
-static cycle_t arc_counter_read(struct clocksource *cs)
+static cycle_t arc_read_gfrc(struct clocksource *cs)
 {
 	unsigned long flags;
 	union {
@@ -107,15 +102,28 @@ static cycle_t arc_counter_read(struct clocksource *cs)
 	return stamp.full;
 }
 
-static struct clocksource arc_counter = {
+static struct clocksource arc_counter_gfrc = {
 	.name   = "ARConnect GFRC",
 	.rating = 400,
-	.read   = arc_counter_read,
+	.read   = arc_read_gfrc,
 	.mask   = CLOCKSOURCE_MASK(64),
 	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-#else
+static void __init arc_cs_setup_gfrc(struct device_node *node)
+{
+	int exists = cpuinfo_arc700[0].extn.gfrc;
+
+	if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
+		return;
+
+	arc_get_timer_clk(node);
+
+	clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
+}
+CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
+
+#endif
 
 #ifdef CONFIG_ARC_HAS_RTC
 
@@ -123,15 +131,7 @@ static struct clocksource arc_counter = {
 #define AUX_RTC_LOW	0x104
 #define AUX_RTC_HIGH	0x105
 
-int arc_counter_setup(void)
-{
-	write_aux_reg(AUX_RTC_CTRL, 1);
-
-	/* Not usable in SMP */
-	return !IS_ENABLED(CONFIG_SMP);
-}
-
-static cycle_t arc_counter_read(struct clocksource *cs)
+static cycle_t arc_read_rtc(struct clocksource *cs)
 {
 	unsigned long status;
 	union {
@@ -155,44 +155,67 @@ static cycle_t arc_counter_read(struct clocksource *cs)
 	return stamp.full;
 }
 
-static struct clocksource arc_counter = {
+static struct clocksource arc_counter_rtc = {
 	.name   = "ARCv2 RTC",
 	.rating = 350,
-	.read   = arc_counter_read,
+	.read   = arc_read_rtc,
 	.mask   = CLOCKSOURCE_MASK(64),
 	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-#else /* !CONFIG_ARC_HAS_RTC */
-
-/*
- * set 32bit TIMER1 to keep counting monotonically and wraparound
- */
-int arc_counter_setup(void)
+static void __init arc_cs_setup_rtc(struct device_node *node)
 {
-	write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
-	write_aux_reg(ARC_REG_TIMER1_CNT, 0);
-	write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
+	int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
+
+	if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
+		return;
+
+	/* Local to CPU hence not usable in SMP */
+	if (WARN(IS_ENABLED(CONFIG_SMP), "Local-64-bit-Ctr not usable in SMP"))
+		return;
 
-	/* Not usable in SMP */
-	return !IS_ENABLED(CONFIG_SMP);
+	arc_get_timer_clk(node);
+
+	write_aux_reg(AUX_RTC_CTRL, 1);
+
+	clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
 }
+CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
+
+#endif
 
-static cycle_t arc_counter_read(struct clocksource *cs)
+/*
+ * 32bit TIMER1 to keep counting monotonically and wraparound
+ */
+
+static cycle_t arc_read_timer1(struct clocksource *cs)
 {
 	return (cycle_t) read_aux_reg(ARC_REG_TIMER1_CNT);
 }
 
-static struct clocksource arc_counter = {
+static struct clocksource arc_counter_timer1 = {
 	.name   = "ARC Timer1",
 	.rating = 300,
-	.read   = arc_counter_read,
+	.read   = arc_read_timer1,
 	.mask   = CLOCKSOURCE_MASK(32),
 	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-#endif
-#endif
+static void __init arc_cs_setup_timer1(struct device_node *node)
+{
+	/* Local to CPU hence not usable in SMP */
+	if (IS_ENABLED(CONFIG_SMP))
+		return;
+
+	arc_get_timer_clk(node);
+
+	write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
+	write_aux_reg(ARC_REG_TIMER1_CNT, 0);
+	write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
+
+	clocksource_register_hz(&arc_counter_timer1, arc_timer_freq);
+}
+CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
 
 /********** Clock Event Device *********/
 
@@ -317,25 +340,9 @@ CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
 
 /*
  * Called from start_kernel() - boot CPU only
- *
- * -Sets up h/w timers as applicable on boot cpu
- * -Also sets up any global state needed for timer subsystem:
- *    - for "counting" timer, registers a clocksource, usable across CPUs
- *      (provided that underlying counter h/w is synchronized across cores)
  */
 void __init time_init(void)
 {
 	of_clk_init(NULL);
 	clocksource_probe();
-
-	/*
-	 * sets up the timekeeping free-flowing counter which also returns
-	 * whether the counter is usable as clocksource
-	 */
-	if (arc_counter_setup())
-		/*
-		 * CLK upto 4.29 GHz can be safely represented in 32 bits
-		 * because Max 32 bit number is 4,294,967,295
-		 */
-		clocksource_register_hz(&arc_counter, arc_timer_freq);
 }
-- 
2.5.0

[PATCH 6/9] ARC: clocksource: DT based probe

[Vineet Gupta]

- Remove explicit clocksource setup and let it be done by OF framework
  by defining CLOCKSOURCE_OF_DECLARE() for various timers

- This allows multiple clocksources to be potentially registered
  simultaneouly: previously we could only do one - as all of them had
  same arc_counter_setup() routine for registration

- Setup routines also ensure that the underlying timer actually exists.

- Remove some of the panic() calls if underlying timer is NOT detcted as
  a fallback clocksource might still be available
  1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
  2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
     always present)

Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/kernel/mcip.c  |   4 +-
 arch/arc/kernel/setup.c |   3 --
 arch/arc/kernel/time.c  | 111 +++++++++++++++++++++++++-----------------------
 3 files changed, 60 insertions(+), 58 deletions(-)

diff --git a/arch/arc/kernel/mcip.c b/arch/arc/kernel/mcip.c
index bc771f58fefb..79c09d20c905 100644
--- a/arch/arc/kernel/mcip.c
+++ b/arch/arc/kernel/mcip.c
@@ -118,15 +118,13 @@ static void mcip_probe_n_setup(void)
 		IS_AVAIL1(mp.dbg, "DEBUG "),
 		IS_AVAIL1(mp.gfrc, "GFRC"));
 
+	cpuinfo_arc700[0].extn.gfrc = mp.gfrc;
 	idu_detected = mp.idu;
 
 	if (mp.dbg) {
 		__mcip_cmd_data(CMD_DEBUG_SET_SELECT, 0, 0xf);
 		__mcip_cmd_data(CMD_DEBUG_SET_MASK, 0xf, 0xf);
 	}
-
-	if (IS_ENABLED(CONFIG_ARC_HAS_GFRC) && !mp.gfrc)
-		panic("kernel trying to use non-existent GFRC\n");
 }
 
 struct plat_smp_ops plat_smp_ops = {
diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 8129c8e8f20b..953068e9c9e1 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -304,9 +304,6 @@ static void arc_chk_core_config(void)
 	if (!cpu->extn.timer1)
 		panic("Timer1 is not present!\n");
 
-	if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->extn.rtc)
-		panic("RTC is not present\n");
-
 #ifdef CONFIG_ARC_HAS_DCCM
 	/*
 	 * DCCM can be arbit placed in hardware.
diff --git a/arch/arc/kernel/time.c b/arch/arc/kernel/time.c
index 43ef22853473..0987de53ed95 100644
--- a/arch/arc/kernel/time.c
+++ b/arch/arc/kernel/time.c
@@ -77,12 +77,7 @@ static void noinline arc_get_timer_clk(struct device_node *node)
 
 #ifdef CONFIG_ARC_HAS_GFRC
 
-static int arc_counter_setup(void)
-{
-	return 1;
-}
-
-static cycle_t arc_counter_read(struct clocksource *cs)
+static cycle_t arc_read_gfrc(struct clocksource *cs)
 {
 	unsigned long flags;
 	union {
@@ -107,15 +102,28 @@ static cycle_t arc_counter_read(struct clocksource *cs)
 	return stamp.full;
 }
 
-static struct clocksource arc_counter = {
+static struct clocksource arc_counter_gfrc = {
 	.name   = "ARConnect GFRC",
 	.rating = 400,
-	.read   = arc_counter_read,
+	.read   = arc_read_gfrc,
 	.mask   = CLOCKSOURCE_MASK(64),
 	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-#else
+static void __init arc_cs_setup_gfrc(struct device_node *node)
+{
+	int exists = cpuinfo_arc700[0].extn.gfrc;
+
+	if (WARN(!exists, "Global-64-bit-Ctr clocksource not detected"))
+		return;
+
+	arc_get_timer_clk(node);
+
+	clocksource_register_hz(&arc_counter_gfrc, arc_timer_freq);
+}
+CLOCKSOURCE_OF_DECLARE(arc_gfrc, "snps,archs-timer-gfrc", arc_cs_setup_gfrc);
+
+#endif
 
 #ifdef CONFIG_ARC_HAS_RTC
 
@@ -123,15 +131,7 @@ static struct clocksource arc_counter = {
 #define AUX_RTC_LOW	0x104
 #define AUX_RTC_HIGH	0x105
 
-int arc_counter_setup(void)
-{
-	write_aux_reg(AUX_RTC_CTRL, 1);
-
-	/* Not usable in SMP */
-	return !IS_ENABLED(CONFIG_SMP);
-}
-
-static cycle_t arc_counter_read(struct clocksource *cs)
+static cycle_t arc_read_rtc(struct clocksource *cs)
 {
 	unsigned long status;
 	union {
@@ -155,44 +155,67 @@ static cycle_t arc_counter_read(struct clocksource *cs)
 	return stamp.full;
 }
 
-static struct clocksource arc_counter = {
+static struct clocksource arc_counter_rtc = {
 	.name   = "ARCv2 RTC",
 	.rating = 350,
-	.read   = arc_counter_read,
+	.read   = arc_read_rtc,
 	.mask   = CLOCKSOURCE_MASK(64),
 	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-#else /* !CONFIG_ARC_HAS_RTC */
-
-/*
- * set 32bit TIMER1 to keep counting monotonically and wraparound
- */
-int arc_counter_setup(void)
+static void __init arc_cs_setup_rtc(struct device_node *node)
 {
-	write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
-	write_aux_reg(ARC_REG_TIMER1_CNT, 0);
-	write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
+	int exists = cpuinfo_arc700[smp_processor_id()].extn.rtc;
+
+	if (WARN(!exists, "Local-64-bit-Ctr clocksource not detected"))
+		return;
+
+	/* Local to CPU hence not usable in SMP */
+	if (WARN(IS_ENABLED(CONFIG_SMP), "Local-64-bit-Ctr not usable in SMP"))
+		return;
 
-	/* Not usable in SMP */
-	return !IS_ENABLED(CONFIG_SMP);
+	arc_get_timer_clk(node);
+
+	write_aux_reg(AUX_RTC_CTRL, 1);
+
+	clocksource_register_hz(&arc_counter_rtc, arc_timer_freq);
 }
+CLOCKSOURCE_OF_DECLARE(arc_rtc, "snps,archs-timer-rtc", arc_cs_setup_rtc);
+
+#endif
 
-static cycle_t arc_counter_read(struct clocksource *cs)
+/*
+ * 32bit TIMER1 to keep counting monotonically and wraparound
+ */
+
+static cycle_t arc_read_timer1(struct clocksource *cs)
 {
 	return (cycle_t) read_aux_reg(ARC_REG_TIMER1_CNT);
 }
 
-static struct clocksource arc_counter = {
+static struct clocksource arc_counter_timer1 = {
 	.name   = "ARC Timer1",
 	.rating = 300,
-	.read   = arc_counter_read,
+	.read   = arc_read_timer1,
 	.mask   = CLOCKSOURCE_MASK(32),
 	.flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-#endif
-#endif
+static void __init arc_cs_setup_timer1(struct device_node *node)
+{
+	/* Local to CPU hence not usable in SMP */
+	if (IS_ENABLED(CONFIG_SMP))
+		return;
+
+	arc_get_timer_clk(node);
+
+	write_aux_reg(ARC_REG_TIMER1_LIMIT, ARC_TIMER_MAX);
+	write_aux_reg(ARC_REG_TIMER1_CNT, 0);
+	write_aux_reg(ARC_REG_TIMER1_CTRL, TIMER_CTRL_NH);
+
+	clocksource_register_hz(&arc_counter_timer1, arc_timer_freq);
+}
+CLOCKSOURCE_OF_DECLARE(arc_timer1, "snps,arc-timer1", arc_cs_setup_timer1);
 
 /********** Clock Event Device *********/
 
@@ -317,25 +340,9 @@ CLOCKSOURCE_OF_DECLARE(arc_clkevt, "snps,arc-timer0", arc_clockevent_setup);
 
 /*
  * Called from start_kernel() - boot CPU only
- *
- * -Sets up h/w timers as applicable on boot cpu
- * -Also sets up any global state needed for timer subsystem:
- *    - for "counting" timer, registers a clocksource, usable across CPUs
- *      (provided that underlying counter h/w is synchronized across cores)
  */
 void __init time_init(void)
 {
 	of_clk_init(NULL);
 	clocksource_probe();
-
-	/*
-	 * sets up the timekeeping free-flowing counter which also returns
-	 * whether the counter is usable as clocksource
-	 */
-	if (arc_counter_setup())
-		/*
-		 * CLK upto 4.29 GHz can be safely represented in 32 bits
-		 * because Max 32 bit number is 4,294,967,295
-		 */
-		clocksource_register_hz(&arc_counter, arc_timer_freq);
 }
-- 
2.5.0

Re: [PATCH 6/9] ARC: clocksource: DT based probe

[Daniel Lezcano]

On 02/02/2016 11:58 AM, Vineet Gupta wrote:
> - Remove explicit clocksource setup and let it be done by OF framework
>    by defining CLOCKSOURCE_OF_DECLARE() for various timers
>
> - This allows multiple clocksources to be potentially registered
>    simultaneouly: previously we could only do one - as all of them had
>    same arc_counter_setup() routine for registration
>
> - Setup routines also ensure that the underlying timer actually exists.
>
> - Remove some of the panic() calls if underlying timer is NOT detcted as
>    a fallback clocksource might still be available
>    1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
>    2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
>       always present)
>
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

May be it is time to move these drivers into the drivers/clocksource 
directory where they belong to.


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[PATCH 6/9] ARC: clocksource: DT based probe

[Daniel Lezcano]

On 02/02/2016 11:58 AM, Vineet Gupta wrote:
> - Remove explicit clocksource setup and let it be done by OF framework
>    by defining CLOCKSOURCE_OF_DECLARE() for various timers
>
> - This allows multiple clocksources to be potentially registered
>    simultaneouly: previously we could only do one - as all of them had
>    same arc_counter_setup() routine for registration
>
> - Setup routines also ensure that the underlying timer actually exists.
>
> - Remove some of the panic() calls if underlying timer is NOT detcted as
>    a fallback clocksource might still be available
>    1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
>    2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
>       always present)
>
> Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
> Signed-off-by: Vineet Gupta <vgupta at synopsys.com>

May be it is time to move these drivers into the drivers/clocksource 
directory where they belong to.


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<http://www.linaro.org/linaro-blog/> Blog

Re: [PATCH 6/9] ARC: clocksource: DT based probe

[Vineet Gupta]

On Monday 08 February 2016 05:40 PM, Daniel Lezcano wrote:
> On 02/02/2016 11:58 AM, Vineet Gupta wrote:
>> - Remove explicit clocksource setup and let it be done by OF framework
>>    by defining CLOCKSOURCE_OF_DECLARE() for various timers
>>
>> - This allows multiple clocksources to be potentially registered
>>    simultaneouly: previously we could only do one - as all of them had
>>    same arc_counter_setup() routine for registration
>>
>> - Setup routines also ensure that the underlying timer actually exists.
>>
>> - Remove some of the panic() calls if underlying timer is NOT detcted as
>>    a fallback clocksource might still be available
>>    1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
>>    2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
>>       always present)
>>
>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
>> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> 
> May be it is time to move these drivers into the drivers/clocksource directory
> where they belong to.

I suppose we could, but that is only possible after this round of "moderization",
i.e. usage of CLOCKSOURCE_OF_DECLARE() et al.

Plus the move will require a bunch of mechanical crap such as read_aux_reg() which
only ARC defines (similar to headaches Noam had for his clksrc).

So if we could agree on the sanity of this round of changes, I can work towards
the imminent move into drivers.

Thx,
-Vineet

[PATCH 6/9] ARC: clocksource: DT based probe

[Vineet Gupta]

On Monday 08 February 2016 05:40 PM, Daniel Lezcano wrote:
> On 02/02/2016 11:58 AM, Vineet Gupta wrote:
>> - Remove explicit clocksource setup and let it be done by OF framework
>>    by defining CLOCKSOURCE_OF_DECLARE() for various timers
>>
>> - This allows multiple clocksources to be potentially registered
>>    simultaneouly: previously we could only do one - as all of them had
>>    same arc_counter_setup() routine for registration
>>
>> - Setup routines also ensure that the underlying timer actually exists.
>>
>> - Remove some of the panic() calls if underlying timer is NOT detcted as
>>    a fallback clocksource might still be available
>>    1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
>>    2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
>>       always present)
>>
>> Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
>> Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
> 
> May be it is time to move these drivers into the drivers/clocksource directory
> where they belong to.

I suppose we could, but that is only possible after this round of "moderization",
i.e. usage of CLOCKSOURCE_OF_DECLARE() et al.

Plus the move will require a bunch of mechanical crap such as read_aux_reg() which
only ARC defines (similar to headaches Noam had for his clksrc).

So if we could agree on the sanity of this round of changes, I can work towards
the imminent move into drivers.

Thx,
-Vineet

Re: [PATCH 6/9] ARC: clocksource: DT based probe

[Daniel Lezcano]

On 02/08/2016 01:23 PM, Vineet Gupta wrote:
> On Monday 08 February 2016 05:40 PM, Daniel Lezcano wrote:
>> On 02/02/2016 11:58 AM, Vineet Gupta wrote:
>>> - Remove explicit clocksource setup and let it be done by OF framework
>>>     by defining CLOCKSOURCE_OF_DECLARE() for various timers
>>>
>>> - This allows multiple clocksources to be potentially registered
>>>     simultaneouly: previously we could only do one - as all of them had
>>>     same arc_counter_setup() routine for registration
>>>
>>> - Setup routines also ensure that the underlying timer actually exists.
>>>
>>> - Remove some of the panic() calls if underlying timer is NOT detcted as
>>>     a fallback clocksource might still be available
>>>     1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
>>>     2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
>>>        always present)
>>>
>>> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
>>> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
>>
>> May be it is time to move these drivers into the drivers/clocksource directory
>> where they belong to.
>
> I suppose we could, but that is only possible after this round of "moderization",
> i.e. usage of CLOCKSOURCE_OF_DECLARE() et al.
>
> Plus the move will require a bunch of mechanical crap such as read_aux_reg() which
> only ARC defines (similar to headaches Noam had for his clksrc).
>
> So if we could agree on the sanity of this round of changes, I can work towards
> the imminent move into drivers.

Ok, sounds good.


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[PATCH 6/9] ARC: clocksource: DT based probe

[Daniel Lezcano]

On 02/08/2016 01:23 PM, Vineet Gupta wrote:
> On Monday 08 February 2016 05:40 PM, Daniel Lezcano wrote:
>> On 02/02/2016 11:58 AM, Vineet Gupta wrote:
>>> - Remove explicit clocksource setup and let it be done by OF framework
>>>     by defining CLOCKSOURCE_OF_DECLARE() for various timers
>>>
>>> - This allows multiple clocksources to be potentially registered
>>>     simultaneouly: previously we could only do one - as all of them had
>>>     same arc_counter_setup() routine for registration
>>>
>>> - Setup routines also ensure that the underlying timer actually exists.
>>>
>>> - Remove some of the panic() calls if underlying timer is NOT detcted as
>>>     a fallback clocksource might still be available
>>>     1. If GRFC doesn't exist, jiffies clocksource gets registered anyways
>>>     2. if RTC doesn't exist, TIMER1 cetainly will take over (as it is
>>>        always present)
>>>
>>> Cc: Daniel Lezcano <daniel.lezcano at linaro.org>
>>> Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
>>
>> May be it is time to move these drivers into the drivers/clocksource directory
>> where they belong to.
>
> I suppose we could, but that is only possible after this round of "moderization",
> i.e. usage of CLOCKSOURCE_OF_DECLARE() et al.
>
> Plus the move will require a bunch of mechanical crap such as read_aux_reg() which
> only ARC defines (similar to headaches Noam had for his clksrc).
>
> So if we could agree on the sanity of this round of changes, I can work towards
> the imminent move into drivers.

Ok, sounds good.


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[PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[Vineet Gupta]

From: Alexey Brodkin <abrodkin@synopsys.com>

UARTs usually have fixed clock so we're switching to use of
constant values instead of something derived from core clock
frequency.

Among other things this will allow us to get rid of
arc_{get|set}_core_freq() and switch to generic clock
framework later on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/kernel/devtree.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index 7e844fd8213f..e155126c79b1 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
 
 static void __init arc_set_early_base_baud(unsigned long dt_root)
 {
-	unsigned int core_clk = arc_get_core_freq();
-
 	if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
-		arc_base_baud = core_clk/3;
+		arc_base_baud = 166666667;	/* Fixed 166.7MHz clk (TB10x) */
 	else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
 		arc_base_baud = 33333333;	/* Fixed 33MHz clk (AXS10x) */
 	else
-		arc_base_baud = core_clk;
+		arc_base_baud = 50000000;	/* Fixed default 50MHz */
 }
 #else
 #define arc_set_early_base_baud(dt_root)
-- 
2.5.0

[PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[Vineet Gupta]

From: Alexey Brodkin <abrodkin@synopsys.com>

UARTs usually have fixed clock so we're switching to use of
constant values instead of something derived from core clock
frequency.

Among other things this will allow us to get rid of
arc_{get|set}_core_freq() and switch to generic clock
framework later on.

Signed-off-by: Alexey Brodkin <abrodkin at synopsys.com>
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/kernel/devtree.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index 7e844fd8213f..e155126c79b1 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
 
 static void __init arc_set_early_base_baud(unsigned long dt_root)
 {
-	unsigned int core_clk = arc_get_core_freq();
-
 	if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
-		arc_base_baud = core_clk/3;
+		arc_base_baud = 166666667;	/* Fixed 166.7MHz clk (TB10x) */
 	else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
 		arc_base_baud = 33333333;	/* Fixed 33MHz clk (AXS10x) */
 	else
-		arc_base_baud = core_clk;
+		arc_base_baud = 50000000;	/* Fixed default 50MHz */
 }
 #else
 #define arc_set_early_base_baud(dt_root)
-- 
2.5.0

Re: [PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[Alexey Brodkin]

Adding Christian for Abilis TB10x clocks review.

On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> From: Alexey Brodkin <abrodkin@synopsys.com>
> 
> UARTs usually have fixed clock so we're switching to use of
> constant values instead of something derived from core clock
> frequency.
> 
> Among other things this will allow us to get rid of
> arc_{get|set}_core_freq() and switch to generic clock
> framework later on.
> 
> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> ---
>  arch/arc/kernel/devtree.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
> index 7e844fd8213f..e155126c79b1 100644
> --- a/arch/arc/kernel/devtree.c
> +++ b/arch/arc/kernel/devtree.c
> @@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
>  
>  static void __init arc_set_early_base_baud(unsigned long dt_root)
>  {
> -	unsigned int core_clk = arc_get_core_freq();
> -
>  	if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
> -		arc_base_baud = core_clk/3;
> +		arc_base_baud = 166666667;	/* Fixed 166.7MHz clk (TB10x) */
>  	else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
>  		arc_base_baud = 33333333;	/* Fixed 33MHz clk (AXS10x) */
>  	else
> -		arc_base_baud = core_clk;
> +		arc_base_baud = 50000000;	/* Fixed default 50MHz */
>  }
>  #else
>  #define arc_set_early_base_baud(dt_root)

-Alexey

[PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[Alexey Brodkin]

Adding Christian for Abilis TB10x clocks review.

On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> From: Alexey Brodkin <abrodkin at synopsys.com>
> 
> UARTs usually have fixed clock so we're switching to use of
> constant values instead of something derived from core clock
> frequency.
> 
> Among other things this will allow us to get rid of
> arc_{get|set}_core_freq() and switch to generic clock
> framework later on.
> 
> Signed-off-by: Alexey Brodkin <abrodkin at synopsys.com>
> Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
> ---
>  arch/arc/kernel/devtree.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
> index 7e844fd8213f..e155126c79b1 100644
> --- a/arch/arc/kernel/devtree.c
> +++ b/arch/arc/kernel/devtree.c
> @@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
>  
>  static void __init arc_set_early_base_baud(unsigned long dt_root)
>  {
> -	unsigned int core_clk = arc_get_core_freq();
> -
>  	if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
> -		arc_base_baud = core_clk/3;
> +		arc_base_baud = 166666667;	/* Fixed 166.7MHz clk (TB10x) */
>  	else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
>  		arc_base_baud = 33333333;	/* Fixed 33MHz clk (AXS10x) */
>  	else
> -		arc_base_baud = core_clk;
> +		arc_base_baud = 50000000;	/* Fixed default 50MHz */
>  }
>  #else
>  #define arc_set_early_base_baud(dt_root)

-Alexey

Re: [PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[christian.ruppert]

Alexey Brodkin <Alexey.Brodkin@synopsys.com> wrote on 02.02.2016 13:53:26:
> 
> Adding Christian for Abilis TB10x clocks review.
> 
> On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > From: Alexey Brodkin <abrodkin@synopsys.com>
> > 
> > UARTs usually have fixed clock so we're switching to use of
> > constant values instead of something derived from core clock
> > frequency.
> > 
> > Among other things this will allow us to get rid of
> > arc_{get|set}_core_freq() and switch to generic clock
> > framework later on.
> > 
> > Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
> > Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> > ---
> >  arch/arc/kernel/devtree.c | 6 ++----
> >  1 file changed, 2 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
> > index 7e844fd8213f..e155126c79b1 100644
> > --- a/arch/arc/kernel/devtree.c
> > +++ b/arch/arc/kernel/devtree.c
> > @@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
> > 
> >  static void __init arc_set_early_base_baud(unsigned long dt_root)
> >  {
> > -   unsigned int core_clk = arc_get_core_freq();
> > -
> >     if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
> > -      arc_base_baud = core_clk/3;
> > +      arc_base_baud = 166666667;   /* Fixed 166.7MHz clk (TB10x) */

Actually, (int)core_clk/(int)3 is 166666666 not 166666667.
I seem to remember that this rounding detail did make a difference at some 
point. Unluckily, the details are long forgotten in the mist of time...

> >     else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
> >        arc_base_baud = 33333333;   /* Fixed 33MHz clk (AXS10x) */
> >     else
> > -      arc_base_baud = core_clk;
> > +      arc_base_baud = 50000000;   /* Fixed default 50MHz */
> >  }
> >  #else
> >  #define arc_set_early_base_baud(dt_root)
> 
> -Alexey

[PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[christian.ruppert]

Alexey Brodkin <Alexey.Brodkin at synopsys.com> wrote on 02.02.2016 13:53:26:
> 
> Adding Christian for Abilis TB10x clocks review.
> 
> On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> > From: Alexey Brodkin <abrodkin at synopsys.com>
> > 
> > UARTs usually have fixed clock so we're switching to use of
> > constant values instead of something derived from core clock
> > frequency.
> > 
> > Among other things this will allow us to get rid of
> > arc_{get|set}_core_freq() and switch to generic clock
> > framework later on.
> > 
> > Signed-off-by: Alexey Brodkin <abrodkin at synopsys.com>
> > Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
> > ---
> >  arch/arc/kernel/devtree.c | 6 ++----
> >  1 file changed, 2 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
> > index 7e844fd8213f..e155126c79b1 100644
> > --- a/arch/arc/kernel/devtree.c
> > +++ b/arch/arc/kernel/devtree.c
> > @@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
> > 
> >  static void __init arc_set_early_base_baud(unsigned long dt_root)
> >  {
> > -   unsigned int core_clk = arc_get_core_freq();
> > -
> >     if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
> > -      arc_base_baud = core_clk/3;
> > +      arc_base_baud = 166666667;   /* Fixed 166.7MHz clk (TB10x) */

Actually, (int)core_clk/(int)3 is 166666666 not 166666667.
I seem to remember that this rounding detail did make a difference at some 
point. Unluckily, the details are long forgotten in the mist of time...

> >     else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp"))
> >        arc_base_baud = 33333333;   /* Fixed 33MHz clk (AXS10x) */
> >     else
> > -      arc_base_baud = core_clk;
> > +      arc_base_baud = 50000000;   /* Fixed default 50MHz */
> >  }
> >  #else
> >  #define arc_set_early_base_baud(dt_root)
> 
> -Alexey

Re: [PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[Alexey Brodkin]

Hi Christian,

On Tue, 2016-02-02 at 14:43 +0100, christian.ruppert@alitech.com wrote:
> Alexey Brodkin <Alexey.Brodkin@synopsys.com> wrote on 02.02.2016 13:53:26:
> > 
> > Adding Christian for Abilis TB10x clocks review.
> > 
> > On Tue, 2016-02-02 at 16:28 +0530, Vineet Gupta wrote:
> > > From: Alexey Brodkin <abrodkin@synopsys.com>
> > > 
> > > UARTs usually have fixed clock so we're switching to use of
> > > constant values instead of something derived from core clock
> > > frequency.
> > > 
> > > Among other things this will allow us to get rid of
> > > arc_{get|set}_core_freq() and switch to generic clock
> > > framework later on.
> > > 
> > > Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
> > > Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
> > > ---
> > >  arch/arc/kernel/devtree.c | 6 ++----
> > >  1 file changed, 2 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
> > > index 7e844fd8213f..e155126c79b1 100644
> > > --- a/arch/arc/kernel/devtree.c
> > > +++ b/arch/arc/kernel/devtree.c
> > > @@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
> > > 
> > >  static void __init arc_set_early_base_baud(unsigned long dt_root)
> > >  {
> > > -   unsigned int core_clk = arc_get_core_freq();
> > > -
> > >     if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
> > > -      arc_base_baud = core_clk/3;
> > > +      arc_base_baud = 166666667;   /* Fixed 166.7MHz clk (TB10x) */
> 
> Actually, (int)core_clk/(int)3 is 166666666 not 166666667.
> I seem to remember that this rounding detail did make a difference at some 
> point. Unluckily, the details are long forgotten in the mist of time...

Interesting :)

I did that rounding intentionally hoping for the best.
But so good we've got your valuable input before it's too late.

-Alexey

[PATCH 7/9] ARC: use fixed frequencies in arc_set_early_base_baud()

[Alexey Brodkin]

Hi Christian,

On Tue, 2016-02-02@14:43 +0100, christian.ruppert@alitech.com wrote:
> Alexey Brodkin <Alexey.Brodkin at synopsys.com> wrote on 02.02.2016 13:53:26:
> > 
> > Adding Christian for Abilis TB10x clocks review.
> > 
> > On Tue, 2016-02-02@16:28 +0530, Vineet Gupta wrote:
> > > From: Alexey Brodkin <abrodkin at synopsys.com>
> > > 
> > > UARTs usually have fixed clock so we're switching to use of
> > > constant values instead of something derived from core clock
> > > frequency.
> > > 
> > > Among other things this will allow us to get rid of
> > > arc_{get|set}_core_freq() and switch to generic clock
> > > framework later on.
> > > 
> > > Signed-off-by: Alexey Brodkin <abrodkin at synopsys.com>
> > > Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
> > > ---
> > >  arch/arc/kernel/devtree.c | 6 ++----
> > >  1 file changed, 2 insertions(+), 4 deletions(-)
> > > 
> > > diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
> > > index 7e844fd8213f..e155126c79b1 100644
> > > --- a/arch/arc/kernel/devtree.c
> > > +++ b/arch/arc/kernel/devtree.c
> > > @@ -28,14 +28,12 @@ unsigned int __init arc_early_base_baud(void)
> > > 
> > >  static void __init arc_set_early_base_baud(unsigned long dt_root)
> > >  {
> > > -   unsigned int core_clk = arc_get_core_freq();
> > > -
> > >     if (of_flat_dt_is_compatible(dt_root, "abilis,arc-tb10x"))
> > > -      arc_base_baud = core_clk/3;
> > > +      arc_base_baud = 166666667;   /* Fixed 166.7MHz clk (TB10x) */
> 
> Actually, (int)core_clk/(int)3 is 166666666 not 166666667.
> I seem to remember that this rounding detail did make a difference at some 
> point. Unluckily, the details are long forgotten in the mist of time...

Interesting :)

I did that rounding intentionally hoping for the best.
But so good we've got your valuable input before it's too late.

-Alexey

[PATCH 8/9] ARC: [plat-axs] Don't use arc_{get|set}_core_freq() for manipulating core clk

[Vineet Gupta]

From: Alexey Brodkin <abrodkin@synopsys.com>

For AXS103, certain bitfile configurations may not work with stock
"clock-frequency" specified in DT. Instead of duplicating the DT files, we
fixup the DT in-place.

This used to be done differently - as in top level "clock-frequency" was
read very early from FDT and exported using arc_{get|set}_core_freq()
also used in setting up clockevent/clocksource timers

This homebrew clk API served well for legacy timer probe (non DT)

However TIMERS are now probed from DT and use "core_clk" defined in DT,
and thus can no longer use the top level "clock-frequency".
This change reduces the number of users of ARC clk hack and paves way
for removal.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
[vgupta: broken out of from bigger patch]
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/kernel/setup.c       | 12 +++++++-----
 arch/arc/plat-axs10x/axs10x.c | 27 +++++++++++++++++++++------
 2 files changed, 28 insertions(+), 11 deletions(-)

diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 953068e9c9e1..c35552dca46a 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -24,7 +24,6 @@
 #include <asm/page.h>
 #include <asm/irq.h>
 #include <asm/unwind.h>
-#include <asm/clk.h>
 #include <asm/mach_desc.h>
 #include <asm/smp.h>
 
@@ -208,10 +207,6 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 	if (tbl->info.id == 0)
 		n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
 
-	n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
-		       (unsigned int)(arc_get_core_freq() / 1000000),
-		       (unsigned int)(arc_get_core_freq() / 10000) % 100);
-
 	n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
 		       IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 		       IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
@@ -467,6 +462,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 {
 	char *str;
 	int cpu_id = ptr_to_cpu(v);
+	struct device_node *pll = of_find_node_by_name(NULL, "core_clk");
+	u32 freq;
+
+	of_property_read_u32(pll, "clock-frequency", &freq);
 
 	if (!cpu_online(cpu_id)) {
 		seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
@@ -478,6 +477,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		goto done;
 
 	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
+	seq_printf(m, "CPU speed\t: %u.%02u Mhz\n",
+		   (unsigned int)(freq / 1000000),
+		   (unsigned int)(freq / 10000) % 100);
 
 	seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 		   loops_per_jiffy / (500000 / HZ),
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 1b0f0f458a2b..9701c93f315d 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -14,10 +14,11 @@
  *
  */
 
+#include <linux/of_fdt.h>
 #include <linux/of_platform.h>
+#include <linux/libfdt.h>
 
 #include <asm/asm-offsets.h>
-#include <asm/clk.h>
 #include <asm/io.h>
 #include <asm/mach_desc.h>
 #include <asm/mcip.h>
@@ -389,6 +390,13 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)
 
 static void __init axs103_early_init(void)
 {
+	int offset = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk");
+	const struct fdt_property *prop = fdt_get_property(initial_boot_params,
+							   offset,
+							   "clock-frequency",
+							   NULL);
+	u32 freq = be32_to_cpu(*(u32*)(prop->data)) / 1000000, orig = freq;
+
 	/*
 	 * AXS103 configurations for SMP/QUAD configurations share device tree
 	 * which defaults to 90 MHz. However recent failures of Quad config
@@ -401,12 +409,12 @@ static void __init axs103_early_init(void)
 #ifdef CONFIG_ARC_MCIP
 	unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
 	if (num_cores > 2)
-		arc_set_core_freq(50 * 1000000);
+		freq = 50;
 	else if (num_cores == 2)
-		arc_set_core_freq(75 * 1000000);
+		freq = 75;
 #endif
 
-	switch (arc_get_core_freq()/1000000) {
+	switch (freq) {
 	case 33:
 		axs103_set_freq(1, 1, 1);
 		break;
@@ -431,11 +439,18 @@ static void __init axs103_early_init(void)
 		 * DT "clock-frequency" might not match with board value.
 		 * Hence update it to match the board value.
 		 */
-		arc_set_core_freq(axs103_get_freq() * 1000000);
+		freq = axs103_get_freq();
 		break;
 	}
 
-	pr_info("Freq is %dMHz\n", axs103_get_freq());
+	pr_info("Freq is %dMHz\n", freq);
+
+	/* Patching .dtb in-place with new core clock value */
+	if (freq != orig ) {
+		freq = cpu_to_be32(freq * 1000000);
+		fdt_setprop_inplace(initial_boot_params, offset,
+				    "clock-frequency", &freq, sizeof(freq));
+	}
 
 	/* Memory maps already config in pre-bootloader */
 
-- 
2.5.0

[PATCH 8/9] ARC: [plat-axs] Don't use arc_{get|set}_core_freq() for manipulating core clk

[Vineet Gupta]

From: Alexey Brodkin <abrodkin@synopsys.com>

For AXS103, certain bitfile configurations may not work with stock
"clock-frequency" specified in DT. Instead of duplicating the DT files, we
fixup the DT in-place.

This used to be done differently - as in top level "clock-frequency" was
read very early from FDT and exported using arc_{get|set}_core_freq()
also used in setting up clockevent/clocksource timers

This homebrew clk API served well for legacy timer probe (non DT)

However TIMERS are now probed from DT and use "core_clk" defined in DT,
and thus can no longer use the top level "clock-frequency".
This change reduces the number of users of ARC clk hack and paves way
for removal.

Signed-off-by: Alexey Brodkin <abrodkin at synopsys.com>
[vgupta: broken out of from bigger patch]
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>

Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/kernel/setup.c       | 12 +++++++-----
 arch/arc/plat-axs10x/axs10x.c | 27 +++++++++++++++++++++------
 2 files changed, 28 insertions(+), 11 deletions(-)

diff --git a/arch/arc/kernel/setup.c b/arch/arc/kernel/setup.c
index 953068e9c9e1..c35552dca46a 100644
--- a/arch/arc/kernel/setup.c
+++ b/arch/arc/kernel/setup.c
@@ -24,7 +24,6 @@
 #include <asm/page.h>
 #include <asm/irq.h>
 #include <asm/unwind.h>
-#include <asm/clk.h>
 #include <asm/mach_desc.h>
 #include <asm/smp.h>
 
@@ -208,10 +207,6 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 	if (tbl->info.id == 0)
 		n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
 
-	n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
-		       (unsigned int)(arc_get_core_freq() / 1000000),
-		       (unsigned int)(arc_get_core_freq() / 10000) % 100);
-
 	n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
 		       IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 		       IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
@@ -467,6 +462,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 {
 	char *str;
 	int cpu_id = ptr_to_cpu(v);
+	struct device_node *pll = of_find_node_by_name(NULL, "core_clk");
+	u32 freq;
+
+	of_property_read_u32(pll, "clock-frequency", &freq);
 
 	if (!cpu_online(cpu_id)) {
 		seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
@@ -478,6 +477,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
 		goto done;
 
 	seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
+	seq_printf(m, "CPU speed\t: %u.%02u Mhz\n",
+		   (unsigned int)(freq / 1000000),
+		   (unsigned int)(freq / 10000) % 100);
 
 	seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 		   loops_per_jiffy / (500000 / HZ),
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c
index 1b0f0f458a2b..9701c93f315d 100644
--- a/arch/arc/plat-axs10x/axs10x.c
+++ b/arch/arc/plat-axs10x/axs10x.c
@@ -14,10 +14,11 @@
  *
  */
 
+#include <linux/of_fdt.h>
 #include <linux/of_platform.h>
+#include <linux/libfdt.h>
 
 #include <asm/asm-offsets.h>
-#include <asm/clk.h>
 #include <asm/io.h>
 #include <asm/mach_desc.h>
 #include <asm/mcip.h>
@@ -389,6 +390,13 @@ axs103_set_freq(unsigned int id, unsigned int fd, unsigned int od)
 
 static void __init axs103_early_init(void)
 {
+	int offset = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk");
+	const struct fdt_property *prop = fdt_get_property(initial_boot_params,
+							   offset,
+							   "clock-frequency",
+							   NULL);
+	u32 freq = be32_to_cpu(*(u32*)(prop->data)) / 1000000, orig = freq;
+
 	/*
 	 * AXS103 configurations for SMP/QUAD configurations share device tree
 	 * which defaults to 90 MHz. However recent failures of Quad config
@@ -401,12 +409,12 @@ static void __init axs103_early_init(void)
 #ifdef CONFIG_ARC_MCIP
 	unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F;
 	if (num_cores > 2)
-		arc_set_core_freq(50 * 1000000);
+		freq = 50;
 	else if (num_cores == 2)
-		arc_set_core_freq(75 * 1000000);
+		freq = 75;
 #endif
 
-	switch (arc_get_core_freq()/1000000) {
+	switch (freq) {
 	case 33:
 		axs103_set_freq(1, 1, 1);
 		break;
@@ -431,11 +439,18 @@ static void __init axs103_early_init(void)
 		 * DT "clock-frequency" might not match with board value.
 		 * Hence update it to match the board value.
 		 */
-		arc_set_core_freq(axs103_get_freq() * 1000000);
+		freq = axs103_get_freq();
 		break;
 	}
 
-	pr_info("Freq is %dMHz\n", axs103_get_freq());
+	pr_info("Freq is %dMHz\n", freq);
+
+	/* Patching .dtb in-place with new core clock value */
+	if (freq != orig ) {
+		freq = cpu_to_be32(freq * 1000000);
+		fdt_setprop_inplace(initial_boot_params, offset,
+				    "clock-frequency", &freq, sizeof(freq));
+	}
 
 	/* Memory maps already config in pre-bootloader */
 
-- 
2.5.0

[PATCH 9/9] ARC: RIP arc_{get|set}_core_freq() clk API

[Vineet Gupta]

From: Alexey Brodkin <abrodkin@synopsys.com>

There are no more users of this - so RIP!

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
[vgupta: update changelog]
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
---
 arch/arc/include/asm/clk.h | 22 ----------------------
 arch/arc/kernel/Makefile   |  2 +-
 arch/arc/kernel/clk.c      | 21 ---------------------
 arch/arc/kernel/devtree.c  |  7 -------
 4 files changed, 1 insertion(+), 51 deletions(-)
 delete mode 100644 arch/arc/include/asm/clk.h
 delete mode 100644 arch/arc/kernel/clk.c

diff --git a/arch/arc/include/asm/clk.h b/arch/arc/include/asm/clk.h
deleted file mode 100644
index bf9d29f5bd53..000000000000
--- a/arch/arc/include/asm/clk.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _ASM_ARC_CLK_H
-#define _ASM_ARC_CLK_H
-
-/* Although we can't really hide core_freq, the accessor is still better way */
-extern unsigned long core_freq;
-
-static inline unsigned long arc_get_core_freq(void)
-{
-	return core_freq;
-}
-
-extern int arc_set_core_freq(unsigned long);
-
-#endif
diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile
index e7f3625a19b5..4f16967a0871 100644
--- a/arch/arc/kernel/Makefile
+++ b/arch/arc/kernel/Makefile
@@ -9,7 +9,7 @@
 CFLAGS_ptrace.o		+= -DUTS_MACHINE='"$(UTS_MACHINE)"'
 
 obj-y	:= arcksyms.o setup.o irq.o time.o reset.o ptrace.o process.o devtree.o
-obj-y	+= signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o clk.o
+obj-y	+= signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o
 obj-$(CONFIG_ISA_ARCOMPACT)		+= entry-compact.o intc-compact.o
 obj-$(CONFIG_ISA_ARCV2)			+= entry-arcv2.o intc-arcv2.o
 
diff --git a/arch/arc/kernel/clk.c b/arch/arc/kernel/clk.c
deleted file mode 100644
index 10c7b0b5a079..000000000000
--- a/arch/arc/kernel/clk.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <asm/clk.h>
-
-unsigned long core_freq = 80000000;
-
-/*
- * As of now we default to device-tree provided clock
- * In future we can determine this in early boot
- */
-int arc_set_core_freq(unsigned long freq)
-{
-	core_freq = freq;
-	return 0;
-}
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index e155126c79b1..1b2234517d65 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -14,7 +14,6 @@
 #include <linux/memblock.h>
 #include <linux/of.h>
 #include <linux/of_fdt.h>
-#include <asm/clk.h>
 #include <asm/mach_desc.h>
 
 #ifdef CONFIG_SERIAL_EARLYCON
@@ -63,8 +62,6 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)
 {
 	const struct machine_desc *mdesc;
 	unsigned long dt_root;
-	const void *clk;
-	int len;
 
 	if (!early_init_dt_scan(dt))
 		return NULL;
@@ -74,10 +71,6 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)
 		machine_halt();
 
 	dt_root = of_get_flat_dt_root();
-	clk = of_get_flat_dt_prop(dt_root, "clock-frequency", &len);
-	if (clk)
-		arc_set_core_freq(of_read_ulong(clk, len/4));
-
 	arc_set_early_base_baud(dt_root);
 
 	return mdesc;
-- 
2.5.0

[PATCH 9/9] ARC: RIP arc_{get|set}_core_freq() clk API

[Vineet Gupta]

From: Alexey Brodkin <abrodkin@synopsys.com>

There are no more users of this - so RIP!

Signed-off-by: Alexey Brodkin <abrodkin at synopsys.com>
[vgupta: update changelog]
Signed-off-by: Vineet Gupta <vgupta at synopsys.com>

Signed-off-by: Vineet Gupta <vgupta at synopsys.com>
---
 arch/arc/include/asm/clk.h | 22 ----------------------
 arch/arc/kernel/Makefile   |  2 +-
 arch/arc/kernel/clk.c      | 21 ---------------------
 arch/arc/kernel/devtree.c  |  7 -------
 4 files changed, 1 insertion(+), 51 deletions(-)
 delete mode 100644 arch/arc/include/asm/clk.h
 delete mode 100644 arch/arc/kernel/clk.c

diff --git a/arch/arc/include/asm/clk.h b/arch/arc/include/asm/clk.h
deleted file mode 100644
index bf9d29f5bd53..000000000000
--- a/arch/arc/include/asm/clk.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _ASM_ARC_CLK_H
-#define _ASM_ARC_CLK_H
-
-/* Although we can't really hide core_freq, the accessor is still better way */
-extern unsigned long core_freq;
-
-static inline unsigned long arc_get_core_freq(void)
-{
-	return core_freq;
-}
-
-extern int arc_set_core_freq(unsigned long);
-
-#endif
diff --git a/arch/arc/kernel/Makefile b/arch/arc/kernel/Makefile
index e7f3625a19b5..4f16967a0871 100644
--- a/arch/arc/kernel/Makefile
+++ b/arch/arc/kernel/Makefile
@@ -9,7 +9,7 @@
 CFLAGS_ptrace.o		+= -DUTS_MACHINE='"$(UTS_MACHINE)"'
 
 obj-y	:= arcksyms.o setup.o irq.o time.o reset.o ptrace.o process.o devtree.o
-obj-y	+= signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o clk.o
+obj-y	+= signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o
 obj-$(CONFIG_ISA_ARCOMPACT)		+= entry-compact.o intc-compact.o
 obj-$(CONFIG_ISA_ARCV2)			+= entry-arcv2.o intc-arcv2.o
 
diff --git a/arch/arc/kernel/clk.c b/arch/arc/kernel/clk.c
deleted file mode 100644
index 10c7b0b5a079..000000000000
--- a/arch/arc/kernel/clk.c
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <asm/clk.h>
-
-unsigned long core_freq = 80000000;
-
-/*
- * As of now we default to device-tree provided clock
- * In future we can determine this in early boot
- */
-int arc_set_core_freq(unsigned long freq)
-{
-	core_freq = freq;
-	return 0;
-}
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index e155126c79b1..1b2234517d65 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -14,7 +14,6 @@
 #include <linux/memblock.h>
 #include <linux/of.h>
 #include <linux/of_fdt.h>
-#include <asm/clk.h>
 #include <asm/mach_desc.h>
 
 #ifdef CONFIG_SERIAL_EARLYCON
@@ -63,8 +62,6 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)
 {
 	const struct machine_desc *mdesc;
 	unsigned long dt_root;
-	const void *clk;
-	int len;
 
 	if (!early_init_dt_scan(dt))
 		return NULL;
@@ -74,10 +71,6 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)
 		machine_halt();
 
 	dt_root = of_get_flat_dt_root();
-	clk = of_get_flat_dt_prop(dt_root, "clock-frequency", &len);
-	if (clk)
-		arc_set_core_freq(of_read_ulong(clk, len/4));
-
 	arc_set_early_base_baud(dt_root);
 
 	return mdesc;
-- 
2.5.0