From: Jan Kiszka <jan.kiszka@web.de>
To: David Kiarie <davidkiarie4@gmail.com>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
Valentine Sinitsyn <valentine.sinitsyn@gmail.com>,
Peter Xu <peterx@redhat.com>,
Marcel Apfelbaum <marcel@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [V10 1/4] hw/i386: Introduce AMD IOMMU
Date: Mon, 16 May 2016 08:51:32 +0200 [thread overview]
Message-ID: <57396DF4.5050305@web.de> (raw)
In-Reply-To: <CABdVeABORWvPDmtOmxb-+eyGkCCUaaynafjkcCX6y58-HJbUQw@mail.gmail.com>
On 2016-05-16 07:59, David Kiarie wrote:
> On Sun, May 15, 2016 at 10:29 PM, Jan Kiszka <jan.kiszka@web.de> wrote:
>> On 2016-05-09 14:15, David Kiarie wrote:
>>> + ret->iova = addr & AMDVI_PAGE_MASK_4K;
>>> + ret->translated_addr = (pte & AMDVI_DEV_PT_ROOT_MASK) &
>>> + AMDVI_PAGE_MASK_4K;
>>> + ret->addr_mask = ~AMDVI_PAGE_MASK_4K;
>>
>> This does not take huge pages (2M, 1G, ...) into account. Jailhouse
>> creates them, and its Linux guest goes mad. You need to use the correct
>> page size here, analogously to intel_iommu.c.
>
> Yes, this was meant to work with normal pages only. Until recently
> intel iommu supported 4k pages only so I figured I could as well work
> with 4k pages. Anyway, will fix this.
Huge pages are optional on Intel. Not AMD.
Jan
next prev parent reply other threads:[~2016-05-16 21:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-09 12:15 [Qemu-devel] [V10 0/4] AMD IOMMU David Kiarie
2016-05-09 12:15 ` [Qemu-devel] [V10 1/4] hw/i386: Introduce " David Kiarie
2016-05-15 19:29 ` Jan Kiszka
2016-05-16 5:59 ` David Kiarie
2016-05-16 6:51 ` Jan Kiszka [this message]
2016-05-09 12:16 ` [Qemu-devel] [V10 2/4] hw/i386: ACPI IVRS table David Kiarie
2016-05-09 12:16 ` [Qemu-devel] [V10 3/4] hw/core: provision for overriding emulated IOMMU David Kiarie
2016-05-09 12:16 ` [Qemu-devel] [V10 4/4] hw/pci-host: Emulate AMD IOMMU David Kiarie
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