* [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait
@ 2020-03-27 11:22 Chris Wilson
2020-03-27 11:22 ` [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple kreffed struct Chris Wilson
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Chris Wilson @ 2020-03-27 11:22 UTC (permalink / raw)
To: intel-gfx
Allow some users the discretion to not immediately return on a normal
signal. Hopefully, they will opt to use TASK_KILLABLE instead.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_active.c | 6 ++++--
drivers/gpu/drm/i915/i915_active.h | 6 +++++-
drivers/gpu/drm/i915/selftests/i915_active.c | 10 +++++-----
3 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
index a0d31f7bfb42..7b685032cc1e 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -496,7 +496,7 @@ static int flush_lazy_signals(struct i915_active *ref)
return err;
}
-int i915_active_wait(struct i915_active *ref)
+int __i915_active_wait(struct i915_active *ref, int state)
{
int err;
@@ -511,7 +511,9 @@ int i915_active_wait(struct i915_active *ref)
if (err)
return err;
- if (wait_var_event_interruptible(ref, i915_active_is_idle(ref)))
+ if (!i915_active_is_idle(ref) &&
+ ___wait_var_event(ref, i915_active_is_idle(ref),
+ state, 0, 0, schedule()))
return -EINTR;
flush_work(&ref->work);
diff --git a/drivers/gpu/drm/i915/i915_active.h b/drivers/gpu/drm/i915/i915_active.h
index b3282ae7913c..4f9aa7bab514 100644
--- a/drivers/gpu/drm/i915/i915_active.h
+++ b/drivers/gpu/drm/i915/i915_active.h
@@ -181,7 +181,11 @@ static inline bool i915_active_has_exclusive(struct i915_active *ref)
return rcu_access_pointer(ref->excl.fence);
}
-int i915_active_wait(struct i915_active *ref);
+int __i915_active_wait(struct i915_active *ref, int state);
+static inline int i915_active_wait(struct i915_active *ref)
+{
+ return __i915_active_wait(ref, TASK_INTERRUPTIBLE);
+}
int i915_sw_fence_await_active(struct i915_sw_fence *fence,
struct i915_active *ref,
diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c
index 54080fb4af4b..4002c984c2e0 100644
--- a/drivers/gpu/drm/i915/selftests/i915_active.c
+++ b/drivers/gpu/drm/i915/selftests/i915_active.c
@@ -153,7 +153,7 @@ static int live_active_wait(void *arg)
if (IS_ERR(active))
return PTR_ERR(active);
- i915_active_wait(&active->base);
+ __i915_active_wait(&active->base, TASK_UNINTERRUPTIBLE);
if (!READ_ONCE(active->retired)) {
struct drm_printer p = drm_err_printer(__func__);
@@ -228,11 +228,11 @@ static int live_active_barrier(void *arg)
}
i915_active_release(&active->base);
+ if (err)
+ goto out;
- if (err == 0)
- err = i915_active_wait(&active->base);
-
- if (err == 0 && !READ_ONCE(active->retired)) {
+ __i915_active_wait(&active->base, TASK_UNINTERRUPTIBLE);
+ if (!READ_ONCE(active->retired)) {
pr_err("i915_active not retired after flushing barriers!\n");
err = -EINVAL;
}
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple kreffed struct
2020-03-27 11:22 [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Chris Wilson
@ 2020-03-27 11:22 ` Chris Wilson
2020-03-27 14:42 ` Ruhl, Michael J
2020-03-27 11:22 ` [Intel-gfx] [PATCH 3/3] drm/i915/perf: Schedule oa_config after modifying the contexts Chris Wilson
` (3 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Chris Wilson @ 2020-03-27 11:22 UTC (permalink / raw)
To: intel-gfx
For conveniences of callers that just want to use an i915_active to
track a wide array of concurrent timelines, wrap the base i915_active
struct inside a kref. This i915_active will self-destruct after use.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_active.c | 53 ++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_active.h | 4 +++
2 files changed, 57 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
index 7b685032cc1e..5df7704369fd 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -939,6 +939,59 @@ void i915_active_noop(struct dma_fence *fence, struct dma_fence_cb *cb)
active_fence_cb(fence, cb);
}
+struct auto_active {
+ struct i915_active base;
+ struct kref ref;
+};
+
+struct i915_active *i915_active_get(struct i915_active *ref)
+{
+ struct auto_active *aa = container_of(ref, typeof(*aa), base);
+
+ kref_get(&aa->ref);
+ return &aa->base;
+}
+
+static void auto_release(struct kref *ref)
+{
+ struct auto_active *aa = container_of(ref, typeof(*aa), ref);
+
+ i915_active_fini(&aa->base);
+ kfree(aa);
+}
+
+void i915_active_put(struct i915_active *ref)
+{
+ struct auto_active *aa = container_of(ref, typeof(*aa), base);
+
+ kref_put(&aa->ref, auto_release);
+}
+
+static int auto_active(struct i915_active *ref)
+{
+ i915_active_get(ref);
+ return 0;
+}
+
+static void auto_retire(struct i915_active *ref)
+{
+ i915_active_put(ref);
+}
+
+struct i915_active *i915_active_create(void)
+{
+ struct auto_active *aa;
+
+ aa = kmalloc(sizeof(*aa), GFP_KERNEL);
+ if (!aa)
+ return NULL;
+
+ kref_init(&aa->ref);
+ i915_active_init(&aa->base, auto_active, auto_retire);
+
+ return &aa->base;
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/i915_active.c"
#endif
diff --git a/drivers/gpu/drm/i915/i915_active.h b/drivers/gpu/drm/i915/i915_active.h
index 4f9aa7bab514..b526d310a585 100644
--- a/drivers/gpu/drm/i915/i915_active.h
+++ b/drivers/gpu/drm/i915/i915_active.h
@@ -225,4 +225,8 @@ void i915_request_add_active_barriers(struct i915_request *rq);
void i915_active_print(struct i915_active *ref, struct drm_printer *m);
void i915_active_unlock_wait(struct i915_active *ref);
+struct i915_active *i915_active_create(void);
+struct i915_active *i915_active_get(struct i915_active *ref);
+void i915_active_put(struct i915_active *ref);
+
#endif /* _I915_ACTIVE_H_ */
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915/perf: Schedule oa_config after modifying the contexts
2020-03-27 11:22 [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Chris Wilson
2020-03-27 11:22 ` [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple kreffed struct Chris Wilson
@ 2020-03-27 11:22 ` Chris Wilson
2020-03-30 13:17 ` Lionel Landwerlin
2020-03-27 12:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Patchwork
` (2 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Chris Wilson @ 2020-03-27 11:22 UTC (permalink / raw)
To: intel-gfx
We wish that the scheduler emit the context modification commands prior
to enabling the oa_config, for which we must explicitly inform it of the
ordering constraints. This is especially important as we now wait for
the final oa_config setup to be completed and as this wait may be on a
distinct context to the state modifications, we need that command packet
to be always last in the queue.
We borrow the i915_active for its ability to track multiple timelines
and the last dma_fence on each; a flexible dma_resv. Keeping track of
each dma_fence is important for us so that we can efficiently schedule
the requests and reprioritise as required.
Reported-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
drivers/gpu/drm/i915/i915_perf.c | 154 ++++++++++++++++---------
drivers/gpu/drm/i915/i915_perf_types.h | 5 +-
2 files changed, 102 insertions(+), 57 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 3222f6cd8255..faf4b0970775 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1961,10 +1961,11 @@ get_oa_vma(struct i915_perf_stream *stream, struct i915_oa_config *oa_config)
return i915_vma_get(oa_bo->vma);
}
-static struct i915_request *
+static int
emit_oa_config(struct i915_perf_stream *stream,
struct i915_oa_config *oa_config,
- struct intel_context *ce)
+ struct intel_context *ce,
+ struct i915_active *active)
{
struct i915_request *rq;
struct i915_vma *vma;
@@ -1972,7 +1973,7 @@ emit_oa_config(struct i915_perf_stream *stream,
vma = get_oa_vma(stream, oa_config);
if (IS_ERR(vma))
- return ERR_CAST(vma);
+ return PTR_ERR(vma);
err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL | PIN_HIGH);
if (err)
@@ -1986,6 +1987,18 @@ emit_oa_config(struct i915_perf_stream *stream,
goto err_vma_unpin;
}
+ if (!IS_ERR_OR_NULL(active)) {
+ /* After all individual context modifications */
+ err = i915_request_await_active(rq, active,
+ I915_ACTIVE_AWAIT_ALL);
+ if (err)
+ goto err_add_request;
+
+ err = i915_active_add_request(active, rq);
+ if (err)
+ goto err_add_request;
+ }
+
i915_vma_lock(vma);
err = i915_request_await_object(rq, vma->obj, 0);
if (!err)
@@ -2000,14 +2013,13 @@ emit_oa_config(struct i915_perf_stream *stream,
if (err)
goto err_add_request;
- i915_request_get(rq);
err_add_request:
i915_request_add(rq);
err_vma_unpin:
i915_vma_unpin(vma);
err_vma_put:
i915_vma_put(vma);
- return err ? ERR_PTR(err) : rq;
+ return err;
}
static struct intel_context *oa_context(struct i915_perf_stream *stream)
@@ -2015,8 +2027,9 @@ static struct intel_context *oa_context(struct i915_perf_stream *stream)
return stream->pinned_ctx ?: stream->engine->kernel_context;
}
-static struct i915_request *
-hsw_enable_metric_set(struct i915_perf_stream *stream)
+static int
+hsw_enable_metric_set(struct i915_perf_stream *stream,
+ struct i915_active *active)
{
struct intel_uncore *uncore = stream->uncore;
@@ -2035,7 +2048,9 @@ hsw_enable_metric_set(struct i915_perf_stream *stream)
intel_uncore_rmw(uncore, GEN6_UCGCTL1,
0, GEN6_CSUNIT_CLOCK_GATE_DISABLE);
- return emit_oa_config(stream, stream->oa_config, oa_context(stream));
+ return emit_oa_config(stream,
+ stream->oa_config, oa_context(stream),
+ active);
}
static void hsw_disable_metric_set(struct i915_perf_stream *stream)
@@ -2182,8 +2197,10 @@ static int gen8_modify_context(struct intel_context *ce,
return err;
}
-static int gen8_modify_self(struct intel_context *ce,
- const struct flex *flex, unsigned int count)
+static int
+gen8_modify_self(struct intel_context *ce,
+ const struct flex *flex, unsigned int count,
+ struct i915_active *active)
{
struct i915_request *rq;
int err;
@@ -2194,8 +2211,17 @@ static int gen8_modify_self(struct intel_context *ce,
if (IS_ERR(rq))
return PTR_ERR(rq);
+ if (!IS_ERR_OR_NULL(active)) {
+ err = i915_active_add_request(active, rq);
+ if (err)
+ goto err_add_request;
+ }
+
err = gen8_load_flex(rq, ce, flex, count);
+ if (err)
+ goto err_add_request;
+err_add_request:
i915_request_add(rq);
return err;
}
@@ -2229,7 +2255,8 @@ static int gen8_configure_context(struct i915_gem_context *ctx,
return err;
}
-static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool enable)
+static int gen12_configure_oar_context(struct i915_perf_stream *stream,
+ struct i915_active *active)
{
int err;
struct intel_context *ce = stream->pinned_ctx;
@@ -2238,7 +2265,7 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
{
GEN8_OACTXCONTROL,
stream->perf->ctx_oactxctrl_offset + 1,
- enable ? GEN8_OA_COUNTER_RESUME : 0,
+ active ? GEN8_OA_COUNTER_RESUME : 0,
},
};
/* Offsets in regs_lri are not used since this configuration is only
@@ -2250,13 +2277,13 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
GEN12_OAR_OACONTROL,
GEN12_OAR_OACONTROL_OFFSET + 1,
(format << GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT) |
- (enable ? GEN12_OAR_OACONTROL_COUNTER_ENABLE : 0)
+ (active ? GEN12_OAR_OACONTROL_COUNTER_ENABLE : 0)
},
{
RING_CONTEXT_CONTROL(ce->engine->mmio_base),
CTX_CONTEXT_CONTROL,
_MASKED_FIELD(GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE,
- enable ?
+ active ?
GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE :
0)
},
@@ -2273,7 +2300,7 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
return err;
/* Apply regs_lri using LRI with pinned context */
- return gen8_modify_self(ce, regs_lri, ARRAY_SIZE(regs_lri));
+ return gen8_modify_self(ce, regs_lri, ARRAY_SIZE(regs_lri), active);
}
/*
@@ -2301,9 +2328,11 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
* Note: it's only the RCS/Render context that has any OA state.
* Note: the first flex register passed must always be R_PWR_CLK_STATE
*/
-static int oa_configure_all_contexts(struct i915_perf_stream *stream,
- struct flex *regs,
- size_t num_regs)
+static int
+oa_configure_all_contexts(struct i915_perf_stream *stream,
+ struct flex *regs,
+ size_t num_regs,
+ struct i915_active *active)
{
struct drm_i915_private *i915 = stream->perf->i915;
struct intel_engine_cs *engine;
@@ -2360,7 +2389,7 @@ static int oa_configure_all_contexts(struct i915_perf_stream *stream,
regs[0].value = intel_sseu_make_rpcs(i915, &ce->sseu);
- err = gen8_modify_self(ce, regs, num_regs);
+ err = gen8_modify_self(ce, regs, num_regs, active);
if (err)
return err;
}
@@ -2368,8 +2397,10 @@ static int oa_configure_all_contexts(struct i915_perf_stream *stream,
return 0;
}
-static int gen12_configure_all_contexts(struct i915_perf_stream *stream,
- const struct i915_oa_config *oa_config)
+static int
+gen12_configure_all_contexts(struct i915_perf_stream *stream,
+ const struct i915_oa_config *oa_config,
+ struct i915_active *active)
{
struct flex regs[] = {
{
@@ -2378,11 +2409,15 @@ static int gen12_configure_all_contexts(struct i915_perf_stream *stream,
},
};
- return oa_configure_all_contexts(stream, regs, ARRAY_SIZE(regs));
+ return oa_configure_all_contexts(stream,
+ regs, ARRAY_SIZE(regs),
+ active);
}
-static int lrc_configure_all_contexts(struct i915_perf_stream *stream,
- const struct i915_oa_config *oa_config)
+static int
+lrc_configure_all_contexts(struct i915_perf_stream *stream,
+ const struct i915_oa_config *oa_config,
+ struct i915_active *active)
{
/* The MMIO offsets for Flex EU registers aren't contiguous */
const u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset;
@@ -2415,11 +2450,14 @@ static int lrc_configure_all_contexts(struct i915_perf_stream *stream,
for (i = 2; i < ARRAY_SIZE(regs); i++)
regs[i].value = oa_config_flex_reg(oa_config, regs[i].reg);
- return oa_configure_all_contexts(stream, regs, ARRAY_SIZE(regs));
+ return oa_configure_all_contexts(stream,
+ regs, ARRAY_SIZE(regs),
+ active);
}
-static struct i915_request *
-gen8_enable_metric_set(struct i915_perf_stream *stream)
+static int
+gen8_enable_metric_set(struct i915_perf_stream *stream,
+ struct i915_active *active)
{
struct intel_uncore *uncore = stream->uncore;
struct i915_oa_config *oa_config = stream->oa_config;
@@ -2459,11 +2497,13 @@ gen8_enable_metric_set(struct i915_perf_stream *stream)
* to make sure all slices/subslices are ON before writing to NOA
* registers.
*/
- ret = lrc_configure_all_contexts(stream, oa_config);
+ ret = lrc_configure_all_contexts(stream, oa_config, active);
if (ret)
- return ERR_PTR(ret);
+ return ret;
- return emit_oa_config(stream, oa_config, oa_context(stream));
+ return emit_oa_config(stream,
+ stream->oa_config, oa_context(stream),
+ active);
}
static u32 oag_report_ctx_switches(const struct i915_perf_stream *stream)
@@ -2473,8 +2513,9 @@ static u32 oag_report_ctx_switches(const struct i915_perf_stream *stream)
0 : GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS);
}
-static struct i915_request *
-gen12_enable_metric_set(struct i915_perf_stream *stream)
+static int
+gen12_enable_metric_set(struct i915_perf_stream *stream,
+ struct i915_active *active)
{
struct intel_uncore *uncore = stream->uncore;
struct i915_oa_config *oa_config = stream->oa_config;
@@ -2503,9 +2544,9 @@ gen12_enable_metric_set(struct i915_perf_stream *stream)
* to make sure all slices/subslices are ON before writing to NOA
* registers.
*/
- ret = gen12_configure_all_contexts(stream, oa_config);
+ ret = gen12_configure_all_contexts(stream, oa_config, active);
if (ret)
- return ERR_PTR(ret);
+ return ret;
/*
* For Gen12, performance counters are context
@@ -2513,12 +2554,14 @@ gen12_enable_metric_set(struct i915_perf_stream *stream)
* requested this.
*/
if (stream->ctx) {
- ret = gen12_configure_oar_context(stream, true);
+ ret = gen12_configure_oar_context(stream, active);
if (ret)
- return ERR_PTR(ret);
+ return ret;
}
- return emit_oa_config(stream, oa_config, oa_context(stream));
+ return emit_oa_config(stream,
+ stream->oa_config, oa_context(stream),
+ active);
}
static void gen8_disable_metric_set(struct i915_perf_stream *stream)
@@ -2526,7 +2569,7 @@ static void gen8_disable_metric_set(struct i915_perf_stream *stream)
struct intel_uncore *uncore = stream->uncore;
/* Reset all contexts' slices/subslices configurations. */
- lrc_configure_all_contexts(stream, NULL);
+ lrc_configure_all_contexts(stream, NULL, NULL);
intel_uncore_rmw(uncore, GDT_CHICKEN_BITS, GT_NOA_ENABLE, 0);
}
@@ -2536,7 +2579,7 @@ static void gen10_disable_metric_set(struct i915_perf_stream *stream)
struct intel_uncore *uncore = stream->uncore;
/* Reset all contexts' slices/subslices configurations. */
- lrc_configure_all_contexts(stream, NULL);
+ lrc_configure_all_contexts(stream, NULL, NULL);
/* Make sure we disable noa to save power. */
intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
@@ -2547,11 +2590,11 @@ static void gen12_disable_metric_set(struct i915_perf_stream *stream)
struct intel_uncore *uncore = stream->uncore;
/* Reset all contexts' slices/subslices configurations. */
- gen12_configure_all_contexts(stream, NULL);
+ gen12_configure_all_contexts(stream, NULL, NULL);
/* disable the context save/restore or OAR counters */
if (stream->ctx)
- gen12_configure_oar_context(stream, false);
+ gen12_configure_oar_context(stream, NULL);
/* Make sure we disable noa to save power. */
intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
@@ -2723,16 +2766,19 @@ static const struct i915_perf_stream_ops i915_oa_stream_ops = {
static int i915_perf_stream_enable_sync(struct i915_perf_stream *stream)
{
- struct i915_request *rq;
+ struct i915_active *active;
+ int err;
- rq = stream->perf->ops.enable_metric_set(stream);
- if (IS_ERR(rq))
- return PTR_ERR(rq);
+ active = i915_active_create();
+ if (!active)
+ return -ENOMEM;
- i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);
- i915_request_put(rq);
+ err = stream->perf->ops.enable_metric_set(stream, active);
+ if (err == 0)
+ __i915_active_wait(active, TASK_UNINTERRUPTIBLE);
- return 0;
+ i915_active_put(active);
+ return err;
}
static void
@@ -3217,7 +3263,7 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream,
return -EINVAL;
if (config != stream->oa_config) {
- struct i915_request *rq;
+ int err;
/*
* If OA is bound to a specific context, emit the
@@ -3228,13 +3274,11 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream,
* When set globally, we use a low priority kernel context,
* so it will effectively take effect when idle.
*/
- rq = emit_oa_config(stream, config, oa_context(stream));
- if (!IS_ERR(rq)) {
+ err = emit_oa_config(stream, config, oa_context(stream), NULL);
+ if (!err)
config = xchg(&stream->oa_config, config);
- i915_request_put(rq);
- } else {
- ret = PTR_ERR(rq);
- }
+ else
+ ret = err;
}
i915_oa_config_put(config);
diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
index 32289cbda648..de5cbb40fddf 100644
--- a/drivers/gpu/drm/i915/i915_perf_types.h
+++ b/drivers/gpu/drm/i915/i915_perf_types.h
@@ -22,6 +22,7 @@
struct drm_i915_private;
struct file;
+struct i915_active;
struct i915_gem_context;
struct i915_perf;
struct i915_vma;
@@ -340,8 +341,8 @@ struct i915_oa_ops {
* counter reports being sampled. May apply system constraints such as
* disabling EU clock gating as required.
*/
- struct i915_request *
- (*enable_metric_set)(struct i915_perf_stream *stream);
+ int (*enable_metric_set)(struct i915_perf_stream *stream,
+ struct i915_active *active);
/**
* @disable_metric_set: Remove system constraints associated with using
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Allow for different modes of interruptible i915_active_wait
2020-03-27 11:22 [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Chris Wilson
2020-03-27 11:22 ` [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple kreffed struct Chris Wilson
2020-03-27 11:22 ` [Intel-gfx] [PATCH 3/3] drm/i915/perf: Schedule oa_config after modifying the contexts Chris Wilson
@ 2020-03-27 12:39 ` Patchwork
2020-03-28 13:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-30 16:07 ` [Intel-gfx] [PATCH 1/3] " Mika Kuoppala
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-03-27 12:39 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Allow for different modes of interruptible i915_active_wait
URL : https://patchwork.freedesktop.org/series/75166/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8201 -> Patchwork_17115
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/index.html
Known issues
------------
Here are the changes found in Patchwork_17115 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank:
- fi-elk-e7500: [PASS][1] -> [FAIL][2] ([i915#34])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/fi-elk-e7500/igt@kms_flip@basic-flip-vs-wf_vblank.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/fi-elk-e7500/igt@kms_flip@basic-flip-vs-wf_vblank.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- fi-kbl-guc: [FAIL][3] ([i915#579]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/fi-kbl-guc/igt@i915_pm_rpm@module-reload.html
[i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
[i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579
Participating hosts (46 -> 42)
------------------------------
Additional (2): fi-skl-6770hq fi-byt-n2820
Missing (6): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7560u fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8201 -> Patchwork_17115
CI-20190529: 20190529
CI_DRM_8201: df2dc60809f02d714ddc26136c24d6fc6f5268b6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5541: f3d9a3a5fa9ea281b859a5b81201e6147b9fbad1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17115: 4dc34cd0a34d2ae8cd197ef18469c472361aa03a @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4dc34cd0a34d drm/i915/perf: Schedule oa_config after modifying the contexts
0505b0ddd01b drm/i915: Wrap i915_active in a simple kreffed struct
78b0c269c4db drm/i915: Allow for different modes of interruptible i915_active_wait
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple kreffed struct
2020-03-27 11:22 ` [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple kreffed struct Chris Wilson
@ 2020-03-27 14:42 ` Ruhl, Michael J
0 siblings, 0 replies; 9+ messages in thread
From: Ruhl, Michael J @ 2020-03-27 14:42 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
>-----Original Message-----
>From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Chris
>Wilson
>Sent: Friday, March 27, 2020 7:22 AM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple
>kreffed struct
>
>For conveniences of callers that just want to use an i915_active to
>track a wide array of concurrent timelines, wrap the base i915_active
>struct inside a kref. This i915_active will self-destruct after use.
>
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>---
> drivers/gpu/drm/i915/i915_active.c | 53
>++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_active.h | 4 +++
> 2 files changed, 57 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_active.c
>b/drivers/gpu/drm/i915/i915_active.c
>index 7b685032cc1e..5df7704369fd 100644
>--- a/drivers/gpu/drm/i915/i915_active.c
>+++ b/drivers/gpu/drm/i915/i915_active.c
>@@ -939,6 +939,59 @@ void i915_active_noop(struct dma_fence *fence,
>struct dma_fence_cb *cb)
> active_fence_cb(fence, cb);
> }
>
>+struct auto_active {
>+ struct i915_active base;
>+ struct kref ref;
>+};
>+
>+struct i915_active *i915_active_get(struct i915_active *ref)
>+{
>+ struct auto_active *aa = container_of(ref, typeof(*aa), base);
>+
>+ kref_get(&aa->ref);
Should this be kref_get_unless_zero()?
Mike
>+ return &aa->base;
>+}
>+
>+static void auto_release(struct kref *ref)
>+{
>+ struct auto_active *aa = container_of(ref, typeof(*aa), ref);
>+
>+ i915_active_fini(&aa->base);
>+ kfree(aa);
>+}
>+
>+void i915_active_put(struct i915_active *ref)
>+{
>+ struct auto_active *aa = container_of(ref, typeof(*aa), base);
>+
>+ kref_put(&aa->ref, auto_release);
>+}
>+
>+static int auto_active(struct i915_active *ref)
>+{
>+ i915_active_get(ref);
>+ return 0;
>+}
>+
>+static void auto_retire(struct i915_active *ref)
>+{
>+ i915_active_put(ref);
>+}
>+
>+struct i915_active *i915_active_create(void)
>+{
>+ struct auto_active *aa;
>+
>+ aa = kmalloc(sizeof(*aa), GFP_KERNEL);
>+ if (!aa)
>+ return NULL;
>+
>+ kref_init(&aa->ref);
>+ i915_active_init(&aa->base, auto_active, auto_retire);
>+
>+ return &aa->base;
>+}
>+
> #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> #include "selftests/i915_active.c"
> #endif
>diff --git a/drivers/gpu/drm/i915/i915_active.h
>b/drivers/gpu/drm/i915/i915_active.h
>index 4f9aa7bab514..b526d310a585 100644
>--- a/drivers/gpu/drm/i915/i915_active.h
>+++ b/drivers/gpu/drm/i915/i915_active.h
>@@ -225,4 +225,8 @@ void i915_request_add_active_barriers(struct
>i915_request *rq);
> void i915_active_print(struct i915_active *ref, struct drm_printer *m);
> void i915_active_unlock_wait(struct i915_active *ref);
>
>+struct i915_active *i915_active_create(void);
>+struct i915_active *i915_active_get(struct i915_active *ref);
>+void i915_active_put(struct i915_active *ref);
>+
> #endif /* _I915_ACTIVE_H_ */
>--
>2.20.1
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Allow for different modes of interruptible i915_active_wait
2020-03-27 11:22 [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Chris Wilson
` (2 preceding siblings ...)
2020-03-27 12:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Patchwork
@ 2020-03-28 13:06 ` Patchwork
2020-03-30 16:07 ` [Intel-gfx] [PATCH 1/3] " Mika Kuoppala
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2020-03-28 13:06 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/3] drm/i915: Allow for different modes of interruptible i915_active_wait
URL : https://patchwork.freedesktop.org/series/75166/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8201_full -> Patchwork_17115_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_17115_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_17115_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_17115_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_getfb@getfb-handle-not-fb:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl1/igt@kms_getfb@getfb-handle-not-fb.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl9/igt@kms_getfb@getfb-handle-not-fb.html
* igt@kms_lease@lease-uevent:
- shard-hsw: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-hsw6/igt@kms_lease@lease-uevent.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-hsw2/igt@kms_lease@lease-uevent.html
Known issues
------------
Here are the changes found in Patchwork_17115_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@engines-mixed-process@vcs0:
- shard-skl: [PASS][5] -> [FAIL][6] ([i915#1528])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl1/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl5/igt@gem_ctx_persistence@engines-mixed-process@vcs0.html
* igt@gem_exec_async@concurrent-writes-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +6 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb7/igt@gem_exec_async@concurrent-writes-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb4/igt@gem_exec_async@concurrent-writes-bsd.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112080]) +13 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb6/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@implicit-both-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([i915#677]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb6/igt@gem_exec_schedule@implicit-both-bsd.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb1/igt@gem_exec_schedule@implicit-both-bsd.html
* igt@gem_exec_schedule@implicit-write-read-bsd1:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109276] / [i915#677]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb1/igt@gem_exec_schedule@implicit-write-read-bsd1.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb6/igt@gem_exec_schedule@implicit-write-read-bsd1.html
* igt@i915_selftest@live@requests:
- shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#1531])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-tglb8/igt@i915_selftest@live@requests.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-tglb6/igt@i915_selftest@live@requests.html
* igt@i915_suspend@fence-restore-untiled:
- shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-apl1/igt@i915_suspend@fence-restore-untiled.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-apl4/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_cursor_crc@pipe-a-cursor-128x128-random:
- shard-kbl: [PASS][19] -> [FAIL][20] ([i915#54] / [i915#93] / [i915#95])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +5 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-skl: [PASS][23] -> [INCOMPLETE][24] ([i915#300])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][25] -> [FAIL][26] ([i915#79])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][27] -> [INCOMPLETE][28] ([i915#221])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl3/igt@kms_flip@flip-vs-suspend.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl1/igt@kms_flip@flip-vs-suspend.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][29] -> [FAIL][30] ([i915#1188])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl9/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-kbl: [PASS][31] -> [DMESG-WARN][32] ([i915#180] / [i915#93] / [i915#95])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][33] -> [FAIL][34] ([fdo#108145] / [i915#265])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#109441]) +2 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb8/igt@kms_psr@psr2_cursor_plane_move.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][37] -> [FAIL][38] ([i915#31])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-apl6/igt@kms_setmode@basic.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-apl2/igt@kms_setmode@basic.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [PASS][39] -> [SKIP][40] ([fdo#109276]) +20 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb2/igt@prime_busy@hang-bsd2.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb8/igt@prime_busy@hang-bsd2.html
#### Possible fixes ####
* {igt@gem_ctx_isolation@preservation-s3@bcs0}:
- shard-apl: [DMESG-WARN][41] ([i915#180]) -> [PASS][42] +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-apl8/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-apl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* {igt@gem_ctx_isolation@preservation-s3@vcs0}:
- shard-skl: [INCOMPLETE][43] ([i915#198]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl7/igt@gem_ctx_isolation@preservation-s3@vcs0.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl10/igt@gem_ctx_isolation@preservation-s3@vcs0.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [SKIP][45] ([fdo#109276]) -> [PASS][46] +18 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb6/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb2/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [SKIP][47] ([fdo#112146]) -> [PASS][48] +7 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-kbl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +2 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html
* igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen:
- shard-apl: [FAIL][51] ([i915#54]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-apl3/igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen.html
* igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge:
- shard-kbl: [FAIL][53] ([i915#70] / [i915#93] / [i915#95]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-kbl1/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-kbl2/igt@kms_cursor_edge_walk@pipe-a-64x64-bottom-edge.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [FAIL][55] ([IGT#5]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
- shard-glk: [FAIL][57] ([i915#52] / [i915#54]) -> [PASS][58] +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-glk8/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-iclb: [TIMEOUT][59] -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-suspend.html
- shard-apl: [DMESG-WARN][61] ([i915#180] / [i915#95]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-apl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-apl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
- shard-skl: [FAIL][63] ([i915#49]) -> [PASS][64] +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl7/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl10/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][65] ([i915#1188]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl9/igt@kms_hdr@bpc-switch-dpms.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl7/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][67] ([fdo#108145]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [SKIP][69] ([fdo#109441]) -> [PASS][70] +1 similar issue
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb7/igt@kms_psr@psr2_primary_page_flip.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
* igt@perf_pmu@init-busy-vcs1:
- shard-iclb: [SKIP][71] ([fdo#112080]) -> [PASS][72] +15 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb8/igt@perf_pmu@init-busy-vcs1.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb1/igt@perf_pmu@init-busy-vcs1.html
#### Warnings ####
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][73] ([fdo#109642] / [fdo#111068]) -> [FAIL][74] ([i915#608])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8201/shard-iclb5/igt@kms_psr2_su@page_flip.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/shard-iclb2/igt@kms_psr2_su@page_flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528
[i915#1531]: https://gitlab.freedesktop.org/drm/intel/issues/1531
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#608]: https://gitlab.freedesktop.org/drm/intel/issues/608
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#70]: https://gitlab.freedesktop.org/drm/intel/issues/70
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#93]: https://gitlab.freedesktop.org/drm/intel/issues/93
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8201 -> Patchwork_17115
CI-20190529: 20190529
CI_DRM_8201: df2dc60809f02d714ddc26136c24d6fc6f5268b6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5541: f3d9a3a5fa9ea281b859a5b81201e6147b9fbad1 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17115: 4dc34cd0a34d2ae8cd197ef18469c472361aa03a @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17115/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915/perf: Schedule oa_config after modifying the contexts
2020-03-27 11:22 ` [Intel-gfx] [PATCH 3/3] drm/i915/perf: Schedule oa_config after modifying the contexts Chris Wilson
@ 2020-03-30 13:17 ` Lionel Landwerlin
0 siblings, 0 replies; 9+ messages in thread
From: Lionel Landwerlin @ 2020-03-30 13:17 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 27/03/2020 13:22, Chris Wilson wrote:
> We wish that the scheduler emit the context modification commands prior
> to enabling the oa_config, for which we must explicitly inform it of the
> ordering constraints. This is especially important as we now wait for
> the final oa_config setup to be completed and as this wait may be on a
> distinct context to the state modifications, we need that command packet
> to be always last in the queue.
>
> We borrow the i915_active for its ability to track multiple timelines
> and the last dma_fence on each; a flexible dma_resv. Keeping track of
> each dma_fence is important for us so that we can efficiently schedule
> the requests and reprioritise as required.
>
> Reported-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
> drivers/gpu/drm/i915/i915_perf.c | 154 ++++++++++++++++---------
> drivers/gpu/drm/i915/i915_perf_types.h | 5 +-
> 2 files changed, 102 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
> index 3222f6cd8255..faf4b0970775 100644
> --- a/drivers/gpu/drm/i915/i915_perf.c
> +++ b/drivers/gpu/drm/i915/i915_perf.c
> @@ -1961,10 +1961,11 @@ get_oa_vma(struct i915_perf_stream *stream, struct i915_oa_config *oa_config)
> return i915_vma_get(oa_bo->vma);
> }
>
> -static struct i915_request *
> +static int
> emit_oa_config(struct i915_perf_stream *stream,
> struct i915_oa_config *oa_config,
> - struct intel_context *ce)
> + struct intel_context *ce,
> + struct i915_active *active)
> {
> struct i915_request *rq;
> struct i915_vma *vma;
> @@ -1972,7 +1973,7 @@ emit_oa_config(struct i915_perf_stream *stream,
>
> vma = get_oa_vma(stream, oa_config);
> if (IS_ERR(vma))
> - return ERR_CAST(vma);
> + return PTR_ERR(vma);
>
> err = i915_vma_pin(vma, 0, 0, PIN_GLOBAL | PIN_HIGH);
> if (err)
> @@ -1986,6 +1987,18 @@ emit_oa_config(struct i915_perf_stream *stream,
> goto err_vma_unpin;
> }
>
> + if (!IS_ERR_OR_NULL(active)) {
> + /* After all individual context modifications */
> + err = i915_request_await_active(rq, active,
> + I915_ACTIVE_AWAIT_ALL);
> + if (err)
> + goto err_add_request;
> +
> + err = i915_active_add_request(active, rq);
> + if (err)
> + goto err_add_request;
> + }
> +
> i915_vma_lock(vma);
> err = i915_request_await_object(rq, vma->obj, 0);
> if (!err)
> @@ -2000,14 +2013,13 @@ emit_oa_config(struct i915_perf_stream *stream,
> if (err)
> goto err_add_request;
>
> - i915_request_get(rq);
> err_add_request:
> i915_request_add(rq);
> err_vma_unpin:
> i915_vma_unpin(vma);
> err_vma_put:
> i915_vma_put(vma);
> - return err ? ERR_PTR(err) : rq;
> + return err;
> }
>
> static struct intel_context *oa_context(struct i915_perf_stream *stream)
> @@ -2015,8 +2027,9 @@ static struct intel_context *oa_context(struct i915_perf_stream *stream)
> return stream->pinned_ctx ?: stream->engine->kernel_context;
> }
>
> -static struct i915_request *
> -hsw_enable_metric_set(struct i915_perf_stream *stream)
> +static int
> +hsw_enable_metric_set(struct i915_perf_stream *stream,
> + struct i915_active *active)
> {
> struct intel_uncore *uncore = stream->uncore;
>
> @@ -2035,7 +2048,9 @@ hsw_enable_metric_set(struct i915_perf_stream *stream)
> intel_uncore_rmw(uncore, GEN6_UCGCTL1,
> 0, GEN6_CSUNIT_CLOCK_GATE_DISABLE);
>
> - return emit_oa_config(stream, stream->oa_config, oa_context(stream));
> + return emit_oa_config(stream,
> + stream->oa_config, oa_context(stream),
> + active);
> }
>
> static void hsw_disable_metric_set(struct i915_perf_stream *stream)
> @@ -2182,8 +2197,10 @@ static int gen8_modify_context(struct intel_context *ce,
> return err;
> }
>
> -static int gen8_modify_self(struct intel_context *ce,
> - const struct flex *flex, unsigned int count)
> +static int
> +gen8_modify_self(struct intel_context *ce,
> + const struct flex *flex, unsigned int count,
> + struct i915_active *active)
> {
> struct i915_request *rq;
> int err;
> @@ -2194,8 +2211,17 @@ static int gen8_modify_self(struct intel_context *ce,
> if (IS_ERR(rq))
> return PTR_ERR(rq);
>
> + if (!IS_ERR_OR_NULL(active)) {
> + err = i915_active_add_request(active, rq);
> + if (err)
> + goto err_add_request;
> + }
> +
> err = gen8_load_flex(rq, ce, flex, count);
> + if (err)
> + goto err_add_request;
>
> +err_add_request:
> i915_request_add(rq);
> return err;
> }
> @@ -2229,7 +2255,8 @@ static int gen8_configure_context(struct i915_gem_context *ctx,
> return err;
> }
>
> -static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool enable)
> +static int gen12_configure_oar_context(struct i915_perf_stream *stream,
> + struct i915_active *active)
> {
> int err;
> struct intel_context *ce = stream->pinned_ctx;
> @@ -2238,7 +2265,7 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
> {
> GEN8_OACTXCONTROL,
> stream->perf->ctx_oactxctrl_offset + 1,
> - enable ? GEN8_OA_COUNTER_RESUME : 0,
> + active ? GEN8_OA_COUNTER_RESUME : 0,
> },
> };
> /* Offsets in regs_lri are not used since this configuration is only
> @@ -2250,13 +2277,13 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
> GEN12_OAR_OACONTROL,
> GEN12_OAR_OACONTROL_OFFSET + 1,
> (format << GEN12_OAR_OACONTROL_COUNTER_FORMAT_SHIFT) |
> - (enable ? GEN12_OAR_OACONTROL_COUNTER_ENABLE : 0)
> + (active ? GEN12_OAR_OACONTROL_COUNTER_ENABLE : 0)
> },
> {
> RING_CONTEXT_CONTROL(ce->engine->mmio_base),
> CTX_CONTEXT_CONTROL,
> _MASKED_FIELD(GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE,
> - enable ?
> + active ?
> GEN12_CTX_CTRL_OAR_CONTEXT_ENABLE :
> 0)
> },
> @@ -2273,7 +2300,7 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
> return err;
>
> /* Apply regs_lri using LRI with pinned context */
> - return gen8_modify_self(ce, regs_lri, ARRAY_SIZE(regs_lri));
> + return gen8_modify_self(ce, regs_lri, ARRAY_SIZE(regs_lri), active);
> }
>
> /*
> @@ -2301,9 +2328,11 @@ static int gen12_configure_oar_context(struct i915_perf_stream *stream, bool ena
> * Note: it's only the RCS/Render context that has any OA state.
> * Note: the first flex register passed must always be R_PWR_CLK_STATE
> */
> -static int oa_configure_all_contexts(struct i915_perf_stream *stream,
> - struct flex *regs,
> - size_t num_regs)
> +static int
> +oa_configure_all_contexts(struct i915_perf_stream *stream,
> + struct flex *regs,
> + size_t num_regs,
> + struct i915_active *active)
> {
> struct drm_i915_private *i915 = stream->perf->i915;
> struct intel_engine_cs *engine;
> @@ -2360,7 +2389,7 @@ static int oa_configure_all_contexts(struct i915_perf_stream *stream,
>
> regs[0].value = intel_sseu_make_rpcs(i915, &ce->sseu);
>
> - err = gen8_modify_self(ce, regs, num_regs);
> + err = gen8_modify_self(ce, regs, num_regs, active);
> if (err)
> return err;
> }
> @@ -2368,8 +2397,10 @@ static int oa_configure_all_contexts(struct i915_perf_stream *stream,
> return 0;
> }
>
> -static int gen12_configure_all_contexts(struct i915_perf_stream *stream,
> - const struct i915_oa_config *oa_config)
> +static int
> +gen12_configure_all_contexts(struct i915_perf_stream *stream,
> + const struct i915_oa_config *oa_config,
> + struct i915_active *active)
> {
> struct flex regs[] = {
> {
> @@ -2378,11 +2409,15 @@ static int gen12_configure_all_contexts(struct i915_perf_stream *stream,
> },
> };
>
> - return oa_configure_all_contexts(stream, regs, ARRAY_SIZE(regs));
> + return oa_configure_all_contexts(stream,
> + regs, ARRAY_SIZE(regs),
> + active);
> }
>
> -static int lrc_configure_all_contexts(struct i915_perf_stream *stream,
> - const struct i915_oa_config *oa_config)
> +static int
> +lrc_configure_all_contexts(struct i915_perf_stream *stream,
> + const struct i915_oa_config *oa_config,
> + struct i915_active *active)
> {
> /* The MMIO offsets for Flex EU registers aren't contiguous */
> const u32 ctx_flexeu0 = stream->perf->ctx_flexeu0_offset;
> @@ -2415,11 +2450,14 @@ static int lrc_configure_all_contexts(struct i915_perf_stream *stream,
> for (i = 2; i < ARRAY_SIZE(regs); i++)
> regs[i].value = oa_config_flex_reg(oa_config, regs[i].reg);
>
> - return oa_configure_all_contexts(stream, regs, ARRAY_SIZE(regs));
> + return oa_configure_all_contexts(stream,
> + regs, ARRAY_SIZE(regs),
> + active);
> }
>
> -static struct i915_request *
> -gen8_enable_metric_set(struct i915_perf_stream *stream)
> +static int
> +gen8_enable_metric_set(struct i915_perf_stream *stream,
> + struct i915_active *active)
> {
> struct intel_uncore *uncore = stream->uncore;
> struct i915_oa_config *oa_config = stream->oa_config;
> @@ -2459,11 +2497,13 @@ gen8_enable_metric_set(struct i915_perf_stream *stream)
> * to make sure all slices/subslices are ON before writing to NOA
> * registers.
> */
> - ret = lrc_configure_all_contexts(stream, oa_config);
> + ret = lrc_configure_all_contexts(stream, oa_config, active);
> if (ret)
> - return ERR_PTR(ret);
> + return ret;
>
> - return emit_oa_config(stream, oa_config, oa_context(stream));
> + return emit_oa_config(stream,
> + stream->oa_config, oa_context(stream),
> + active);
> }
>
> static u32 oag_report_ctx_switches(const struct i915_perf_stream *stream)
> @@ -2473,8 +2513,9 @@ static u32 oag_report_ctx_switches(const struct i915_perf_stream *stream)
> 0 : GEN12_OAG_OA_DEBUG_DISABLE_CTX_SWITCH_REPORTS);
> }
>
> -static struct i915_request *
> -gen12_enable_metric_set(struct i915_perf_stream *stream)
> +static int
> +gen12_enable_metric_set(struct i915_perf_stream *stream,
> + struct i915_active *active)
> {
> struct intel_uncore *uncore = stream->uncore;
> struct i915_oa_config *oa_config = stream->oa_config;
> @@ -2503,9 +2544,9 @@ gen12_enable_metric_set(struct i915_perf_stream *stream)
> * to make sure all slices/subslices are ON before writing to NOA
> * registers.
> */
> - ret = gen12_configure_all_contexts(stream, oa_config);
> + ret = gen12_configure_all_contexts(stream, oa_config, active);
> if (ret)
> - return ERR_PTR(ret);
> + return ret;
>
> /*
> * For Gen12, performance counters are context
> @@ -2513,12 +2554,14 @@ gen12_enable_metric_set(struct i915_perf_stream *stream)
> * requested this.
> */
> if (stream->ctx) {
> - ret = gen12_configure_oar_context(stream, true);
> + ret = gen12_configure_oar_context(stream, active);
> if (ret)
> - return ERR_PTR(ret);
> + return ret;
> }
>
> - return emit_oa_config(stream, oa_config, oa_context(stream));
> + return emit_oa_config(stream,
> + stream->oa_config, oa_context(stream),
> + active);
> }
>
> static void gen8_disable_metric_set(struct i915_perf_stream *stream)
> @@ -2526,7 +2569,7 @@ static void gen8_disable_metric_set(struct i915_perf_stream *stream)
> struct intel_uncore *uncore = stream->uncore;
>
> /* Reset all contexts' slices/subslices configurations. */
> - lrc_configure_all_contexts(stream, NULL);
> + lrc_configure_all_contexts(stream, NULL, NULL);
>
> intel_uncore_rmw(uncore, GDT_CHICKEN_BITS, GT_NOA_ENABLE, 0);
> }
> @@ -2536,7 +2579,7 @@ static void gen10_disable_metric_set(struct i915_perf_stream *stream)
> struct intel_uncore *uncore = stream->uncore;
>
> /* Reset all contexts' slices/subslices configurations. */
> - lrc_configure_all_contexts(stream, NULL);
> + lrc_configure_all_contexts(stream, NULL, NULL);
>
> /* Make sure we disable noa to save power. */
> intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
> @@ -2547,11 +2590,11 @@ static void gen12_disable_metric_set(struct i915_perf_stream *stream)
> struct intel_uncore *uncore = stream->uncore;
>
> /* Reset all contexts' slices/subslices configurations. */
> - gen12_configure_all_contexts(stream, NULL);
> + gen12_configure_all_contexts(stream, NULL, NULL);
>
> /* disable the context save/restore or OAR counters */
> if (stream->ctx)
> - gen12_configure_oar_context(stream, false);
> + gen12_configure_oar_context(stream, NULL);
>
> /* Make sure we disable noa to save power. */
> intel_uncore_rmw(uncore, RPM_CONFIG1, GEN10_GT_NOA_ENABLE, 0);
> @@ -2723,16 +2766,19 @@ static const struct i915_perf_stream_ops i915_oa_stream_ops = {
>
> static int i915_perf_stream_enable_sync(struct i915_perf_stream *stream)
> {
> - struct i915_request *rq;
> + struct i915_active *active;
> + int err;
>
> - rq = stream->perf->ops.enable_metric_set(stream);
> - if (IS_ERR(rq))
> - return PTR_ERR(rq);
> + active = i915_active_create();
> + if (!active)
> + return -ENOMEM;
>
> - i915_request_wait(rq, 0, MAX_SCHEDULE_TIMEOUT);
> - i915_request_put(rq);
> + err = stream->perf->ops.enable_metric_set(stream, active);
> + if (err == 0)
> + __i915_active_wait(active, TASK_UNINTERRUPTIBLE);
>
> - return 0;
> + i915_active_put(active);
> + return err;
> }
>
> static void
> @@ -3217,7 +3263,7 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream,
> return -EINVAL;
>
> if (config != stream->oa_config) {
> - struct i915_request *rq;
> + int err;
>
> /*
> * If OA is bound to a specific context, emit the
> @@ -3228,13 +3274,11 @@ static long i915_perf_config_locked(struct i915_perf_stream *stream,
> * When set globally, we use a low priority kernel context,
> * so it will effectively take effect when idle.
> */
> - rq = emit_oa_config(stream, config, oa_context(stream));
> - if (!IS_ERR(rq)) {
> + err = emit_oa_config(stream, config, oa_context(stream), NULL);
> + if (!err)
> config = xchg(&stream->oa_config, config);
> - i915_request_put(rq);
> - } else {
> - ret = PTR_ERR(rq);
> - }
> + else
> + ret = err;
> }
>
> i915_oa_config_put(config);
> diff --git a/drivers/gpu/drm/i915/i915_perf_types.h b/drivers/gpu/drm/i915/i915_perf_types.h
> index 32289cbda648..de5cbb40fddf 100644
> --- a/drivers/gpu/drm/i915/i915_perf_types.h
> +++ b/drivers/gpu/drm/i915/i915_perf_types.h
> @@ -22,6 +22,7 @@
>
> struct drm_i915_private;
> struct file;
> +struct i915_active;
> struct i915_gem_context;
> struct i915_perf;
> struct i915_vma;
> @@ -340,8 +341,8 @@ struct i915_oa_ops {
> * counter reports being sampled. May apply system constraints such as
> * disabling EU clock gating as required.
> */
> - struct i915_request *
> - (*enable_metric_set)(struct i915_perf_stream *stream);
> + int (*enable_metric_set)(struct i915_perf_stream *stream,
> + struct i915_active *active);
>
> /**
> * @disable_metric_set: Remove system constraints associated with using
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait
2020-03-27 11:22 [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Chris Wilson
` (3 preceding siblings ...)
2020-03-28 13:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-03-30 16:07 ` Mika Kuoppala
2020-03-30 17:20 ` Chris Wilson
4 siblings, 1 reply; 9+ messages in thread
From: Mika Kuoppala @ 2020-03-30 16:07 UTC (permalink / raw)
To: Chris Wilson, intel-gfx; +Cc: Chris Wilson
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Allow some users the discretion to not immediately return on a normal
> signal. Hopefully, they will opt to use TASK_KILLABLE instead.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_active.c | 6 ++++--
> drivers/gpu/drm/i915/i915_active.h | 6 +++++-
> drivers/gpu/drm/i915/selftests/i915_active.c | 10 +++++-----
> 3 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
> index a0d31f7bfb42..7b685032cc1e 100644
> --- a/drivers/gpu/drm/i915/i915_active.c
> +++ b/drivers/gpu/drm/i915/i915_active.c
> @@ -496,7 +496,7 @@ static int flush_lazy_signals(struct i915_active *ref)
> return err;
> }
>
> -int i915_active_wait(struct i915_active *ref)
> +int __i915_active_wait(struct i915_active *ref, int state)
> {
> int err;
minor gripe: s/state/task_state
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>
> @@ -511,7 +511,9 @@ int i915_active_wait(struct i915_active *ref)
> if (err)
> return err;
>
> - if (wait_var_event_interruptible(ref, i915_active_is_idle(ref)))
> + if (!i915_active_is_idle(ref) &&
> + ___wait_var_event(ref, i915_active_is_idle(ref),
> + state, 0, 0, schedule()))
> return -EINTR;
>
> flush_work(&ref->work);
> diff --git a/drivers/gpu/drm/i915/i915_active.h b/drivers/gpu/drm/i915/i915_active.h
> index b3282ae7913c..4f9aa7bab514 100644
> --- a/drivers/gpu/drm/i915/i915_active.h
> +++ b/drivers/gpu/drm/i915/i915_active.h
> @@ -181,7 +181,11 @@ static inline bool i915_active_has_exclusive(struct i915_active *ref)
> return rcu_access_pointer(ref->excl.fence);
> }
>
> -int i915_active_wait(struct i915_active *ref);
> +int __i915_active_wait(struct i915_active *ref, int state);
> +static inline int i915_active_wait(struct i915_active *ref)
> +{
> + return __i915_active_wait(ref, TASK_INTERRUPTIBLE);
> +}
>
> int i915_sw_fence_await_active(struct i915_sw_fence *fence,
> struct i915_active *ref,
> diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c b/drivers/gpu/drm/i915/selftests/i915_active.c
> index 54080fb4af4b..4002c984c2e0 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_active.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_active.c
> @@ -153,7 +153,7 @@ static int live_active_wait(void *arg)
> if (IS_ERR(active))
> return PTR_ERR(active);
>
> - i915_active_wait(&active->base);
> + __i915_active_wait(&active->base, TASK_UNINTERRUPTIBLE);
> if (!READ_ONCE(active->retired)) {
> struct drm_printer p = drm_err_printer(__func__);
>
> @@ -228,11 +228,11 @@ static int live_active_barrier(void *arg)
> }
>
> i915_active_release(&active->base);
> + if (err)
> + goto out;
>
> - if (err == 0)
> - err = i915_active_wait(&active->base);
> -
> - if (err == 0 && !READ_ONCE(active->retired)) {
> + __i915_active_wait(&active->base, TASK_UNINTERRUPTIBLE);
> + if (!READ_ONCE(active->retired)) {
> pr_err("i915_active not retired after flushing barriers!\n");
> err = -EINVAL;
> }
> --
> 2.20.1
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait
2020-03-30 16:07 ` [Intel-gfx] [PATCH 1/3] " Mika Kuoppala
@ 2020-03-30 17:20 ` Chris Wilson
0 siblings, 0 replies; 9+ messages in thread
From: Chris Wilson @ 2020-03-30 17:20 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2020-03-30 17:07:34)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > Allow some users the discretion to not immediately return on a normal
> > signal. Hopefully, they will opt to use TASK_KILLABLE instead.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> > drivers/gpu/drm/i915/i915_active.c | 6 ++++--
> > drivers/gpu/drm/i915/i915_active.h | 6 +++++-
> > drivers/gpu/drm/i915/selftests/i915_active.c | 10 +++++-----
> > 3 files changed, 14 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
> > index a0d31f7bfb42..7b685032cc1e 100644
> > --- a/drivers/gpu/drm/i915/i915_active.c
> > +++ b/drivers/gpu/drm/i915/i915_active.c
> > @@ -496,7 +496,7 @@ static int flush_lazy_signals(struct i915_active *ref)
> > return err;
> > }
> >
> > -int i915_active_wait(struct i915_active *ref)
> > +int __i915_active_wait(struct i915_active *ref, int state)
> > {
> > int err;
>
> minor gripe: s/state/task_state
set_current_state()
signal_pending_state()
All locals refer to it as state :)
-Chris
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-03-30 17:20 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-27 11:22 [Intel-gfx] [PATCH 1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Chris Wilson
2020-03-27 11:22 ` [Intel-gfx] [PATCH 2/3] drm/i915: Wrap i915_active in a simple kreffed struct Chris Wilson
2020-03-27 14:42 ` Ruhl, Michael J
2020-03-27 11:22 ` [Intel-gfx] [PATCH 3/3] drm/i915/perf: Schedule oa_config after modifying the contexts Chris Wilson
2020-03-30 13:17 ` Lionel Landwerlin
2020-03-27 12:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Allow for different modes of interruptible i915_active_wait Patchwork
2020-03-28 13:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-30 16:07 ` [Intel-gfx] [PATCH 1/3] " Mika Kuoppala
2020-03-30 17:20 ` Chris Wilson
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