[PATCH] powerpc: Fix definition of SIAR register

[PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

The SIAR register is available twice, one time as SPR 780 (unprivileged,
but read-only), and one time as SPR 796 (privileged, but read and write).
The Linux kernel code currently uses SPR 780 - and while this is OK for
reading, writing to that register of course does not work.
Since the KVM code tries to write to this register, too (see the mtspr
in book3s_hv_rmhandlers.S), the contents of this register sometimes get
lost for the guests, e.g. during migration of a VM.
To fix this issue, simply switch to the other SPR numer 796 instead.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 Note: The perf code in core-book3s.c also seems to write to the SIAR
       SPR, so that might be affected by this issue, too - but I did
       not test the perf code, so I'm not sure about that part.

 arch/powerpc/include/asm/reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f5f4c66..6630420 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -752,13 +752,13 @@
 #define SPRN_PMC6	792
 #define SPRN_PMC7	793
 #define SPRN_PMC8	794
-#define SPRN_SIAR	780
 #define SPRN_SDAR	781
 #define SPRN_SIER	784
 #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
 #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
 #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
 #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
+#define SPRN_SIAR	796
 #define SPRN_TACR	888
 #define SPRN_TCSCR	889
 #define SPRN_CSIGR	890
-- 
1.8.3.1

[PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

The SIAR register is available twice, one time as SPR 780 (unprivileged,
but read-only), and one time as SPR 796 (privileged, but read and write).
The Linux kernel code currently uses SPR 780 - and while this is OK for
reading, writing to that register of course does not work.
Since the KVM code tries to write to this register, too (see the mtspr
in book3s_hv_rmhandlers.S), the contents of this register sometimes get
lost for the guests, e.g. during migration of a VM.
To fix this issue, simply switch to the other SPR numer 796 instead.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 Note: The perf code in core-book3s.c also seems to write to the SIAR
       SPR, so that might be affected by this issue, too - but I did
       not test the perf code, so I'm not sure about that part.

 arch/powerpc/include/asm/reg.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f5f4c66..6630420 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -752,13 +752,13 @@
 #define SPRN_PMC6	792
 #define SPRN_PMC7	793
 #define SPRN_PMC8	794
-#define SPRN_SIAR	780
 #define SPRN_SDAR	781
 #define SPRN_SIER	784
 #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
 #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
 #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
 #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
+#define SPRN_SIAR	796
 #define SPRN_TACR	888
 #define SPRN_TCSCR	889
 #define SPRN_CSIGR	890
-- 
1.8.3.1

Re: [PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

On 08.04.2016 17:54, Thomas Huth wrote:
> The SIAR register is available twice, one time as SPR 780 (unprivileged,
> but read-only), and one time as SPR 796 (privileged, but read and write).
> The Linux kernel code currently uses SPR 780 - and while this is OK for
> reading, writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the other SPR numer 796 instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  Note: The perf code in core-book3s.c also seems to write to the SIAR
>        SPR, so that might be affected by this issue, too - but I did
>        not test the perf code, so I'm not sure about that part.
> 
>  arch/powerpc/include/asm/reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index f5f4c66..6630420 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -752,13 +752,13 @@
>  #define SPRN_PMC6	792
>  #define SPRN_PMC7	793
>  #define SPRN_PMC8	794
> -#define SPRN_SIAR	780
>  #define SPRN_SDAR	781
>  #define SPRN_SIER	784
>  #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
>  #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
>  #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
>  #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
> +#define SPRN_SIAR	796
>  #define SPRN_TACR	888
>  #define SPRN_TCSCR	889
>  #define SPRN_CSIGR	890

Ping!

Anybody any comments?

 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

On 08.04.2016 17:54, Thomas Huth wrote:
> The SIAR register is available twice, one time as SPR 780 (unprivileged,
> but read-only), and one time as SPR 796 (privileged, but read and write).
> The Linux kernel code currently uses SPR 780 - and while this is OK for
> reading, writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the other SPR numer 796 instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  Note: The perf code in core-book3s.c also seems to write to the SIAR
>        SPR, so that might be affected by this issue, too - but I did
>        not test the perf code, so I'm not sure about that part.
> 
>  arch/powerpc/include/asm/reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index f5f4c66..6630420 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -752,13 +752,13 @@
>  #define SPRN_PMC6	792
>  #define SPRN_PMC7	793
>  #define SPRN_PMC8	794
> -#define SPRN_SIAR	780
>  #define SPRN_SDAR	781
>  #define SPRN_SIER	784
>  #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
>  #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
>  #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
>  #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
> +#define SPRN_SIAR	796
>  #define SPRN_TACR	888
>  #define SPRN_TCSCR	889
>  #define SPRN_CSIGR	890

Ping!

Anybody any comments?

 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR register

[Madhavan Srinivasan]

On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
> The SIAR register is available twice, one time as SPR 780 (unprivileged,
> but read-only), and one time as SPR 796 (privileged, but read and write).
> The Linux kernel code currently uses SPR 780 - and while this is OK for
> reading, writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the other SPR numer 796 instead.

IIUC, SIAR and SDAR are updated by hardware when we take
a pmu exception with sampling mode enabled (based on instr).
And these register contents are mainly for OS consumption.
So, we dont need to restore these register values at all,
kindly correct me if I missing something here.

Maddy

>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  Note: The perf code in core-book3s.c also seems to write to the SIAR
>        SPR, so that might be affected by this issue, too - but I did
>        not test the perf code, so I'm not sure about that part.
>
>  arch/powerpc/include/asm/reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index f5f4c66..6630420 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -752,13 +752,13 @@
>  #define SPRN_PMC6	792
>  #define SPRN_PMC7	793
>  #define SPRN_PMC8	794
> -#define SPRN_SIAR	780
>  #define SPRN_SDAR	781
>  #define SPRN_SIER	784
>  #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
>  #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
>  #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
>  #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
> +#define SPRN_SIAR	796
>  #define SPRN_TACR	888
>  #define SPRN_TCSCR	889
>  #define SPRN_CSIGR	890

Re: [PATCH] powerpc: Fix definition of SIAR register

[Alexander Graf]

> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.c=
om>:
>=20
>=20
>=20
>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>> but read-only), and one time as SPR 796 (privileged, but read and write).=

>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>> reading, writing to that register of course does not work.
>> Since the KVM code tries to write to this register, too (see the mtspr
>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>> lost for the guests, e.g. during migration of a VM.
>> To fix this issue, simply switch to the other SPR numer 796 instead.
>=20
> IIUC, SIAR and SDAR are updated by hardware when we take
> a pmu exception with sampling mode enabled (based on instr).
> And these register contents are mainly for OS consumption.
> So, we dont need to restore these register values at all,
> kindly correct me if I missing something here.

What if you migrate between a pmu event firing and the os reading siar? Or w=
hat if the host gets pmu events? Or we migrate the guest to a different pcpu=
? In all those cases we need to ensure the register contents are consistent.=


>=20
> Maddy
>=20
>>=20
>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>> ---
>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>       SPR, so that might be affected by this issue, too - but I did
>>       not test the perf code, so I'm not sure about that part.

Please write a small unit test that fires off pmu events constantly and chec=
ks whtether they arrive correctly. Run perf in parallel on the host to incre=
ase the chance for breakage.

>>=20
>> arch/powerpc/include/asm/reg.h | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>=20
>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/re=
g.h
>> index f5f4c66..6630420 100644
>> --- a/arch/powerpc/include/asm/reg.h
>> +++ b/arch/powerpc/include/asm/reg.h
>> @@ -752,13 +752,13 @@
>> #define SPRN_PMC6    792
>> #define SPRN_PMC7    793
>> #define SPRN_PMC8    794
>> -#define SPRN_SIAR    780
>> #define SPRN_SDAR    781
>> #define SPRN_SIER    784
>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>> +#define SPRN_SIAR    796

I'm sure there's a reason (iSeries?) we used the r/o version before. Better i=
ntroduce a new constant that gives us rw access and use that in the kvm entr=
y/exit code.

Alex

>> #define SPRN_TACR    888
>> #define SPRN_TCSCR    889
>> #define SPRN_CSIGR    890
>=20
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> To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in
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Re: [PATCH] powerpc: Fix definition of SIAR register

[Alexander Graf]

> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.com>:
> 
> 
> 
>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>> but read-only), and one time as SPR 796 (privileged, but read and write).
>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>> reading, writing to that register of course does not work.
>> Since the KVM code tries to write to this register, too (see the mtspr
>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>> lost for the guests, e.g. during migration of a VM.
>> To fix this issue, simply switch to the other SPR numer 796 instead.
> 
> IIUC, SIAR and SDAR are updated by hardware when we take
> a pmu exception with sampling mode enabled (based on instr).
> And these register contents are mainly for OS consumption.
> So, we dont need to restore these register values at all,
> kindly correct me if I missing something here.

What if you migrate between a pmu event firing and the os reading siar? Or what if the host gets pmu events? Or we migrate the guest to a different pcpu? In all those cases we need to ensure the register contents are consistent.

> 
> Maddy
> 
>> 
>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>> ---
>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>       SPR, so that might be affected by this issue, too - but I did
>>       not test the perf code, so I'm not sure about that part.

Please write a small unit test that fires off pmu events constantly and checks whtether they arrive correctly. Run perf in parallel on the host to increase the chance for breakage.

>> 
>> arch/powerpc/include/asm/reg.h | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>> 
>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>> index f5f4c66..6630420 100644
>> --- a/arch/powerpc/include/asm/reg.h
>> +++ b/arch/powerpc/include/asm/reg.h
>> @@ -752,13 +752,13 @@
>> #define SPRN_PMC6    792
>> #define SPRN_PMC7    793
>> #define SPRN_PMC8    794
>> -#define SPRN_SIAR    780
>> #define SPRN_SDAR    781
>> #define SPRN_SIER    784
>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>> +#define SPRN_SIAR    796

I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.

Alex

>> #define SPRN_TACR    888
>> #define SPRN_TCSCR    889
>> #define SPRN_CSIGR    890
> 
> --
> To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] powerpc: Fix definition of SIAR register

[Madhavan Srinivasan]

On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
> The SIAR register is available twice, one time as SPR 780 (unprivileged,
> but read-only), and one time as SPR 796 (privileged, but read and write).
> The Linux kernel code currently uses SPR 780 - and while this is OK for
> reading, writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the other SPR numer 796 instead.

IIUC, SIAR and SDAR are updated by hardware when we take
a pmu exception with sampling mode enabled (based on instr).
And these register contents are mainly for OS consumption.
So, we dont need to restore these register values at all,
kindly correct me if I missing something here.

Maddy

>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  Note: The perf code in core-book3s.c also seems to write to the SIAR
>        SPR, so that might be affected by this issue, too - but I did
>        not test the perf code, so I'm not sure about that part.
>
>  arch/powerpc/include/asm/reg.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index f5f4c66..6630420 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -752,13 +752,13 @@
>  #define SPRN_PMC6	792
>  #define SPRN_PMC7	793
>  #define SPRN_PMC8	794
> -#define SPRN_SIAR	780
>  #define SPRN_SDAR	781
>  #define SPRN_SIER	784
>  #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
>  #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
>  #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
>  #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
> +#define SPRN_SIAR	796
>  #define SPRN_TACR	888
>  #define SPRN_TCSCR	889
>  #define SPRN_CSIGR	890

Re: [PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

On 25.04.2016 10:15, Alexander Graf wrote:
> 
> 
>> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.com>:
>>
>>
>>
>>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>>> but read-only), and one time as SPR 796 (privileged, but read and write).
>>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>>> reading, writing to that register of course does not work.
>>> Since the KVM code tries to write to this register, too (see the mtspr
>>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>>> lost for the guests, e.g. during migration of a VM.
>>> To fix this issue, simply switch to the other SPR numer 796 instead.
>>
>> IIUC, SIAR and SDAR are updated by hardware when we take
>> a pmu exception with sampling mode enabled (based on instr).
>> And these register contents are mainly for OS consumption.
>> So, we dont need to restore these register values at all,
>> kindly correct me if I missing something here.
> 
> What if you migrate between a pmu event firing and the os reading siar? Or what if the host gets pmu events? Or we migrate the guest to a different pcpu? In all those cases we need to ensure the register contents are consistent.

Right. Or a guest could use the SIAR as a temporary scratch register
while not using the performance monitoring stuff. In that case the
contents of the register of course have to be preserved, too.

>>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>>> ---
>>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>>       SPR, so that might be affected by this issue, too - but I did
>>>       not test the perf code, so I'm not sure about that part.
> 
> Please write a small unit test that fires off pmu events constantly and checks whtether they arrive correctly. Run perf in parallel on the host to increase the chance for breakage.

I'm not very familiar with that PMU stuff yet, but I can have a try...

>>> arch/powerpc/include/asm/reg.h | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>>> index f5f4c66..6630420 100644
>>> --- a/arch/powerpc/include/asm/reg.h
>>> +++ b/arch/powerpc/include/asm/reg.h
>>> @@ -752,13 +752,13 @@
>>> #define SPRN_PMC6    792
>>> #define SPRN_PMC7    793
>>> #define SPRN_PMC8    794
>>> -#define SPRN_SIAR    780
>>> #define SPRN_SDAR    781
>>> #define SPRN_SIER    784
>>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>>> +#define SPRN_SIAR    796
> 
> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.

Sure. Any suggestions on the naming? I could either rename the current
SPRN_SIAR to SPRN_USIAR (so that it is named similar to other registers
that behave that way, like SPRN_USPRG3 - and also QEMU uses USIAR for
this already). Or I could leave the old name untouched and use something
like "SPRN_SIAR_WR" for the 796 register. What do you prefer?

By the way, I just noticed that SPRN_SDAR (781) seems to suffer from the
same problem, too!

 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

On 25.04.2016 10:15, Alexander Graf wrote:
> 
> 
>> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.com>:
>>
>>
>>
>>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>>> but read-only), and one time as SPR 796 (privileged, but read and write).
>>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>>> reading, writing to that register of course does not work.
>>> Since the KVM code tries to write to this register, too (see the mtspr
>>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>>> lost for the guests, e.g. during migration of a VM.
>>> To fix this issue, simply switch to the other SPR numer 796 instead.
>>
>> IIUC, SIAR and SDAR are updated by hardware when we take
>> a pmu exception with sampling mode enabled (based on instr).
>> And these register contents are mainly for OS consumption.
>> So, we dont need to restore these register values at all,
>> kindly correct me if I missing something here.
> 
> What if you migrate between a pmu event firing and the os reading siar? Or what if the host gets pmu events? Or we migrate the guest to a different pcpu? In all those cases we need to ensure the register contents are consistent.

Right. Or a guest could use the SIAR as a temporary scratch register
while not using the performance monitoring stuff. In that case the
contents of the register of course have to be preserved, too.

>>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>>> ---
>>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>>       SPR, so that might be affected by this issue, too - but I did
>>>       not test the perf code, so I'm not sure about that part.
> 
> Please write a small unit test that fires off pmu events constantly and checks whtether they arrive correctly. Run perf in parallel on the host to increase the chance for breakage.

I'm not very familiar with that PMU stuff yet, but I can have a try...

>>> arch/powerpc/include/asm/reg.h | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>>> index f5f4c66..6630420 100644
>>> --- a/arch/powerpc/include/asm/reg.h
>>> +++ b/arch/powerpc/include/asm/reg.h
>>> @@ -752,13 +752,13 @@
>>> #define SPRN_PMC6    792
>>> #define SPRN_PMC7    793
>>> #define SPRN_PMC8    794
>>> -#define SPRN_SIAR    780
>>> #define SPRN_SDAR    781
>>> #define SPRN_SIER    784
>>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>>> +#define SPRN_SIAR    796
> 
> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.

Sure. Any suggestions on the naming? I could either rename the current
SPRN_SIAR to SPRN_USIAR (so that it is named similar to other registers
that behave that way, like SPRN_USPRG3 - and also QEMU uses USIAR for
this already). Or I could leave the old name untouched and use something
like "SPRN_SIAR_WR" for the 796 register. What do you prefer?

By the way, I just noticed that SPRN_SDAR (781) seems to suffer from the
same problem, too!

 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR register

[Alexander Graf]

On 04/25/2016 11:16 AM, Thomas Huth wrote:
> On 25.04.2016 10:15, Alexander Graf wrote:
>>
>>> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.com>:
>>>
>>>
>>>
>>>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>>>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>>>> but read-only), and one time as SPR 796 (privileged, but read and write).
>>>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>>>> reading, writing to that register of course does not work.
>>>> Since the KVM code tries to write to this register, too (see the mtspr
>>>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>>>> lost for the guests, e.g. during migration of a VM.
>>>> To fix this issue, simply switch to the other SPR numer 796 instead.
>>> IIUC, SIAR and SDAR are updated by hardware when we take
>>> a pmu exception with sampling mode enabled (based on instr).
>>> And these register contents are mainly for OS consumption.
>>> So, we dont need to restore these register values at all,
>>> kindly correct me if I missing something here.
>> What if you migrate between a pmu event firing and the os reading siar? Or what if the host gets pmu events? Or we migrate the guest to a different pcpu? In all those cases we need to ensure the register contents are consistent.
> Right. Or a guest could use the SIAR as a temporary scratch register
> while not using the performance monitoring stuff. In that case the
> contents of the register of course have to be preserved, too.
>
>>>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>>>> ---
>>>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>>>        SPR, so that might be affected by this issue, too - but I did
>>>>        not test the perf code, so I'm not sure about that part.
>> Please write a small unit test that fires off pmu events constantly and checks whtether they arrive correctly. Run perf in parallel on the host to increase the chance for breakage.
> I'm not very familiar with that PMU stuff yet, but I can have a try...
>
>>>> arch/powerpc/include/asm/reg.h | 2 +-
>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>>>> index f5f4c66..6630420 100644
>>>> --- a/arch/powerpc/include/asm/reg.h
>>>> +++ b/arch/powerpc/include/asm/reg.h
>>>> @@ -752,13 +752,13 @@
>>>> #define SPRN_PMC6    792
>>>> #define SPRN_PMC7    793
>>>> #define SPRN_PMC8    794
>>>> -#define SPRN_SIAR    780
>>>> #define SPRN_SDAR    781
>>>> #define SPRN_SIER    784
>>>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>>>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>>>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>>>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>>>> +#define SPRN_SIAR    796
>> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
> Sure. Any suggestions on the naming? I could either rename the current
> SPRN_SIAR to SPRN_USIAR (so that it is named similar to other registers
> that behave that way, like SPRN_USPRG3 - and also QEMU uses USIAR for
> this already). Or I could leave the old name untouched and use something
> like "SPRN_SIAR_WR" for the 796 register. What do you prefer?

I'd defer that decision to Michael :).

> By the way, I just noticed that SPRN_SDAR (781) seems to suffer from the
> same problem, too!

Great! The more the merrier :)


Alex

Re: [PATCH] powerpc: Fix definition of SIAR register

[Alexander Graf]

On 04/25/2016 11:16 AM, Thomas Huth wrote:
> On 25.04.2016 10:15, Alexander Graf wrote:
>>
>>> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.com>:
>>>
>>>
>>>
>>>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>>>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>>>> but read-only), and one time as SPR 796 (privileged, but read and write).
>>>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>>>> reading, writing to that register of course does not work.
>>>> Since the KVM code tries to write to this register, too (see the mtspr
>>>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>>>> lost for the guests, e.g. during migration of a VM.
>>>> To fix this issue, simply switch to the other SPR numer 796 instead.
>>> IIUC, SIAR and SDAR are updated by hardware when we take
>>> a pmu exception with sampling mode enabled (based on instr).
>>> And these register contents are mainly for OS consumption.
>>> So, we dont need to restore these register values at all,
>>> kindly correct me if I missing something here.
>> What if you migrate between a pmu event firing and the os reading siar? Or what if the host gets pmu events? Or we migrate the guest to a different pcpu? In all those cases we need to ensure the register contents are consistent.
> Right. Or a guest could use the SIAR as a temporary scratch register
> while not using the performance monitoring stuff. In that case the
> contents of the register of course have to be preserved, too.
>
>>>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>>>> ---
>>>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>>>        SPR, so that might be affected by this issue, too - but I did
>>>>        not test the perf code, so I'm not sure about that part.
>> Please write a small unit test that fires off pmu events constantly and checks whtether they arrive correctly. Run perf in parallel on the host to increase the chance for breakage.
> I'm not very familiar with that PMU stuff yet, but I can have a try...
>
>>>> arch/powerpc/include/asm/reg.h | 2 +-
>>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>>>> index f5f4c66..6630420 100644
>>>> --- a/arch/powerpc/include/asm/reg.h
>>>> +++ b/arch/powerpc/include/asm/reg.h
>>>> @@ -752,13 +752,13 @@
>>>> #define SPRN_PMC6    792
>>>> #define SPRN_PMC7    793
>>>> #define SPRN_PMC8    794
>>>> -#define SPRN_SIAR    780
>>>> #define SPRN_SDAR    781
>>>> #define SPRN_SIER    784
>>>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>>>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>>>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>>>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>>>> +#define SPRN_SIAR    796
>> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
> Sure. Any suggestions on the naming? I could either rename the current
> SPRN_SIAR to SPRN_USIAR (so that it is named similar to other registers
> that behave that way, like SPRN_USPRG3 - and also QEMU uses USIAR for
> this already). Or I could leave the old name untouched and use something
> like "SPRN_SIAR_WR" for the 796 register. What do you prefer?

I'd defer that decision to Michael :).

> By the way, I just noticed that SPRN_SDAR (781) seems to suffer from the
> same problem, too!

Great! The more the merrier :)


Alex

Re: [PATCH] powerpc: Fix definition of SIAR register

[Madhavan Srinivasan]

On Monday 25 April 2016 01:45 PM, Alexander Graf wrote:
>
>> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.com>:
>>
>>
>>
>>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>>> but read-only), and one time as SPR 796 (privileged, but read and write).
>>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>>> reading, writing to that register of course does not work.
>>> Since the KVM code tries to write to this register, too (see the mtspr
>>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>>> lost for the guests, e.g. during migration of a VM.
>>> To fix this issue, simply switch to the other SPR numer 796 instead.
>> IIUC, SIAR and SDAR are updated by hardware when we take
>> a pmu exception with sampling mode enabled (based on instr).
>> And these register contents are mainly for OS consumption.
>> So, we dont need to restore these register values at all,
>> kindly correct me if I missing something here.
> What if you migrate between a pmu event firing and the os reading siar? Or what if the host gets pmu events? Or we migrate the guest to a different pcpu? In all those cases we need to ensure the register contents are consistent.

Ok got it. Let me try perf record with sample_addr type.

Maddy
>
>> Maddy
>>
>>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>>> ---
>>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>>       SPR, so that might be affected by this issue, too - but I did
>>>       not test the perf code, so I'm not sure about that part.
> Please write a small unit test that fires off pmu events constantly and checks whtether they arrive correctly. Run perf in parallel on the host to increase the chance for breakage.
>
>>> arch/powerpc/include/asm/reg.h | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>>> index f5f4c66..6630420 100644
>>> --- a/arch/powerpc/include/asm/reg.h
>>> +++ b/arch/powerpc/include/asm/reg.h
>>> @@ -752,13 +752,13 @@
>>> #define SPRN_PMC6    792
>>> #define SPRN_PMC7    793
>>> #define SPRN_PMC8    794
>>> -#define SPRN_SIAR    780
>>> #define SPRN_SDAR    781
>>> #define SPRN_SIER    784
>>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>>> +#define SPRN_SIAR    796
> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
>
> Alex
>
>>> #define SPRN_TACR    888
>>> #define SPRN_TCSCR    889
>>> #define SPRN_CSIGR    890
>> --
>> To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] powerpc: Fix definition of SIAR register

[Madhavan Srinivasan]

On Monday 25 April 2016 01:45 PM, Alexander Graf wrote:
>
>> Am 25.04.2016 um 10:08 schrieb Madhavan Srinivasan <maddy@linux.vnet.ibm.com>:
>>
>>
>>
>>> On Friday 08 April 2016 09:24 PM, Thomas Huth wrote:
>>> The SIAR register is available twice, one time as SPR 780 (unprivileged,
>>> but read-only), and one time as SPR 796 (privileged, but read and write).
>>> The Linux kernel code currently uses SPR 780 - and while this is OK for
>>> reading, writing to that register of course does not work.
>>> Since the KVM code tries to write to this register, too (see the mtspr
>>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>>> lost for the guests, e.g. during migration of a VM.
>>> To fix this issue, simply switch to the other SPR numer 796 instead.
>> IIUC, SIAR and SDAR are updated by hardware when we take
>> a pmu exception with sampling mode enabled (based on instr).
>> And these register contents are mainly for OS consumption.
>> So, we dont need to restore these register values at all,
>> kindly correct me if I missing something here.
> What if you migrate between a pmu event firing and the os reading siar? Or what if the host gets pmu events? Or we migrate the guest to a different pcpu? In all those cases we need to ensure the register contents are consistent.

Ok got it. Let me try perf record with sample_addr type.

Maddy
>
>> Maddy
>>
>>> Signed-off-by: Thomas Huth <thuth@redhat.com>
>>> ---
>>> Note: The perf code in core-book3s.c also seems to write to the SIAR
>>>       SPR, so that might be affected by this issue, too - but I did
>>>       not test the perf code, so I'm not sure about that part.
> Please write a small unit test that fires off pmu events constantly and checks whtether they arrive correctly. Run perf in parallel on the host to increase the chance for breakage.
>
>>> arch/powerpc/include/asm/reg.h | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
>>> index f5f4c66..6630420 100644
>>> --- a/arch/powerpc/include/asm/reg.h
>>> +++ b/arch/powerpc/include/asm/reg.h
>>> @@ -752,13 +752,13 @@
>>> #define SPRN_PMC6    792
>>> #define SPRN_PMC7    793
>>> #define SPRN_PMC8    794
>>> -#define SPRN_SIAR    780
>>> #define SPRN_SDAR    781
>>> #define SPRN_SIER    784
>>> #define   SIER_SIPR        0x2000000    /* Sampled MSR_PR */
>>> #define   SIER_SIHV        0x1000000    /* Sampled MSR_HV */
>>> #define   SIER_SIAR_VALID    0x0400000    /* SIAR contents valid */
>>> #define   SIER_SDAR_VALID    0x0200000    /* SDAR contents valid */
>>> +#define SPRN_SIAR    796
> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
>
> Alex
>
>>> #define SPRN_TACR    888
>>> #define SPRN_TCSCR    889
>>> #define SPRN_CSIGR    890
>> --
>> To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH] powerpc: Fix definition of SIAR register

[Paul Mackerras]

On Fri, Apr 08, 2016 at 05:54:11PM +0200, Thomas Huth wrote:
> The SIAR register is available twice, one time as SPR 780 (unprivileged,
> but read-only), and one time as SPR 796 (privileged, but read and write).
> The Linux kernel code currently uses SPR 780 - and while this is OK for
> reading, writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the other SPR numer 796 instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  Note: The perf code in core-book3s.c also seems to write to the SIAR
>        SPR, so that might be affected by this issue, too - but I did
>        not test the perf code, so I'm not sure about that part.

EBBs mean we need to context-switch the SIAR between user tasks (among
other registers).

I notice that SDAR is also wrong, and the MMCR2 definition is also
using the user-accessible number (though it at least is writable as
well as readable).

Paul.

Re: [PATCH] powerpc: Fix definition of SIAR register

[Paul Mackerras]

On Fri, Apr 08, 2016 at 05:54:11PM +0200, Thomas Huth wrote:
> The SIAR register is available twice, one time as SPR 780 (unprivileged,
> but read-only), and one time as SPR 796 (privileged, but read and write).
> The Linux kernel code currently uses SPR 780 - and while this is OK for
> reading, writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the other SPR numer 796 instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> ---
>  Note: The perf code in core-book3s.c also seems to write to the SIAR
>        SPR, so that might be affected by this issue, too - but I did
>        not test the perf code, so I'm not sure about that part.

EBBs mean we need to context-switch the SIAR between user tasks (among
other registers).

I notice that SDAR is also wrong, and the MMCR2 definition is also
using the user-accessible number (though it at least is writable as
well as readable).

Paul.

Re: [PATCH] powerpc: Fix definition of SIAR register

[Paul Mackerras]

On Mon, Apr 25, 2016 at 10:15:47AM +0200, Alexander Graf wrote:
> 
> >> +#define SPRN_SIAR    796
> 
> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.

I don't think we ever did any performance monitoring on iSeries, and
in any case, we have removed the iSeries code.  I think we should just
use the privileged, read/write number (i.e. 796).

Paul.

Re: [PATCH] powerpc: Fix definition of SIAR register

[Paul Mackerras]

On Mon, Apr 25, 2016 at 10:15:47AM +0200, Alexander Graf wrote:
> 
> >> +#define SPRN_SIAR    796
> 
> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.

I don't think we ever did any performance monitoring on iSeries, and
in any case, we have removed the iSeries code.  I think we should just
use the privileged, read/write number (i.e. 796).

Paul.

Re: [PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

On 12.05.2016 06:57, Paul Mackerras wrote:
> On Mon, Apr 25, 2016 at 10:15:47AM +0200, Alexander Graf wrote:
>>
>>>> +#define SPRN_SIAR    796
>>
>> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
> 
> I don't think we ever did any performance monitoring on iSeries, and
> in any case, we have removed the iSeries code.  I think we should just
> use the privileged, read/write number (i.e. 796).

Ok, then I'll simply add the fix for SDAR to my patch as well, test it
and submit it again.

 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR register

[Thomas Huth]

On 12.05.2016 06:57, Paul Mackerras wrote:
> On Mon, Apr 25, 2016 at 10:15:47AM +0200, Alexander Graf wrote:
>>
>>>> +#define SPRN_SIAR    796
>>
>> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
> 
> I don't think we ever did any performance monitoring on iSeries, and
> in any case, we have removed the iSeries code.  I think we should just
> use the privileged, read/write number (i.e. 796).

Ok, then I'll simply add the fix for SDAR to my patch as well, test it
and submit it again.

 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR register

[Paul Mackerras]

On Thu, May 12, 2016 at 09:27:40AM +0200, Thomas Huth wrote:
> On 12.05.2016 06:57, Paul Mackerras wrote:
> > On Mon, Apr 25, 2016 at 10:15:47AM +0200, Alexander Graf wrote:
> >>
> >>>> +#define SPRN_SIAR    796
> >>
> >> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
> > 
> > I don't think we ever did any performance monitoring on iSeries, and
> > in any case, we have removed the iSeries code.  I think we should just
> > use the privileged, read/write number (i.e. 796).
> 
> Ok, then I'll simply add the fix for SDAR to my patch as well, test it
> and submit it again.

Great!  Could you switch MMCR2 to the privileged number as well while
you're at it?

Thanks,
Paul.

Re: [PATCH] powerpc: Fix definition of SIAR register

[Paul Mackerras]

On Thu, May 12, 2016 at 09:27:40AM +0200, Thomas Huth wrote:
> On 12.05.2016 06:57, Paul Mackerras wrote:
> > On Mon, Apr 25, 2016 at 10:15:47AM +0200, Alexander Graf wrote:
> >>
> >>>> +#define SPRN_SIAR    796
> >>
> >> I'm sure there's a reason (iSeries?) we used the r/o version before. Better introduce a new constant that gives us rw access and use that in the kvm entry/exit code.
> > 
> > I don't think we ever did any performance monitoring on iSeries, and
> > in any case, we have removed the iSeries code.  I think we should just
> > use the privileged, read/write number (i.e. 796).
> 
> Ok, then I'll simply add the fix for SDAR to my patch as well, test it
> and submit it again.

Great!  Could you switch MMCR2 to the privileged number as well while
you're at it?

Thanks,
Paul.

[PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Thomas Huth]

The SIAR and SDAR registers are available twice, one time as SPRs
780 / 781 (unprivileged, but read-only), and one time as the SPRs
796 / 797 (privileged, but read and write). The Linux kernel code
currently uses the unprivileged  SPRs - while this is OK for reading,
writing to that register of course does not work.
Since the KVM code tries to write to this register, too (see the mtspr
in book3s_hv_rmhandlers.S), the contents of this register sometimes get
lost for the guests, e.g. during migration of a VM.
To fix this issue, simply switch to the privileged SPR numbers instead.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 arch/powerpc/include/asm/reg.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f5f4c66..ce3e1b7 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -752,13 +752,13 @@
 #define SPRN_PMC6	792
 #define SPRN_PMC7	793
 #define SPRN_PMC8	794
-#define SPRN_SIAR	780
-#define SPRN_SDAR	781
 #define SPRN_SIER	784
 #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
 #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
 #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
 #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
+#define SPRN_SIAR	796
+#define SPRN_SDAR	797
 #define SPRN_TACR	888
 #define SPRN_TCSCR	889
 #define SPRN_CSIGR	890
-- 
1.8.3.1

[PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Thomas Huth]

The SIAR and SDAR registers are available twice, one time as SPRs
780 / 781 (unprivileged, but read-only), and one time as the SPRs
796 / 797 (privileged, but read and write). The Linux kernel code
currently uses the unprivileged  SPRs - while this is OK for reading,
writing to that register of course does not work.
Since the KVM code tries to write to this register, too (see the mtspr
in book3s_hv_rmhandlers.S), the contents of this register sometimes get
lost for the guests, e.g. during migration of a VM.
To fix this issue, simply switch to the privileged SPR numbers instead.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 arch/powerpc/include/asm/reg.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f5f4c66..ce3e1b7 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -752,13 +752,13 @@
 #define SPRN_PMC6	792
 #define SPRN_PMC7	793
 #define SPRN_PMC8	794
-#define SPRN_SIAR	780
-#define SPRN_SDAR	781
 #define SPRN_SIER	784
 #define   SIER_SIPR		0x2000000	/* Sampled MSR_PR */
 #define   SIER_SIHV		0x1000000	/* Sampled MSR_HV */
 #define   SIER_SIAR_VALID	0x0400000	/* SIAR contents valid */
 #define   SIER_SDAR_VALID	0x0200000	/* SDAR contents valid */
+#define SPRN_SIAR	796
+#define SPRN_SDAR	797
 #define SPRN_TACR	888
 #define SPRN_TCSCR	889
 #define SPRN_CSIGR	890
-- 
1.8.3.1

Re: [PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Paul Mackerras]

On Thu, May 12, 2016 at 01:26:44PM +0200, Thomas Huth wrote:
> The SIAR and SDAR registers are available twice, one time as SPRs
> 780 / 781 (unprivileged, but read-only), and one time as the SPRs
> 796 / 797 (privileged, but read and write). The Linux kernel code
> currently uses the unprivileged  SPRs - while this is OK for reading,
> writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the privileged SPR numbers instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>

Acked-by: Paul Mackerras <paulus@ozlabs.org>

Re: [PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Paul Mackerras]

On Thu, May 12, 2016 at 01:26:44PM +0200, Thomas Huth wrote:
> The SIAR and SDAR registers are available twice, one time as SPRs
> 780 / 781 (unprivileged, but read-only), and one time as the SPRs
> 796 / 797 (privileged, but read and write). The Linux kernel code
> currently uses the unprivileged  SPRs - while this is OK for reading,
> writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the privileged SPR numbers instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>

Acked-by: Paul Mackerras <paulus@ozlabs.org>

Re: [PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Thomas Huth]

On 13.05.2016 05:35, Paul Mackerras wrote:
> On Thu, May 12, 2016 at 01:26:44PM +0200, Thomas Huth wrote:
>> The SIAR and SDAR registers are available twice, one time as SPRs
>> 780 / 781 (unprivileged, but read-only), and one time as the SPRs
>> 796 / 797 (privileged, but read and write). The Linux kernel code
>> currently uses the unprivileged  SPRs - while this is OK for reading,
>> writing to that register of course does not work.
>> Since the KVM code tries to write to this register, too (see the mtspr
>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>> lost for the guests, e.g. during migration of a VM.
>> To fix this issue, simply switch to the privileged SPR numbers instead.
>>
>> Signed-off-by: Thomas Huth <thuth@redhat.com>
> 
> Acked-by: Paul Mackerras <paulus@ozlabs.org>

*ping*

Michael, could you please pick this patch up? I think it should rather
go through the generic powerpc tree instead of kvm-ppc, since it also
affects other parts than just KVM...

Thanks,
 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Thomas Huth]

On 13.05.2016 05:35, Paul Mackerras wrote:
> On Thu, May 12, 2016 at 01:26:44PM +0200, Thomas Huth wrote:
>> The SIAR and SDAR registers are available twice, one time as SPRs
>> 780 / 781 (unprivileged, but read-only), and one time as the SPRs
>> 796 / 797 (privileged, but read and write). The Linux kernel code
>> currently uses the unprivileged  SPRs - while this is OK for reading,
>> writing to that register of course does not work.
>> Since the KVM code tries to write to this register, too (see the mtspr
>> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
>> lost for the guests, e.g. during migration of a VM.
>> To fix this issue, simply switch to the privileged SPR numbers instead.
>>
>> Signed-off-by: Thomas Huth <thuth@redhat.com>
> 
> Acked-by: Paul Mackerras <paulus@ozlabs.org>

*ping*

Michael, could you please pick this patch up? I think it should rather
go through the generic powerpc tree instead of kvm-ppc, since it also
affects other parts than just KVM...

Thanks,
 Thomas

Re: [PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Michael Ellerman]

On Mon, 2016-05-30 at 10:04 +0200, Thomas Huth wrote:
> On 13.05.2016 05:35, Paul Mackerras wrote:
> > On Thu, May 12, 2016 at 01:26:44PM +0200, Thomas Huth wrote:
> > > The SIAR and SDAR registers are available twice, one time as SPRs
> > > 780 / 781 (unprivileged, but read-only), and one time as the SPRs
> > > 796 / 797 (privileged, but read and write). The Linux kernel code
> > > currently uses the unprivileged  SPRs - while this is OK for reading,
> > > writing to that register of course does not work.
> > > Since the KVM code tries to write to this register, too (see the mtspr
> > > in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> > > lost for the guests, e.g. during migration of a VM.
> > > To fix this issue, simply switch to the privileged SPR numbers instead.
> > > 
> > > Signed-off-by: Thomas Huth <thuth@redhat.com>
> > 
> > Acked-by: Paul Mackerras <paulus@ozlabs.org>
> 
> *ping*
> 
> Michael, could you please pick this patch up? I think it should rather
> go through the generic powerpc tree instead of kvm-ppc, since it also
> affects other parts than just KVM...

Yeah that's actually why I hesitated to merge it, because I want to know what
the broader implications are ...

I have also gone back and confirmed that the 796/797 numbers exist and are
correct on all CPUs we support, which involved a lot of digging through PDFs.

cheers

Re: [PATCH] powerpc: Fix definition of SIAR and SDAR registers

[Michael Ellerman]

On Mon, 2016-05-30 at 10:04 +0200, Thomas Huth wrote:
> On 13.05.2016 05:35, Paul Mackerras wrote:
> > On Thu, May 12, 2016 at 01:26:44PM +0200, Thomas Huth wrote:
> > > The SIAR and SDAR registers are available twice, one time as SPRs
> > > 780 / 781 (unprivileged, but read-only), and one time as the SPRs
> > > 796 / 797 (privileged, but read and write). The Linux kernel code
> > > currently uses the unprivileged  SPRs - while this is OK for reading,
> > > writing to that register of course does not work.
> > > Since the KVM code tries to write to this register, too (see the mtspr
> > > in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> > > lost for the guests, e.g. during migration of a VM.
> > > To fix this issue, simply switch to the privileged SPR numbers instead.
> > > 
> > > Signed-off-by: Thomas Huth <thuth@redhat.com>
> > 
> > Acked-by: Paul Mackerras <paulus@ozlabs.org>
> 
> *ping*
> 
> Michael, could you please pick this patch up? I think it should rather
> go through the generic powerpc tree instead of kvm-ppc, since it also
> affects other parts than just KVM...

Yeah that's actually why I hesitated to merge it, because I want to know what
the broader implications are ...

I have also gone back and confirmed that the 796/797 numbers exist and are
correct on all CPUs we support, which involved a lot of digging through PDFs.

cheers

Re: powerpc: Fix definition of SIAR and SDAR registers

[Michael Ellerman]

On Thu, 2016-12-05 at 11:26:44 UTC, Thomas Huth wrote:
> The SIAR and SDAR registers are available twice, one time as SPRs
> 780 / 781 (unprivileged, but read-only), and one time as the SPRs
> 796 / 797 (privileged, but read and write). The Linux kernel code
> currently uses the unprivileged  SPRs - while this is OK for reading,
> writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the privileged SPR numbers instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> Acked-by: Paul Mackerras <paulus@ozlabs.org>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/d23fac2b27d94aeb7b65536a50

cheers

Re: powerpc: Fix definition of SIAR and SDAR registers

[Michael Ellerman]

On Thu, 2016-12-05 at 11:26:44 UTC, Thomas Huth wrote:
> The SIAR and SDAR registers are available twice, one time as SPRs
> 780 / 781 (unprivileged, but read-only), and one time as the SPRs
> 796 / 797 (privileged, but read and write). The Linux kernel code
> currently uses the unprivileged  SPRs - while this is OK for reading,
> writing to that register of course does not work.
> Since the KVM code tries to write to this register, too (see the mtspr
> in book3s_hv_rmhandlers.S), the contents of this register sometimes get
> lost for the guests, e.g. during migration of a VM.
> To fix this issue, simply switch to the privileged SPR numbers instead.
> 
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> Acked-by: Paul Mackerras <paulus@ozlabs.org>

Applied to powerpc fixes, thanks.

https://git.kernel.org/powerpc/c/d23fac2b27d94aeb7b65536a50

cheers