From: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] MIPS: Fix invalidate_dcache_range to operate on L1 Dcache
Date: Fri, 10 Jun 2016 12:42:24 +0200 [thread overview]
Message-ID: <575A9990.4000108@gmail.com> (raw)
In-Reply-To: <20160609120952.4799-1-paul.burton@imgtec.com>
Am 09.06.2016 um 14:09 schrieb Paul Burton:
> Commit fb64cda57998 ("MIPS: Abstract cache op loops with a macro")
> accidentally modified invalidate_dcache_range to operate on the L1
> Icache instead of the Dcache. Fix the cache op used to operate on the
> Dcache.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Fixes: fb64cda57998 ("MIPS: Abstract cache op loops with a macro")
>
applied to u-boot-mips, thanks.
--
- Daniel
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prev parent reply other threads:[~2016-06-10 10:42 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-09 12:09 [U-Boot] [PATCH 1/2] MIPS: Fix invalidate_dcache_range to operate on L1 Dcache Paul Burton
2016-06-09 12:09 ` [U-Boot] [PATCH 2/2] MIPS: Make CONFIG_SYS_DCACHE_LINE_SIZE int, not hex Paul Burton
2016-06-10 10:46 ` Daniel Schwierzeck
2016-06-10 10:42 ` Daniel Schwierzeck [this message]
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