* [PATCH] ARM: V7M: Add dsb before jumping in handler mode
@ 2016-06-13 14:12 ` Alexandre TORGUE
0 siblings, 0 replies; 6+ messages in thread
From: Alexandre TORGUE @ 2016-06-13 14:12 UTC (permalink / raw)
To: Russell King, Ezequiel Garcia, u.kleine-koenig, Maxime Coquelin,
vladimir.murzin
Cc: linux-arm-kernel, linux-kernel
According to ARM AN321 (section 4.12):
"If the vector table is in writable memory such as SRAM, either relocated
by VTOR or a device dependent memory remapping mechanism, then
architecturally a memory barrier instruction is required after the vector
table entry is updated, and if the exception is to be activated
immediately"
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 7229d8d..2ddc435 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -104,6 +104,7 @@ __v7m_setup:
badr r1, 1f
ldr r5, [r12, #11 * 4] @ read the SVC vector entry
str r1, [r12, #11 * 4] @ write the temporary SVC vector entry
+ dsb
mov r6, lr @ save LR
ldr sp, =init_thread_union + THREAD_START_SP
cpsie i
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] ARM: V7M: Add dsb before jumping in handler mode
@ 2016-06-13 14:12 ` Alexandre TORGUE
0 siblings, 0 replies; 6+ messages in thread
From: Alexandre TORGUE @ 2016-06-13 14:12 UTC (permalink / raw)
To: linux-arm-kernel
According to ARM AN321 (section 4.12):
"If the vector table is in writable memory such as SRAM, either relocated
by VTOR or a device dependent memory remapping mechanism, then
architecturally a memory barrier instruction is required after the vector
table entry is updated, and if the exception is to be activated
immediately"
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 7229d8d..2ddc435 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -104,6 +104,7 @@ __v7m_setup:
badr r1, 1f
ldr r5, [r12, #11 * 4] @ read the SVC vector entry
str r1, [r12, #11 * 4] @ write the temporary SVC vector entry
+ dsb
mov r6, lr @ save LR
ldr sp, =init_thread_union + THREAD_START_SP
cpsie i
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: V7M: Add dsb before jumping in handler mode
2016-06-13 14:12 ` Alexandre TORGUE
@ 2016-06-15 15:36 ` Vladimir Murzin
-1 siblings, 0 replies; 6+ messages in thread
From: Vladimir Murzin @ 2016-06-15 15:36 UTC (permalink / raw)
To: Alexandre TORGUE, Russell King, Ezequiel Garcia, u.kleine-koenig,
Maxime Coquelin
Cc: linux-kernel, linux-arm-kernel
On 13/06/16 15:12, Alexandre TORGUE wrote:
> According to ARM AN321 (section 4.12):
>
> "If the vector table is in writable memory such as SRAM, either relocated
> by VTOR or a device dependent memory remapping mechanism, then
> architecturally a memory barrier instruction is required after the vector
> table entry is updated, and if the exception is to be activated
> immediately"
>
> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
>
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
> index 7229d8d..2ddc435 100644
> --- a/arch/arm/mm/proc-v7m.S
> +++ b/arch/arm/mm/proc-v7m.S
> @@ -104,6 +104,7 @@ __v7m_setup:
> badr r1, 1f
> ldr r5, [r12, #11 * 4] @ read the SVC vector entry
> str r1, [r12, #11 * 4] @ write the temporary SVC vector entry
> + dsb
> mov r6, lr @ save LR
> ldr sp, =init_thread_union + THREAD_START_SP
> cpsie i
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] ARM: V7M: Add dsb before jumping in handler mode
@ 2016-06-15 15:36 ` Vladimir Murzin
0 siblings, 0 replies; 6+ messages in thread
From: Vladimir Murzin @ 2016-06-15 15:36 UTC (permalink / raw)
To: linux-arm-kernel
On 13/06/16 15:12, Alexandre TORGUE wrote:
> According to ARM AN321 (section 4.12):
>
> "If the vector table is in writable memory such as SRAM, either relocated
> by VTOR or a device dependent memory remapping mechanism, then
> architecturally a memory barrier instruction is required after the vector
> table entry is updated, and if the exception is to be activated
> immediately"
>
> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
>
Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
> index 7229d8d..2ddc435 100644
> --- a/arch/arm/mm/proc-v7m.S
> +++ b/arch/arm/mm/proc-v7m.S
> @@ -104,6 +104,7 @@ __v7m_setup:
> badr r1, 1f
> ldr r5, [r12, #11 * 4] @ read the SVC vector entry
> str r1, [r12, #11 * 4] @ write the temporary SVC vector entry
> + dsb
> mov r6, lr @ save LR
> ldr sp, =init_thread_union + THREAD_START_SP
> cpsie i
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: V7M: Add dsb before jumping in handler mode
2016-06-15 15:36 ` Vladimir Murzin
@ 2016-08-17 15:28 ` Vladimir Murzin
-1 siblings, 0 replies; 6+ messages in thread
From: Vladimir Murzin @ 2016-08-17 15:28 UTC (permalink / raw)
To: Alexandre TORGUE, Russell King, Ezequiel Garcia, u.kleine-koenig,
Maxime Coquelin
Cc: linux-kernel, linux-arm-kernel
On 15/06/16 16:36, Vladimir Murzin wrote:
> On 13/06/16 15:12, Alexandre TORGUE wrote:
>> According to ARM AN321 (section 4.12):
>>
>> "If the vector table is in writable memory such as SRAM, either relocated
>> by VTOR or a device dependent memory remapping mechanism, then
>> architecturally a memory barrier instruction is required after the vector
>> table entry is updated, and if the exception is to be activated
>> immediately"
>>
>> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
>> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
>>
>
> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
>
>> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
>> index 7229d8d..2ddc435 100644
>> --- a/arch/arm/mm/proc-v7m.S
>> +++ b/arch/arm/mm/proc-v7m.S
>> @@ -104,6 +104,7 @@ __v7m_setup:
>> badr r1, 1f
>> ldr r5, [r12, #11 * 4] @ read the SVC vector entry
>> str r1, [r12, #11 * 4] @ write the temporary SVC vector entry
>> + dsb
>> mov r6, lr @ save LR
>> ldr sp, =init_thread_union + THREAD_START_SP
>> cpsie i
>>
>
Alex, xan you drop it into RMK's Patch system [1] please?
[1] http://www.armlinux.org.uk/developer/patches/
Thanks
Vladimir
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] ARM: V7M: Add dsb before jumping in handler mode
@ 2016-08-17 15:28 ` Vladimir Murzin
0 siblings, 0 replies; 6+ messages in thread
From: Vladimir Murzin @ 2016-08-17 15:28 UTC (permalink / raw)
To: linux-arm-kernel
On 15/06/16 16:36, Vladimir Murzin wrote:
> On 13/06/16 15:12, Alexandre TORGUE wrote:
>> According to ARM AN321 (section 4.12):
>>
>> "If the vector table is in writable memory such as SRAM, either relocated
>> by VTOR or a device dependent memory remapping mechanism, then
>> architecturally a memory barrier instruction is required after the vector
>> table entry is updated, and if the exception is to be activated
>> immediately"
>>
>> Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
>> Signed-off-by: Alexandre TORGUE <alexandre.torgue@st.com>
>>
>
> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com>
>
>> diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
>> index 7229d8d..2ddc435 100644
>> --- a/arch/arm/mm/proc-v7m.S
>> +++ b/arch/arm/mm/proc-v7m.S
>> @@ -104,6 +104,7 @@ __v7m_setup:
>> badr r1, 1f
>> ldr r5, [r12, #11 * 4] @ read the SVC vector entry
>> str r1, [r12, #11 * 4] @ write the temporary SVC vector entry
>> + dsb
>> mov r6, lr @ save LR
>> ldr sp, =init_thread_union + THREAD_START_SP
>> cpsie i
>>
>
Alex, xan you drop it into RMK's Patch system [1] please?
[1] http://www.armlinux.org.uk/developer/patches/
Thanks
Vladimir
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-08-17 15:28 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-06-13 14:12 [PATCH] ARM: V7M: Add dsb before jumping in handler mode Alexandre TORGUE
2016-06-13 14:12 ` Alexandre TORGUE
2016-06-15 15:36 ` Vladimir Murzin
2016-06-15 15:36 ` Vladimir Murzin
2016-08-17 15:28 ` Vladimir Murzin
2016-08-17 15:28 ` Vladimir Murzin
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