From: William Wu <william.wu@rock-chips.com> To: Rob Herring <robh@kernel.org> Cc: gregkh@linuxfoundation.org, balbi@kernel.org, heiko@sntech.de, linux-rockchip@lists.infradead.org, briannorris@google.com, dianders@google.com, kever.yang@rock-chips.com, huangtao@rock-chips.com, frank.wang@rock-chips.com, eddie.cai@rock-chips.com, John.Youn@synopsys.com, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, sergei.shtylyov@cogentembedded.com, mark.rutland@arm.com, devicetree@vger.kernel.org Subject: Re: [PATCH v5 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk[Involving remittance information, please pay attention to the safety of property] Date: Fri, 01 Jul 2016 10:49:19 +0800 [thread overview] Message-ID: <5775DA2F.8080609@rock-chips.com> (raw) In-Reply-To: <20160701023237.GA18701@rob-hp-laptop> Dear Rob, On 07/01/2016 10:32 AM, Rob Herring wrote: > On Thu, Jun 30, 2016 at 07:12:53PM +0800, William Wu wrote: >> Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, >> which specifies whether the USB2.0 PHY provides a free-running >> PHY clock, which is active when the clock control input is active. >> >> Signed-off-by: William Wu <william.wu@rock-chips.com> >> --- >> Changes in v5: >> - None >> >> Changes in v4: >> - rebase on top of balbi testing/next, remove pdata (balbi) >> >> Changes in v3: >> - None >> >> Changes in v2: >> - None >> >> Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ >> drivers/usb/dwc3/core.c | 5 +++++ >> drivers/usb/dwc3/core.h | 5 +++++ >> 3 files changed, 13 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt >> index 7d7ce08..1ada121 100644 >> --- a/Documentation/devicetree/bindings/usb/dwc3.txt >> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt >> @@ -39,6 +39,9 @@ Optional properties: >> disabling the suspend signal to the PHY. >> - snps,dis_rxdet_inp3_quirk: when set core will disable receiver detection >> in PHY P3 power state. >> + - snps,dis_u2_freeclk_exists_quirk: when set, clear the u2_freeclk_exists > Use '-', not '_'. OK, I'll fix them in next patch. Thanks very much for your help. > >> + in GUSB2PHYCFG, specify that USB2 PHY doesn't provide >> + a free-running PHY clock. >> - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal >> utmi_l1_suspend_n, false when asserts utmi_sleep_n >> - snps,hird-threshold: HIRD threshold > >
WARNING: multiple messages have this Message-ID (diff)
From: William Wu <william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> To: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Cc: huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org, balbi-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org, sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, kever.yang-TNX95d0MmH7DzftRWevZcw@public.gmane.org, dianders-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, eddie.cai-TNX95d0MmH7DzftRWevZcw@public.gmane.org, briannorris-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, John.Youn-HKixBCOQz3hWk0Htik3J/w@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Subject: Re: [PATCH v5 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk[Involving remittance information, please pay attention to the safety of property] Date: Fri, 01 Jul 2016 10:49:19 +0800 [thread overview] Message-ID: <5775DA2F.8080609@rock-chips.com> (raw) In-Reply-To: <20160701023237.GA18701@rob-hp-laptop> Dear Rob, On 07/01/2016 10:32 AM, Rob Herring wrote: > On Thu, Jun 30, 2016 at 07:12:53PM +0800, William Wu wrote: >> Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, >> which specifies whether the USB2.0 PHY provides a free-running >> PHY clock, which is active when the clock control input is active. >> >> Signed-off-by: William Wu <william.wu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> >> --- >> Changes in v5: >> - None >> >> Changes in v4: >> - rebase on top of balbi testing/next, remove pdata (balbi) >> >> Changes in v3: >> - None >> >> Changes in v2: >> - None >> >> Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ >> drivers/usb/dwc3/core.c | 5 +++++ >> drivers/usb/dwc3/core.h | 5 +++++ >> 3 files changed, 13 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt >> index 7d7ce08..1ada121 100644 >> --- a/Documentation/devicetree/bindings/usb/dwc3.txt >> +++ b/Documentation/devicetree/bindings/usb/dwc3.txt >> @@ -39,6 +39,9 @@ Optional properties: >> disabling the suspend signal to the PHY. >> - snps,dis_rxdet_inp3_quirk: when set core will disable receiver detection >> in PHY P3 power state. >> + - snps,dis_u2_freeclk_exists_quirk: when set, clear the u2_freeclk_exists > Use '-', not '_'. OK, I'll fix them in next patch. Thanks very much for your help. > >> + in GUSB2PHYCFG, specify that USB2 PHY doesn't provide >> + a free-running PHY clock. >> - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal >> utmi_l1_suspend_n, false when asserts utmi_sleep_n >> - snps,hird-threshold: HIRD threshold > >
next prev parent reply other threads:[~2016-07-01 2:49 UTC|newest] Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-06-30 11:12 [PATCH v5 0/5] support rockchip dwc3 driver William Wu 2016-06-30 11:12 ` William Wu 2016-06-30 11:12 ` [PATCH v5 1/5] usb: dwc3: of-simple: add compatible for rockchip rk3399 William Wu 2016-06-30 11:12 ` William Wu 2016-06-30 11:12 ` [PATCH v5 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk William Wu 2016-06-30 11:12 ` William Wu 2016-07-01 2:32 ` Rob Herring 2016-07-01 2:49 ` William Wu [this message] 2016-07-01 2:49 ` [PATCH v5 2/5] usb: dwc3: add dis_u2_freeclk_exists_quirk[Involving remittance information, please pay attention to the safety of property] William Wu 2016-06-30 11:12 ` [PATCH v5 3/5] usb: dwc3: add phyif_utmi_quirk William Wu 2016-07-01 2:35 ` Rob Herring 2016-07-01 2:35 ` Rob Herring 2016-07-01 3:45 ` [PATCH v5 3/5] usb: dwc3: add phyif_utmi_quirk[Involving remittance information, please pay attention to the safety of property] William Wu 2016-07-01 3:53 ` William Wu 2016-06-30 11:12 ` [PATCH v5 4/5] usb: dwc3: add dis_del_phy_power_chg_quirk William Wu 2016-06-30 11:12 ` William Wu 2016-07-01 2:38 ` Rob Herring 2016-07-01 2:38 ` Rob Herring 2016-07-01 2:51 ` [PATCH v5 4/5] usb: dwc3: add dis_del_phy_power_chg_quirk[Involving remittance information, please pay attention to the safety of property] William Wu 2016-06-30 11:16 ` [PATCH v5 5/5] usb: dwc3: rockchip: add devicetree bindings documentation William Wu 2016-06-30 12:15 ` Heiko Stuebner 2016-07-01 1:20 ` William Wu 2016-07-01 1:20 ` William Wu
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