From: Stafford Horne <shorne@gmail.com> To: Jonas Bonn <jonas@southpole.se>, Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Cc: linux@roeck-us.net, openrisc@lists.librecores.org, linux-kernel@vger.kernel.org, Peter Zijlstra <peterz@infradead.org>, Stafford Horne <shorne@gmail.com> Subject: [PATCH v3 08/25] openrisc: add cmpxchg and xchg implementations Date: Wed, 22 Feb 2017 04:11:37 +0900 [thread overview] Message-ID: <58010da3ed6e62743cc99674349f91022b41e92a.1487702890.git.shorne@gmail.com> (raw) In-Reply-To: <cover.1487702890.git.shorne@gmail.com> In-Reply-To: <cover.1487702890.git.shorne@gmail.com> From: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Optimized version that make use of the l.lwa and l.swa atomic instruction pair. Most openrisc cores provide these instructions now, if not available emulation is provided. Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne@gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666] [shorne@gmail.com: fixed unused calculated value compiler warning in define cmpxchg] Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/include/asm/Kbuild | 2 - arch/openrisc/include/asm/cmpxchg.h | 82 +++++++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+), 2 deletions(-) create mode 100644 arch/openrisc/include/asm/cmpxchg.h diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild index 6dd177d..15e6ed5 100644 --- a/arch/openrisc/include/asm/Kbuild +++ b/arch/openrisc/include/asm/Kbuild @@ -10,8 +10,6 @@ generic-y += bugs.h generic-y += cacheflush.h generic-y += checksum.h generic-y += clkdev.h -generic-y += cmpxchg-local.h -generic-y += cmpxchg.h generic-y += cputime.h generic-y += current.h generic-y += device.h diff --git a/arch/openrisc/include/asm/cmpxchg.h b/arch/openrisc/include/asm/cmpxchg.h new file mode 100644 index 0000000..6d73c7b --- /dev/null +++ b/arch/openrisc/include/asm/cmpxchg.h @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2014 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef __ASM_OPENRISC_CMPXCHG_H +#define __ASM_OPENRISC_CMPXCHG_H + +#include <linux/types.h> + +/* + * This function doesn't exist, so you'll get a linker error + * if something tries to do an invalid cmpxchg(). + */ +extern void __cmpxchg_called_with_bad_pointer(void); + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long +__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) +{ + if (size != 4) { + __cmpxchg_called_with_bad_pointer(); + return old; + } + + __asm__ __volatile__( + "1: l.lwa %0, 0(%1) \n" + " l.sfeq %0, %2 \n" + " l.bnf 1f \n" + " l.nop \n" + " l.swa 0(%1), %3 \n" + " l.bnf 1b \n" + "1: l.nop \n" + : "=&r"(old) + : "r"(ptr), "r"(old), "r"(new) + : "cc", "memory"); + + return old; +} + +#define cmpxchg(ptr, o, n) \ + ({ \ + (__typeof__(*(ptr))) __cmpxchg((ptr), \ + (unsigned long)(o), \ + (unsigned long)(n), \ + sizeof(*(ptr))); \ + }) + +/* + * This function doesn't exist, so you'll get a linker error if + * something tries to do an invalidly-sized xchg(). + */ +extern void __xchg_called_with_bad_pointer(void); + +static inline unsigned long __xchg(unsigned long val, volatile void *ptr, + int size) +{ + if (size != 4) { + __xchg_called_with_bad_pointer(); + return val; + } + + __asm__ __volatile__( + "1: l.lwa %0, 0(%1) \n" + " l.swa 0(%1), %2 \n" + " l.bnf 1b \n" + " l.nop \n" + : "=&r"(val) + : "r"(ptr), "r"(val) + : "cc", "memory"); + + return val; +} + +#define xchg(ptr, with) \ + ((typeof(*(ptr)))__xchg((unsigned long)(with), (ptr), sizeof(*(ptr)))) + +#endif /* __ASM_OPENRISC_CMPXCHG_H */ -- 2.9.3
WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne@gmail.com> To: openrisc@lists.librecores.org Subject: [OpenRISC] [PATCH v3 08/25] openrisc: add cmpxchg and xchg implementations Date: Wed, 22 Feb 2017 04:11:37 +0900 [thread overview] Message-ID: <58010da3ed6e62743cc99674349f91022b41e92a.1487702890.git.shorne@gmail.com> (raw) In-Reply-To: <cover.1487702890.git.shorne@gmail.com> From: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Optimized version that make use of the l.lwa and l.swa atomic instruction pair. Most openrisc cores provide these instructions now, if not available emulation is provided. Cc: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> [shorne at gmail.com: remove OPENRISC_HAVE_INST_LWA_SWA config suggesed by Alan Cox https://lkml.org/lkml/2014/7/23/666] [shorne at gmail.com: fixed unused calculated value compiler warning in define cmpxchg] Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/include/asm/Kbuild | 2 - arch/openrisc/include/asm/cmpxchg.h | 82 +++++++++++++++++++++++++++++++++++++ 2 files changed, 82 insertions(+), 2 deletions(-) create mode 100644 arch/openrisc/include/asm/cmpxchg.h diff --git a/arch/openrisc/include/asm/Kbuild b/arch/openrisc/include/asm/Kbuild index 6dd177d..15e6ed5 100644 --- a/arch/openrisc/include/asm/Kbuild +++ b/arch/openrisc/include/asm/Kbuild @@ -10,8 +10,6 @@ generic-y += bugs.h generic-y += cacheflush.h generic-y += checksum.h generic-y += clkdev.h -generic-y += cmpxchg-local.h -generic-y += cmpxchg.h generic-y += cputime.h generic-y += current.h generic-y += device.h diff --git a/arch/openrisc/include/asm/cmpxchg.h b/arch/openrisc/include/asm/cmpxchg.h new file mode 100644 index 0000000..6d73c7b --- /dev/null +++ b/arch/openrisc/include/asm/cmpxchg.h @@ -0,0 +1,82 @@ +/* + * Copyright (C) 2014 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef __ASM_OPENRISC_CMPXCHG_H +#define __ASM_OPENRISC_CMPXCHG_H + +#include <linux/types.h> + +/* + * This function doesn't exist, so you'll get a linker error + * if something tries to do an invalid cmpxchg(). + */ +extern void __cmpxchg_called_with_bad_pointer(void); + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long +__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) +{ + if (size != 4) { + __cmpxchg_called_with_bad_pointer(); + return old; + } + + __asm__ __volatile__( + "1: l.lwa %0, 0(%1) \n" + " l.sfeq %0, %2 \n" + " l.bnf 1f \n" + " l.nop \n" + " l.swa 0(%1), %3 \n" + " l.bnf 1b \n" + "1: l.nop \n" + : "=&r"(old) + : "r"(ptr), "r"(old), "r"(new) + : "cc", "memory"); + + return old; +} + +#define cmpxchg(ptr, o, n) \ + ({ \ + (__typeof__(*(ptr))) __cmpxchg((ptr), \ + (unsigned long)(o), \ + (unsigned long)(n), \ + sizeof(*(ptr))); \ + }) + +/* + * This function doesn't exist, so you'll get a linker error if + * something tries to do an invalidly-sized xchg(). + */ +extern void __xchg_called_with_bad_pointer(void); + +static inline unsigned long __xchg(unsigned long val, volatile void *ptr, + int size) +{ + if (size != 4) { + __xchg_called_with_bad_pointer(); + return val; + } + + __asm__ __volatile__( + "1: l.lwa %0, 0(%1) \n" + " l.swa 0(%1), %2 \n" + " l.bnf 1b \n" + " l.nop \n" + : "=&r"(val) + : "r"(ptr), "r"(val) + : "cc", "memory"); + + return val; +} + +#define xchg(ptr, with) \ + ((typeof(*(ptr)))__xchg((unsigned long)(with), (ptr), sizeof(*(ptr)))) + +#endif /* __ASM_OPENRISC_CMPXCHG_H */ -- 2.9.3
next prev parent reply other threads:[~2017-02-21 19:13 UTC|newest] Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-02-21 19:11 [PATCH v3 00/25] OpenRISC patches for 4.11 final call Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 01/25] openrisc: use SPARSE_IRQ Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 02/25] openrisc: add cache way information to cpuinfo Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-03-14 12:08 ` Sudeep Holla 2017-03-14 12:08 ` [OpenRISC] " Sudeep Holla 2017-03-14 13:11 ` Stefan Kristiansson 2017-03-14 13:11 ` [OpenRISC] " Stefan Kristiansson 2017-03-14 13:45 ` Sudeep Holla 2017-03-14 13:45 ` [OpenRISC] " Sudeep Holla 2017-03-14 14:09 ` Stafford Horne 2017-03-14 14:09 ` [OpenRISC] " Stafford Horne 2017-03-14 15:55 ` Sudeep Holla 2017-03-14 15:55 ` [OpenRISC] " Sudeep Holla 2017-02-21 19:11 ` [PATCH v3 03/25] openrisc: tlb miss handler optimizations Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 04/25] openrisc: head: use THREAD_SIZE instead of magic constant Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 05/25] openrisc: head: refactor out tlb flush into it's own function Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 06/25] openrisc: add l.lwa/l.swa emulation Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 07/25] openrisc: add atomic bitops Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` Stafford Horne [this message] 2017-02-21 19:11 ` [OpenRISC] [PATCH v3 08/25] openrisc: add cmpxchg and xchg implementations Stafford Horne 2017-02-22 11:19 ` Peter Zijlstra 2017-02-22 11:19 ` [OpenRISC] " Peter Zijlstra 2017-02-22 14:20 ` Stafford Horne 2017-02-22 14:20 ` [OpenRISC] " Stafford Horne 2017-02-22 17:30 ` Richard Henderson 2017-02-22 17:30 ` Richard Henderson 2017-02-22 22:43 ` Stafford Horne 2017-02-22 22:43 ` Stafford Horne 2017-02-21 19:11 ` [PATCH v3 09/25] openrisc: add optimized atomic operations Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-22 11:27 ` Peter Zijlstra 2017-02-22 11:27 ` [OpenRISC] " Peter Zijlstra 2017-02-22 14:22 ` Stafford Horne 2017-02-22 14:22 ` [OpenRISC] " Stafford Horne 2017-02-22 17:31 ` Richard Henderson 2017-02-22 17:31 ` Richard Henderson 2017-02-22 22:42 ` Stafford Horne 2017-02-22 22:42 ` Stafford Horne 2017-02-21 19:11 ` [PATCH v3 10/25] openrisc: add spinlock implementation Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-22 11:29 ` Peter Zijlstra 2017-02-22 11:29 ` [OpenRISC] " Peter Zijlstra 2017-02-22 11:32 ` Peter Zijlstra 2017-02-22 11:32 ` [OpenRISC] " Peter Zijlstra 2017-02-22 11:37 ` Peter Zijlstra 2017-02-22 11:37 ` [OpenRISC] " Peter Zijlstra 2017-02-22 12:02 ` Peter Zijlstra 2017-02-22 12:02 ` [OpenRISC] " Peter Zijlstra 2017-02-22 11:38 ` Peter Zijlstra 2017-02-22 11:38 ` [OpenRISC] " Peter Zijlstra 2017-02-22 11:41 ` Peter Zijlstra 2017-02-22 11:41 ` [OpenRISC] " Peter Zijlstra 2017-02-22 12:08 ` Peter Zijlstra 2017-02-22 12:08 ` [OpenRISC] " Peter Zijlstra 2017-02-21 19:11 ` [PATCH v3 11/25] openrisc: add futex_atomic_* implementations Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 12/25] openrisc: remove unnecessary stddef.h include Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 13/25] openrisc: Fix the bitmask for the unit present register Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 14/25] openrisc: Initial support for the idle state Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 20:24 ` Joe Perches 2017-02-21 20:24 ` [OpenRISC] " Joe Perches 2017-02-22 14:19 ` Stafford Horne 2017-02-22 14:19 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 15/25] openrisc: Add optimized memset Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 16/25] openrisc: Add optimized memcpy routine Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 17/25] openrisc: Add .gitignore Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 18/25] MAINTAINERS: Add the openrisc official repository Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 19/25] scripts/checkstack.pl: Add openrisc support Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 20/25] openrisc: entry: Whitespace and comment cleanups Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 21/25] openrisc: entry: Fix delay slot detection Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 22/25] openrisc: head: Move init strings to rodata section Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 23/25] arch/openrisc/lib/memcpy.c: use correct OR1200 option Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 24/25] openrisc: Export ioremap symbols used by modules Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne 2017-02-21 19:11 ` [PATCH v3 25/25] openrisc: head: Init r0 to 0 on start Stafford Horne 2017-02-21 19:11 ` [OpenRISC] " Stafford Horne
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=58010da3ed6e62743cc99674349f91022b41e92a.1487702890.git.shorne@gmail.com \ --to=shorne@gmail.com \ --cc=jonas@southpole.se \ --cc=linux-kernel@vger.kernel.org \ --cc=linux@roeck-us.net \ --cc=openrisc@lists.librecores.org \ --cc=peterz@infradead.org \ --cc=stefan.kristiansson@saunalahti.fi \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.