* [PATCH] x86emul: support fencing insns
@ 2016-12-14 9:37 Jan Beulich
2017-01-05 19:26 ` Andrew Cooper
0 siblings, 1 reply; 3+ messages in thread
From: Jan Beulich @ 2016-12-14 9:37 UTC (permalink / raw)
To: xen-devel; +Cc: Andrew Cooper
[-- Attachment #1: Type: text/plain, Size: 1247 bytes --]
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5190,8 +5190,26 @@ x86_emulate(
case X86EMUL_OPC(0x0f, 0xae): case X86EMUL_OPC_66(0x0f, 0xae): /* Grp15 */
switch ( modrm_reg & 7 )
{
- case 7: /* clflush{,opt} */
- fail_if(modrm_mod == 3);
+ case 5: /* lfence */
+ fail_if(modrm_mod != 3);
+ generate_exception_if(vex.pfx, EXC_UD);
+ vcpu_must_have(sse2);
+ asm volatile ( "lfence" ::: "memory" );
+ break;
+ case 6: /* mfence */
+ fail_if(modrm_mod != 3);
+ generate_exception_if(vex.pfx, EXC_UD);
+ vcpu_must_have(sse2);
+ asm volatile ( "mfence" ::: "memory" );
+ break;
+ case 7: /* clflush{,opt} / sfence */
+ if ( modrm_mod == 3 )
+ {
+ generate_exception_if(vex.pfx, EXC_UD);
+ vcpu_must_have(sse);
+ asm volatile ( "sfence" ::: "memory" );
+ break;
+ }
if ( !vex.pfx )
vcpu_must_have(clflush);
else
[-- Attachment #2: x86emul-fences.patch --]
[-- Type: text/plain, Size: 1275 bytes --]
x86emul: support fencing insns
Signed-off-by: Jan Beulich <jbeulich@suse.com>
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5190,8 +5190,26 @@ x86_emulate(
case X86EMUL_OPC(0x0f, 0xae): case X86EMUL_OPC_66(0x0f, 0xae): /* Grp15 */
switch ( modrm_reg & 7 )
{
- case 7: /* clflush{,opt} */
- fail_if(modrm_mod == 3);
+ case 5: /* lfence */
+ fail_if(modrm_mod != 3);
+ generate_exception_if(vex.pfx, EXC_UD);
+ vcpu_must_have(sse2);
+ asm volatile ( "lfence" ::: "memory" );
+ break;
+ case 6: /* mfence */
+ fail_if(modrm_mod != 3);
+ generate_exception_if(vex.pfx, EXC_UD);
+ vcpu_must_have(sse2);
+ asm volatile ( "mfence" ::: "memory" );
+ break;
+ case 7: /* clflush{,opt} / sfence */
+ if ( modrm_mod == 3 )
+ {
+ generate_exception_if(vex.pfx, EXC_UD);
+ vcpu_must_have(sse);
+ asm volatile ( "sfence" ::: "memory" );
+ break;
+ }
if ( !vex.pfx )
vcpu_must_have(clflush);
else
[-- Attachment #3: Type: text/plain, Size: 127 bytes --]
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] x86emul: support fencing insns
2016-12-14 9:37 [PATCH] x86emul: support fencing insns Jan Beulich
@ 2017-01-05 19:26 ` Andrew Cooper
2017-01-06 13:37 ` Jan Beulich
0 siblings, 1 reply; 3+ messages in thread
From: Andrew Cooper @ 2017-01-05 19:26 UTC (permalink / raw)
To: Jan Beulich, xen-devel
On 14/12/16 09:37, Jan Beulich wrote:
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -5190,8 +5190,26 @@ x86_emulate(
> case X86EMUL_OPC(0x0f, 0xae): case X86EMUL_OPC_66(0x0f, 0xae): /* Grp15 */
> switch ( modrm_reg & 7 )
> {
> - case 7: /* clflush{,opt} */
> - fail_if(modrm_mod == 3);
> + case 5: /* lfence */
> + fail_if(modrm_mod != 3);
> + generate_exception_if(vex.pfx, EXC_UD);
> + vcpu_must_have(sse2);
> + asm volatile ( "lfence" ::: "memory" );
> + break;
> + case 6: /* mfence */
> + fail_if(modrm_mod != 3);
> + generate_exception_if(vex.pfx, EXC_UD);
> + vcpu_must_have(sse2);
> + asm volatile ( "mfence" ::: "memory" );
> + break;
> + case 7: /* clflush{,opt} / sfence */
> + if ( modrm_mod == 3 )
Could I talk you into having
if ( modrm_mod == 3 ) /* sfence */
and
> + {
> + generate_exception_if(vex.pfx, EXC_UD);
> + vcpu_must_have(sse);
> + asm volatile ( "sfence" ::: "memory" );
> + break;
> + }
/* else clflush{,opt} */ ?
Even knowing what is going on, this is a little hard to follow.
Otherwise, Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
> if ( !vex.pfx )
> vcpu_must_have(clflush);
> else
>
>
>
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] x86emul: support fencing insns
2017-01-05 19:26 ` Andrew Cooper
@ 2017-01-06 13:37 ` Jan Beulich
0 siblings, 0 replies; 3+ messages in thread
From: Jan Beulich @ 2017-01-06 13:37 UTC (permalink / raw)
To: Andrew Cooper; +Cc: xen-devel
>>> On 05.01.17 at 20:26, <andrew.cooper3@citrix.com> wrote:
> On 14/12/16 09:37, Jan Beulich wrote:
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
>>
>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -5190,8 +5190,26 @@ x86_emulate(
>> case X86EMUL_OPC(0x0f, 0xae): case X86EMUL_OPC_66(0x0f, 0xae): /* Grp15
> */
>> switch ( modrm_reg & 7 )
>> {
>> - case 7: /* clflush{,opt} */
>> - fail_if(modrm_mod == 3);
>> + case 5: /* lfence */
>> + fail_if(modrm_mod != 3);
>> + generate_exception_if(vex.pfx, EXC_UD);
>> + vcpu_must_have(sse2);
>> + asm volatile ( "lfence" ::: "memory" );
>> + break;
>> + case 6: /* mfence */
>> + fail_if(modrm_mod != 3);
>> + generate_exception_if(vex.pfx, EXC_UD);
>> + vcpu_must_have(sse2);
>> + asm volatile ( "mfence" ::: "memory" );
>> + break;
>> + case 7: /* clflush{,opt} / sfence */
>> + if ( modrm_mod == 3 )
>
> Could I talk you into having
>
> if ( modrm_mod == 3 ) /* sfence */
>
> and
>
>> + {
>> + generate_exception_if(vex.pfx, EXC_UD);
>> + vcpu_must_have(sse);
>> + asm volatile ( "sfence" ::: "memory" );
>> + break;
>> + }
>
> /* else clflush{,opt} */ ?
>
> Even knowing what is going on, this is a little hard to follow.
No problem.
> Otherwise, Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Thanks.
Jan
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^ permalink raw reply [flat|nested] 3+ messages in thread
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2016-12-14 9:37 [PATCH] x86emul: support fencing insns Jan Beulich
2017-01-05 19:26 ` Andrew Cooper
2017-01-06 13:37 ` Jan Beulich
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