From: "Jan Beulich" <JBeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH 4/8] x86emul: support BMI2 insns
Date: Mon, 16 Jan 2017 04:32:40 -0700 [thread overview]
Message-ID: <587CBD68020000780013061B@prv-mh.provo.novell.com> (raw)
In-Reply-To: <a4c056b6-6955-bb26-b6b7-e2f31c0d7186@citrix.com>
>>> On 13.01.17 at 19:20, <andrew.cooper3@citrix.com> wrote:
> On 13/01/17 15:32, Jan Beulich wrote:
>> Note that the adjustment to the mode_64bit() definition is so that we
>> can avoid "#ifdef __x86_64__" around the 64-bit asm() portions. An
>> alternative would be single asm()s with a conditional branch over the
>> (manually encoded) REX64 prefix.
>
> This presumably relying on sensible dead-code-elimitation to compile?
Yes.
> Does this offer any further opportunities with removing other ifdefs?
When I had written this, it looked like it might, but I didn't create
any follow-up patches so far.
>> @@ -5973,6 +5987,33 @@ x86_emulate(
>> break;
>> }
>>
>> + case X86EMUL_OPC_VEX_F2(0x0f38, 0xf6): /* mulx r/m,r,r */
>> + vcpu_must_have(bmi2);
>> + generate_exception_if(vex.l, EXC_UD);
>
> vex.w again.
Nope (see also the textual description, which actually mentions
VEX.L).
>> + ea.reg = decode_register(~vex.reg & (mode_64bit() ? 0xf : 7),
>> + &_regs, 0);
>> + if ( mode_64bit() && vex.w )
>> + asm ( "mulq %3" : "=a" (*ea.reg), "=d" (dst.val)
>> + : "0" (src.val), "rm" (_regs.r(dx)) );
>> + else
>> + asm ( "mull %3" : "=a" (*ea.reg), "=d" (dst.val)
>> + : "0" ((uint32_t)src.val), "rm" (_regs._edx) );
>> + break;
>> +
>> + case X86EMUL_OPC_VEX_F2(0x0f3a, 0xf0): /* rorx imm,r/m,r */
>> + vcpu_must_have(bmi2);
>> + generate_exception_if(vex.l || vex.reg != 0xf, EXC_UD);
>
> What does this vex.reg check correspond to? I can't locate anything
> relevant in the manuals.
Indeed the manual says nothing, but this again appears to be a
doc error: The instruction does #UD in that case. I'll add a word
to the commit message.
Jan
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next prev parent reply other threads:[~2017-01-16 11:32 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-13 15:11 [PATCH 0/8] x86emul: support various ISA extensions Jan Beulich
2017-01-13 15:30 ` [PATCH 1/8] x86emul: support POPCNT Jan Beulich
2017-01-13 16:31 ` Andrew Cooper
2017-01-13 15:31 ` [PATCH 2/8] x86emul: support ADCX/ADOX Jan Beulich
2017-01-13 16:34 ` Andrew Cooper
2017-01-13 15:31 ` [PATCH 3/8] x86emul: support BMI1 insns Jan Beulich
2017-01-13 17:40 ` Andrew Cooper
2017-01-16 11:19 ` Jan Beulich
2017-01-16 11:59 ` Andrew Cooper
2017-01-16 12:43 ` Jan Beulich
2017-01-16 12:57 ` Jan Beulich
2017-01-16 13:51 ` Andrew Cooper
2017-01-16 13:58 ` Jan Beulich
2017-01-16 14:17 ` Andrew Cooper
2017-01-16 15:43 ` Jan Beulich
2017-01-13 15:32 ` [PATCH 4/8] x86emul: support BMI2 insns Jan Beulich
2017-01-13 18:20 ` Andrew Cooper
2017-01-16 11:32 ` Jan Beulich [this message]
2017-01-13 15:32 ` [PATCH 5/8] x86emul: support TBM insns Jan Beulich
2017-01-13 18:48 ` Andrew Cooper
2017-01-16 11:36 ` Jan Beulich
2017-01-16 14:52 ` Andrew Cooper
2017-01-16 15:45 ` Jan Beulich
2017-01-13 15:34 ` [PATCH 6/8] x86emul: support RDRAND/RDSEED Jan Beulich
2017-01-13 18:55 ` Andrew Cooper
2017-01-13 15:34 ` [PATCH 7/8] x86emul: support RDPID Jan Beulich
2017-01-13 19:00 ` Andrew Cooper
2017-01-13 15:35 ` [PATCH 8/8] x86emul: rename the no_writeback label Jan Beulich
2017-01-13 19:01 ` Andrew Cooper
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