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From: Chris Zhong <zyw@rock-chips.com>
To: John Keeping <john@metanate.com>, Mark Yao <mark.yao@rock-chips.com>
Cc: dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 03/26] drm/rockchip: dw-mipi-dsi: pass mode in where needed
Date: Sun, 22 Jan 2017 12:00:22 +0800	[thread overview]
Message-ID: <58842E56.2000405@rock-chips.com> (raw)
In-Reply-To: <20170121163128.22240-4-john@metanate.com>

Hi John

Reviewed-by: Chris Zhong <zyw@rock-chips.com>

On 01/22/2017 12:31 AM, John Keeping wrote:
> This shows that we only use the mode from the enable function and
> prepares us to remove the "mode" field and the mode_set hook in the next
> commit.
>
> Signed-off-by: John Keeping <john@metanate.com>
> ---
> New in v2
> ---
>   drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 41 ++++++++++++++++++----------------
>   1 file changed, 22 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index bbd992299f73..cdbd25087e83 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -330,11 +330,11 @@ static int max_mbps_to_testdin(unsigned int max_mbps)
>    * The controller should generate 2 frames before
>    * preparing the peripheral.
>    */
> -static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_wait_for_two_frames(struct drm_display_mode *mode)
>   {
>   	int refresh, two_frames;
>   
> -	refresh = drm_mode_vrefresh(dsi->mode);
> +	refresh = drm_mode_vrefresh(mode);
>   	two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
>   	msleep(two_frames);
>   }
> @@ -459,7 +459,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
>   	return ret;
>   }
>   
> -static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
> +static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi,
> +				    struct drm_display_mode *mode)
>   {
>   	unsigned int i, pre;
>   	unsigned long mpclk, pllref, tmp;
> @@ -474,7 +475,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
>   		return bpp;
>   	}
>   
> -	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
> +	mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);
>   	if (mpclk) {
>   		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
>   		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
> @@ -742,43 +743,44 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
>   
>   /* Get lane byte clock cycles. */
>   static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
> +					   struct drm_display_mode *mode,
>   					   u32 hcomponent)
>   {
>   	u32 frac, lbcc;
>   
>   	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
>   
> -	frac = lbcc % dsi->mode->clock;
> -	lbcc = lbcc / dsi->mode->clock;
> +	frac = lbcc % mode->clock;
> +	lbcc = lbcc / mode->clock;
>   	if (frac)
>   		lbcc++;
>   
>   	return lbcc;
>   }
>   
> -static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi,
> +					  struct drm_display_mode *mode)
>   {
>   	u32 htotal, hsa, hbp, lbcc;
> -	struct drm_display_mode *mode = dsi->mode;
>   
>   	htotal = mode->htotal;
>   	hsa = mode->hsync_end - mode->hsync_start;
>   	hbp = mode->htotal - mode->hsync_end;
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal);
>   	dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa);
>   	dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp);
>   	dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);
>   }
>   
> -static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi,
> +					       struct drm_display_mode *mode)
>   {
>   	u32 vactive, vsa, vfp, vbp;
> -	struct drm_display_mode *mode = dsi->mode;
>   
>   	vactive = mode->vdisplay;
>   	vsa = mode->vsync_end - mode->vsync_start;
> @@ -852,11 +854,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
>   static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   {
>   	struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
> +	struct drm_display_mode *mode = dsi->mode;
>   	int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder);
>   	u32 val;
>   	int ret;
>   
> -	ret = dw_mipi_dsi_get_lane_bps(dsi);
> +	ret = dw_mipi_dsi_get_lane_bps(dsi, mode);
>   	if (ret < 0)
>   		return;
>   
> @@ -866,13 +869,13 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   	}
>   
>   	dw_mipi_dsi_init(dsi);
> -	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
> +	dw_mipi_dsi_dpi_config(dsi, mode);
>   	dw_mipi_dsi_packet_handler_config(dsi);
>   	dw_mipi_dsi_video_mode_config(dsi);
> -	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
> +	dw_mipi_dsi_video_packet_config(dsi, mode);
>   	dw_mipi_dsi_command_mode_config(dsi);
> -	dw_mipi_dsi_line_timer_config(dsi);
> -	dw_mipi_dsi_vertical_timing_config(dsi);
> +	dw_mipi_dsi_line_timer_config(dsi, mode);
> +	dw_mipi_dsi_vertical_timing_config(dsi, mode);
>   	dw_mipi_dsi_dphy_timing_config(dsi);
>   	dw_mipi_dsi_dphy_interface_config(dsi);
>   	dw_mipi_dsi_clear_err(dsi);
> @@ -880,7 +883,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   		dev_err(dsi->dev, "failed to prepare panel\n");
>   
>   	dw_mipi_dsi_phy_init(dsi);
> -	dw_mipi_dsi_wait_for_two_frames(dsi);
> +	dw_mipi_dsi_wait_for_two_frames(mode);
>   
>   	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
>   	drm_panel_enable(dsi->panel);

WARNING: multiple messages have this Message-ID (diff)
From: Chris Zhong <zyw@rock-chips.com>
To: John Keeping <john@metanate.com>, Mark Yao <mark.yao@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 03/26] drm/rockchip: dw-mipi-dsi: pass mode in where needed
Date: Sun, 22 Jan 2017 12:00:22 +0800	[thread overview]
Message-ID: <58842E56.2000405@rock-chips.com> (raw)
In-Reply-To: <20170121163128.22240-4-john@metanate.com>

Hi John

Reviewed-by: Chris Zhong <zyw@rock-chips.com>

On 01/22/2017 12:31 AM, John Keeping wrote:
> This shows that we only use the mode from the enable function and
> prepares us to remove the "mode" field and the mode_set hook in the next
> commit.
>
> Signed-off-by: John Keeping <john@metanate.com>
> ---
> New in v2
> ---
>   drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 41 ++++++++++++++++++----------------
>   1 file changed, 22 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index bbd992299f73..cdbd25087e83 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -330,11 +330,11 @@ static int max_mbps_to_testdin(unsigned int max_mbps)
>    * The controller should generate 2 frames before
>    * preparing the peripheral.
>    */
> -static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_wait_for_two_frames(struct drm_display_mode *mode)
>   {
>   	int refresh, two_frames;
>   
> -	refresh = drm_mode_vrefresh(dsi->mode);
> +	refresh = drm_mode_vrefresh(mode);
>   	two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
>   	msleep(two_frames);
>   }
> @@ -459,7 +459,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
>   	return ret;
>   }
>   
> -static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
> +static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi,
> +				    struct drm_display_mode *mode)
>   {
>   	unsigned int i, pre;
>   	unsigned long mpclk, pllref, tmp;
> @@ -474,7 +475,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
>   		return bpp;
>   	}
>   
> -	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
> +	mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);
>   	if (mpclk) {
>   		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
>   		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
> @@ -742,43 +743,44 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
>   
>   /* Get lane byte clock cycles. */
>   static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
> +					   struct drm_display_mode *mode,
>   					   u32 hcomponent)
>   {
>   	u32 frac, lbcc;
>   
>   	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
>   
> -	frac = lbcc % dsi->mode->clock;
> -	lbcc = lbcc / dsi->mode->clock;
> +	frac = lbcc % mode->clock;
> +	lbcc = lbcc / mode->clock;
>   	if (frac)
>   		lbcc++;
>   
>   	return lbcc;
>   }
>   
> -static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi,
> +					  struct drm_display_mode *mode)
>   {
>   	u32 htotal, hsa, hbp, lbcc;
> -	struct drm_display_mode *mode = dsi->mode;
>   
>   	htotal = mode->htotal;
>   	hsa = mode->hsync_end - mode->hsync_start;
>   	hbp = mode->htotal - mode->hsync_end;
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal);
>   	dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa);
>   	dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp);
>   	dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);
>   }
>   
> -static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi,
> +					       struct drm_display_mode *mode)
>   {
>   	u32 vactive, vsa, vfp, vbp;
> -	struct drm_display_mode *mode = dsi->mode;
>   
>   	vactive = mode->vdisplay;
>   	vsa = mode->vsync_end - mode->vsync_start;
> @@ -852,11 +854,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
>   static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   {
>   	struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
> +	struct drm_display_mode *mode = dsi->mode;
>   	int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder);
>   	u32 val;
>   	int ret;
>   
> -	ret = dw_mipi_dsi_get_lane_bps(dsi);
> +	ret = dw_mipi_dsi_get_lane_bps(dsi, mode);
>   	if (ret < 0)
>   		return;
>   
> @@ -866,13 +869,13 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   	}
>   
>   	dw_mipi_dsi_init(dsi);
> -	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
> +	dw_mipi_dsi_dpi_config(dsi, mode);
>   	dw_mipi_dsi_packet_handler_config(dsi);
>   	dw_mipi_dsi_video_mode_config(dsi);
> -	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
> +	dw_mipi_dsi_video_packet_config(dsi, mode);
>   	dw_mipi_dsi_command_mode_config(dsi);
> -	dw_mipi_dsi_line_timer_config(dsi);
> -	dw_mipi_dsi_vertical_timing_config(dsi);
> +	dw_mipi_dsi_line_timer_config(dsi, mode);
> +	dw_mipi_dsi_vertical_timing_config(dsi, mode);
>   	dw_mipi_dsi_dphy_timing_config(dsi);
>   	dw_mipi_dsi_dphy_interface_config(dsi);
>   	dw_mipi_dsi_clear_err(dsi);
> @@ -880,7 +883,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   		dev_err(dsi->dev, "failed to prepare panel\n");
>   
>   	dw_mipi_dsi_phy_init(dsi);
> -	dw_mipi_dsi_wait_for_two_frames(dsi);
> +	dw_mipi_dsi_wait_for_two_frames(mode);
>   
>   	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
>   	drm_panel_enable(dsi->panel);


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WARNING: multiple messages have this Message-ID (diff)
From: zyw@rock-chips.com (Chris Zhong)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 03/26] drm/rockchip: dw-mipi-dsi: pass mode in where needed
Date: Sun, 22 Jan 2017 12:00:22 +0800	[thread overview]
Message-ID: <58842E56.2000405@rock-chips.com> (raw)
In-Reply-To: <20170121163128.22240-4-john@metanate.com>

Hi John

Reviewed-by: Chris Zhong <zyw@rock-chips.com>

On 01/22/2017 12:31 AM, John Keeping wrote:
> This shows that we only use the mode from the enable function and
> prepares us to remove the "mode" field and the mode_set hook in the next
> commit.
>
> Signed-off-by: John Keeping <john@metanate.com>
> ---
> New in v2
> ---
>   drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 41 ++++++++++++++++++----------------
>   1 file changed, 22 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index bbd992299f73..cdbd25087e83 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -330,11 +330,11 @@ static int max_mbps_to_testdin(unsigned int max_mbps)
>    * The controller should generate 2 frames before
>    * preparing the peripheral.
>    */
> -static void dw_mipi_dsi_wait_for_two_frames(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_wait_for_two_frames(struct drm_display_mode *mode)
>   {
>   	int refresh, two_frames;
>   
> -	refresh = drm_mode_vrefresh(dsi->mode);
> +	refresh = drm_mode_vrefresh(mode);
>   	two_frames = DIV_ROUND_UP(MSEC_PER_SEC, refresh) * 2;
>   	msleep(two_frames);
>   }
> @@ -459,7 +459,8 @@ static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
>   	return ret;
>   }
>   
> -static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
> +static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi,
> +				    struct drm_display_mode *mode)
>   {
>   	unsigned int i, pre;
>   	unsigned long mpclk, pllref, tmp;
> @@ -474,7 +475,7 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
>   		return bpp;
>   	}
>   
> -	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
> +	mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC);
>   	if (mpclk) {
>   		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
>   		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
> @@ -742,43 +743,44 @@ static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi)
>   
>   /* Get lane byte clock cycles. */
>   static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi,
> +					   struct drm_display_mode *mode,
>   					   u32 hcomponent)
>   {
>   	u32 frac, lbcc;
>   
>   	lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8;
>   
> -	frac = lbcc % dsi->mode->clock;
> -	lbcc = lbcc / dsi->mode->clock;
> +	frac = lbcc % mode->clock;
> +	lbcc = lbcc / mode->clock;
>   	if (frac)
>   		lbcc++;
>   
>   	return lbcc;
>   }
>   
> -static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi,
> +					  struct drm_display_mode *mode)
>   {
>   	u32 htotal, hsa, hbp, lbcc;
> -	struct drm_display_mode *mode = dsi->mode;
>   
>   	htotal = mode->htotal;
>   	hsa = mode->hsync_end - mode->hsync_start;
>   	hbp = mode->htotal - mode->hsync_end;
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, htotal);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal);
>   	dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc);
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hsa);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa);
>   	dsi_write(dsi, DSI_VID_HSA_TIME, lbcc);
>   
> -	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, hbp);
> +	lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp);
>   	dsi_write(dsi, DSI_VID_HBP_TIME, lbcc);
>   }
>   
> -static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi)
> +static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi,
> +					       struct drm_display_mode *mode)
>   {
>   	u32 vactive, vsa, vfp, vbp;
> -	struct drm_display_mode *mode = dsi->mode;
>   
>   	vactive = mode->vdisplay;
>   	vsa = mode->vsync_end - mode->vsync_start;
> @@ -852,11 +854,12 @@ static void dw_mipi_dsi_encoder_disable(struct drm_encoder *encoder)
>   static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   {
>   	struct dw_mipi_dsi *dsi = encoder_to_dsi(encoder);
> +	struct drm_display_mode *mode = dsi->mode;
>   	int mux = drm_of_encoder_active_endpoint_id(dsi->dev->of_node, encoder);
>   	u32 val;
>   	int ret;
>   
> -	ret = dw_mipi_dsi_get_lane_bps(dsi);
> +	ret = dw_mipi_dsi_get_lane_bps(dsi, mode);
>   	if (ret < 0)
>   		return;
>   
> @@ -866,13 +869,13 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   	}
>   
>   	dw_mipi_dsi_init(dsi);
> -	dw_mipi_dsi_dpi_config(dsi, dsi->mode);
> +	dw_mipi_dsi_dpi_config(dsi, mode);
>   	dw_mipi_dsi_packet_handler_config(dsi);
>   	dw_mipi_dsi_video_mode_config(dsi);
> -	dw_mipi_dsi_video_packet_config(dsi, dsi->mode);
> +	dw_mipi_dsi_video_packet_config(dsi, mode);
>   	dw_mipi_dsi_command_mode_config(dsi);
> -	dw_mipi_dsi_line_timer_config(dsi);
> -	dw_mipi_dsi_vertical_timing_config(dsi);
> +	dw_mipi_dsi_line_timer_config(dsi, mode);
> +	dw_mipi_dsi_vertical_timing_config(dsi, mode);
>   	dw_mipi_dsi_dphy_timing_config(dsi);
>   	dw_mipi_dsi_dphy_interface_config(dsi);
>   	dw_mipi_dsi_clear_err(dsi);
> @@ -880,7 +883,7 @@ static void dw_mipi_dsi_encoder_enable(struct drm_encoder *encoder)
>   		dev_err(dsi->dev, "failed to prepare panel\n");
>   
>   	dw_mipi_dsi_phy_init(dsi);
> -	dw_mipi_dsi_wait_for_two_frames(dsi);
> +	dw_mipi_dsi_wait_for_two_frames(mode);
>   
>   	dw_mipi_dsi_set_mode(dsi, DW_MIPI_DSI_VID_MODE);
>   	drm_panel_enable(dsi->panel);

  reply	other threads:[~2017-01-22  4:00 UTC|newest]

Thread overview: 143+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-21 16:31 [PATCH v2 00/26] drm/rockchip: MIPI fixes & improvements John Keeping
2017-01-21 16:31 ` John Keeping
2017-01-21 16:31 ` John Keeping
2017-01-21 16:31 ` [PATCH v2 01/26] drm/rockchip: dw-mipi-dsi: don't configure hardware in mode_set for MIPI John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  3:58   ` Chris Zhong
2017-01-22  3:58     ` Chris Zhong
2017-01-22  3:58     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 02/26] drm/rockchip: dw-mipi-dsi: rename commit hook to enable John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31 ` [PATCH v2 03/26] drm/rockchip: dw-mipi-dsi: pass mode in where needed John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  4:00   ` Chris Zhong [this message]
2017-01-22  4:00     ` Chris Zhong
2017-01-22  4:00     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 04/26] drm/rockchip: dw-mipi-dsi: remove mode_set hook John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  6:08   ` Chris Zhong
2017-01-22  6:08     ` Chris Zhong
2017-01-22  6:08     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 05/26] drm/rockchip: dw-mipi-dsi: fix command header writes John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31 ` [PATCH v2 06/26] drm/rockchip: dw-mipi-dsi: fix generic packet status check John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  6:24   ` Chris Zhong
2017-01-22  6:24     ` Chris Zhong
2017-01-22  6:24     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 07/26] drm/rockchip: dw-mipi-dsi: avoid out-of-bounds read on tx_buf John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  6:42   ` Chris Zhong
2017-01-22  6:42     ` Chris Zhong
2017-01-22  6:42     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 08/26] drm/rockchip: dw-mipi-dsi: include bad value in error message John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  6:44   ` Chris Zhong
2017-01-22  6:44     ` Chris Zhong
2017-01-22  6:44     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 09/26] drm/rockchip: dw-mipi-dsi: respect message flags John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  7:14   ` Chris Zhong
2017-01-22  7:14     ` Chris Zhong
2017-01-22  7:14     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 10/26] drm/rockchip: dw-mipi-dsi: only request HS clock when required John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  8:10   ` Chris Zhong
2017-01-22  8:10     ` Chris Zhong
2017-01-22  8:10     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 11/26] drm/rockchip: dw-mipi-dsi: don't assume buffer is aligned John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  8:16   ` Chris Zhong
2017-01-22  8:16     ` Chris Zhong
2017-01-22  8:16     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 12/26] drm/rockchip: dw-mipi-dsi: prepare panel after phy init John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  8:22   ` Chris Zhong
2017-01-22  8:22     ` Chris Zhong
2017-01-22  8:22     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 13/26] drm/rockchip: dw-mipi-dsi: allow commands in panel_disable John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  8:37   ` Chris Zhong
2017-01-22  8:37     ` Chris Zhong
2017-01-22  8:37     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 14/26] drm/rockchip: dw-mipi-dsi: fix escape clock rate John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  9:37   ` Chris Zhong
2017-01-22  9:37     ` Chris Zhong
2017-01-22  9:37     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 15/26] drm/rockchip: dw-mipi-dsi: ensure PHY is reset John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  9:37   ` Chris Zhong
2017-01-22  9:37     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 16/26] drm/rockchip: dw-mipi-dsi: configure bias and bandgap before enable John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31 ` [PATCH v2 17/26] drm/rockchip: dw-mipi-dsi: don't enable PHY PLL until it's configured John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22 10:07   ` Chris Zhong
2017-01-22 10:07     ` Chris Zhong
2017-01-22 10:07     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 18/26] drm/rockchip: dw-mipi-dsi: properly configure PHY timing John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  3:06   ` Chris Zhong
2017-01-22  3:06     ` Chris Zhong
2017-01-22  3:06     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 19/26] drm/rockchip: dw-mipi-dsi: improve PLL configuration John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-23  1:38   ` Chris Zhong
2017-01-23  1:38     ` Chris Zhong
2017-01-23  1:38     ` Chris Zhong
2017-01-23 12:49     ` John Keeping
2017-01-23 12:49       ` John Keeping
2017-01-23 12:49       ` John Keeping
2017-01-24  2:42       ` Chris Zhong
2017-01-24  2:42         ` Chris Zhong
2017-01-24  2:42         ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 20/26] drm/rockchip: dw-mipi-dsi: use specific poll helper John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-23  0:49   ` Chris Zhong
2017-01-23  0:49     ` Chris Zhong
2017-01-23  0:49     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 21/26] drm/rockchip: dw-mipi-dsi: use positive check for N{H,V}SYNC John Keeping
2017-01-21 16:31   ` [PATCH v2 21/26] drm/rockchip: dw-mipi-dsi: use positive check for N{H, V}SYNC John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31 ` [PATCH v2 22/26] drm/rockchip: vop: test for P{H,V}SYNC John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-23  7:12   ` Mark yao
2017-01-23  7:12     ` Mark yao
2017-01-21 16:31 ` [PATCH v2 23/26] drm/rockchip: dw-mipi-dsi: defer probe if panel is not loaded John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31 ` [PATCH v2 24/26] drm/rockchip: dw-mipi-dsi: support non-burst modes John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-23  6:11   ` Chris Zhong
2017-01-23  6:11     ` Chris Zhong
2017-01-23  6:11     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 25/26] drm/rockchip: dw-mipi-dsi: add reset control John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-23  6:12   ` Chris Zhong
2017-01-23  6:12     ` Chris Zhong
2017-01-21 16:31 ` [PATCH v2 26/26] drm/rockchip: dw-mipi-dsi: support read commands John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-21 16:31   ` John Keeping
2017-01-22  3:08   ` Chris Zhong
2017-01-22  3:08     ` Chris Zhong
2017-01-22  3:08     ` Chris Zhong

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