All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chen Feng <puck.chen@hisilicon.com>
To: Laura Abbott <labbott@redhat.com>,
	Will Deacon <will.deacon@arm.com>,
	John Stultz <john.stultz@linaro.org>,
	Zhuangluan Su <suzhuangluan@hisilicon.com>,
	Guodong Xu <guodong.xu@linaro.org>,
	Yiping Xu <xuyiping@hisilicon.com>, <saberlily.xia@hisilicon.com>
Cc: devel@driverdev.osuosl.org, "Jon Medhurst" <tixy@linaro.org>,
	"Android Kernel Team" <kernel-team@android.com>,
	linux-kernel@vger.kernel.org, "Arnd Bergmann" <arnd@arndb.de>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Rohit kumar" <rohit.kr@samsung.com>,
	"Arve Hjønnevåg" <arve@android.com>,
	"Russell King" <linux@armlinux.org.uk>,
	linaro-mm-sig@lists.linaro.org,
	"Riley Andrews" <riandrews@android.com>,
	"John Stultz" <john.stultz@linaro.org>,
	"Eun Taik Lee" <eun.taik.lee@samsung.com>,
	"Catalin Marinas" <catalin.marinas@arm.com>,
	"Liviu Dudau" <Liviu.Dudau@arm.com>,
	"Jeremy Gebben" <jgebben@codeaurora.org>,
	linux-arm-kernel@lists.infradead.org,
	"Dan Zhao" <dan.zhao@hisilicon.com>
Subject: Re: [Linaro-mm-sig] [RFCv3][PATCH 3/5] arm64: Implement ARCH_HAS_FORCE_CACHE
Date: Tue, 21 Feb 2017 14:05:44 +0800	[thread overview]
Message-ID: <58ABD8B8.6050204@hisilicon.com> (raw)
In-Reply-To: <b4a92c52-cbe8-9009-43bf-4c7b49e31916@redhat.com>

Hi Laura,

When we enable kernel v4.4 or newer version on our platform, we meet the issue
of flushing cache without reference device. It seems that this patch set is
a solution. I'm curious the progress of the discussion. Do you have any plan
to fix it in v4.4 and newer kernel verison?

On 2016/9/14 2:41, Laura Abbott wrote:
> On 09/13/2016 08:14 AM, Will Deacon wrote:
>> On Tue, Sep 13, 2016 at 08:02:20AM -0700, Laura Abbott wrote:
>>> On 09/13/2016 02:19 AM, Will Deacon wrote:
>>>> On Mon, Sep 12, 2016 at 02:32:56PM -0700, Laura Abbott wrote:
>>>>>
>>>>> arm64 may need to guarantee the caches are synced. Implement versions of
>>>>> the kernel_force_cache API to allow this.
>>>>>
>>>>> Signed-off-by: Laura Abbott <labbott@redhat.com>
>>>>> ---
>>>>> v3: Switch to calling cache operations directly instead of relying on
>>>>> DMA mapping.
>>>>> ---
>>>>> arch/arm64/include/asm/cacheflush.h |  8 ++++++++
>>>>> arch/arm64/mm/cache.S               | 24 ++++++++++++++++++++----
>>>>> arch/arm64/mm/flush.c               | 11 +++++++++++
>>>>> 3 files changed, 39 insertions(+), 4 deletions(-)
>>>>
>>>> I'm really hesitant to expose these cache routines as an API solely to
>>>> support a driver sitting in staging/. I appreciate that there's a chicken
>>>> and egg problem here, but we *really* don't want people using these routines
>>>> in preference to the DMA API, and I fear that we'll simply grow a bunch
>>>> more users of these things if we promote it as an API like you're proposing.
>>>>
>>>> Can the code not be contained under staging/, as part of ion?
>>>>
>>>
>>> I proposed that in V1 and it was suggested I make it a proper API
>>>
>>> http://www.mail-archive.com/driverdev-devel@linuxdriverproject.org/msg47654.html
>>> http://www.mail-archive.com/driverdev-devel@linuxdriverproject.org/msg47672.html
>>
>> :/ then I guess we're in disagreement. If ion really needs this stuff
>> (which I don't fully grok), perhaps we should be exposing something at
>> a higher level from the architecture, so it really can't be used for
>> anything other than ion.
> 
> I talked/complained about this at a past plumbers. The gist is that Ion
> ends up acting as a fake DMA layer for clients. It doesn't match nicely
> because clients can allocate both coherent and non-coherent memory.
> Trying to use dma_map doesn't work because a) a device for coherency isn't
> known at allocation time b) it kills performance. Part of the motivation
> for taking this approach is to avoid the need to rework the existing
> Android userspace and keep the existing behavior, as terrible as it
> is. Having Ion out of staging and not actually usable isn't helpful.
> 
> I'll give this all some more thought and hopefully have one or two more
> proposals before Connect/Plumbers.
> 
>>
>> Will
>>
> 
> Thanks,
> Laura
> _______________________________________________
> Linaro-mm-sig mailing list
> Linaro-mm-sig@lists.linaro.org
> https://lists.linaro.org/mailman/listinfo/linaro-mm-sig

WARNING: multiple messages have this Message-ID (diff)
From: puck.chen@hisilicon.com (Chen Feng)
To: linux-arm-kernel@lists.infradead.org
Subject: [Linaro-mm-sig] [RFCv3][PATCH 3/5] arm64: Implement ARCH_HAS_FORCE_CACHE
Date: Tue, 21 Feb 2017 14:05:44 +0800	[thread overview]
Message-ID: <58ABD8B8.6050204@hisilicon.com> (raw)
In-Reply-To: <b4a92c52-cbe8-9009-43bf-4c7b49e31916@redhat.com>

Hi Laura,

When we enable kernel v4.4 or newer version on our platform, we meet the issue
of flushing cache without reference device. It seems that this patch set is
a solution. I'm curious the progress of the discussion. Do you have any plan
to fix it in v4.4 and newer kernel verison?

On 2016/9/14 2:41, Laura Abbott wrote:
> On 09/13/2016 08:14 AM, Will Deacon wrote:
>> On Tue, Sep 13, 2016 at 08:02:20AM -0700, Laura Abbott wrote:
>>> On 09/13/2016 02:19 AM, Will Deacon wrote:
>>>> On Mon, Sep 12, 2016 at 02:32:56PM -0700, Laura Abbott wrote:
>>>>>
>>>>> arm64 may need to guarantee the caches are synced. Implement versions of
>>>>> the kernel_force_cache API to allow this.
>>>>>
>>>>> Signed-off-by: Laura Abbott <labbott@redhat.com>
>>>>> ---
>>>>> v3: Switch to calling cache operations directly instead of relying on
>>>>> DMA mapping.
>>>>> ---
>>>>> arch/arm64/include/asm/cacheflush.h |  8 ++++++++
>>>>> arch/arm64/mm/cache.S               | 24 ++++++++++++++++++++----
>>>>> arch/arm64/mm/flush.c               | 11 +++++++++++
>>>>> 3 files changed, 39 insertions(+), 4 deletions(-)
>>>>
>>>> I'm really hesitant to expose these cache routines as an API solely to
>>>> support a driver sitting in staging/. I appreciate that there's a chicken
>>>> and egg problem here, but we *really* don't want people using these routines
>>>> in preference to the DMA API, and I fear that we'll simply grow a bunch
>>>> more users of these things if we promote it as an API like you're proposing.
>>>>
>>>> Can the code not be contained under staging/, as part of ion?
>>>>
>>>
>>> I proposed that in V1 and it was suggested I make it a proper API
>>>
>>> http://www.mail-archive.com/driverdev-devel at linuxdriverproject.org/msg47654.html
>>> http://www.mail-archive.com/driverdev-devel at linuxdriverproject.org/msg47672.html
>>
>> :/ then I guess we're in disagreement. If ion really needs this stuff
>> (which I don't fully grok), perhaps we should be exposing something at
>> a higher level from the architecture, so it really can't be used for
>> anything other than ion.
> 
> I talked/complained about this at a past plumbers. The gist is that Ion
> ends up acting as a fake DMA layer for clients. It doesn't match nicely
> because clients can allocate both coherent and non-coherent memory.
> Trying to use dma_map doesn't work because a) a device for coherency isn't
> known at allocation time b) it kills performance. Part of the motivation
> for taking this approach is to avoid the need to rework the existing
> Android userspace and keep the existing behavior, as terrible as it
> is. Having Ion out of staging and not actually usable isn't helpful.
> 
> I'll give this all some more thought and hopefully have one or two more
> proposals before Connect/Plumbers.
> 
>>
>> Will
>>
> 
> Thanks,
> Laura
> _______________________________________________
> Linaro-mm-sig mailing list
> Linaro-mm-sig at lists.linaro.org
> https://lists.linaro.org/mailman/listinfo/linaro-mm-sig

  reply	other threads:[~2017-02-21  6:15 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-12 21:32 [RFCv3][PATCH 0/5] Cleanup Ion mapping/caching Laura Abbott
2016-09-12 21:32 ` Laura Abbott
2016-09-12 21:32 ` [RFCv3][PATCH 1/5] Documentation: Introduce kernel_force_cache_* APIs Laura Abbott
2016-09-12 21:32   ` Laura Abbott
2016-09-12 21:32 ` [RFCv3][PATCH 2/5] arm: Impelment ARCH_HAS_FORCE_CACHE Laura Abbott
2016-09-12 21:32   ` Laura Abbott
2016-09-12 21:32 ` [RFCv3][PATCH 3/5] arm64: Implement ARCH_HAS_FORCE_CACHE Laura Abbott
2016-09-12 21:32   ` Laura Abbott
2016-09-13  9:19   ` Will Deacon
2016-09-13  9:19     ` Will Deacon
2016-09-13 15:02     ` Laura Abbott
2016-09-13 15:02       ` Laura Abbott
2016-09-13 15:14       ` Will Deacon
2016-09-13 15:14         ` Will Deacon
2016-09-13 18:41         ` Laura Abbott
2016-09-13 18:41           ` Laura Abbott
2017-02-21  6:05           ` Chen Feng [this message]
2017-02-21  6:05             ` [Linaro-mm-sig] " Chen Feng
2017-02-21 19:29             ` Laura Abbott
2017-02-21 19:29               ` Laura Abbott
2017-02-23  1:01               ` Chen Feng
2017-02-23  1:01                 ` Chen Feng
2017-02-23 16:03                 ` Laura Abbott
2017-02-23 16:03                   ` Laura Abbott
2016-09-12 21:32 ` [RFCv3][PATCH 4/5] staging: android: ion: Convert to the kernel_force_cache APIs Laura Abbott
2016-09-12 21:32   ` Laura Abbott
2016-09-12 21:32 ` [RFCv3][PATCH 5/5] staging: ion: Add support for syncing with DMA_BUF_IOCTL_SYNC Laura Abbott
2016-09-12 21:32   ` Laura Abbott

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=58ABD8B8.6050204@hisilicon.com \
    --to=puck.chen@hisilicon.com \
    --cc=Liviu.Dudau@arm.com \
    --cc=arnd@arndb.de \
    --cc=arve@android.com \
    --cc=catalin.marinas@arm.com \
    --cc=dan.zhao@hisilicon.com \
    --cc=devel@driverdev.osuosl.org \
    --cc=eun.taik.lee@samsung.com \
    --cc=gregkh@linuxfoundation.org \
    --cc=guodong.xu@linaro.org \
    --cc=jgebben@codeaurora.org \
    --cc=john.stultz@linaro.org \
    --cc=kernel-team@android.com \
    --cc=labbott@redhat.com \
    --cc=linaro-mm-sig@lists.linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=riandrews@android.com \
    --cc=rohit.kr@samsung.com \
    --cc=saberlily.xia@hisilicon.com \
    --cc=suzhuangluan@hisilicon.com \
    --cc=tixy@linaro.org \
    --cc=will.deacon@arm.com \
    --cc=xuyiping@hisilicon.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.