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From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH v2] drm/i915/dmabuf: drop the flush on discrete
Date: Fri, 29 Oct 2021 16:32:21 +0200	[thread overview]
Message-ID: <59e6d31b-1269-1c7b-1a1d-b5baebae1d1f@linux.intel.com> (raw)
In-Reply-To: <20211029122137.3484203-1-matthew.auld@intel.com>


On 10/29/21 14:21, Matthew Auld wrote:
> We were overzealous here; even though discrete is non-LLC, it should
> still be always coherent.
>
> v2(Thomas & Daniel)
>    - Be extra cautious and limit to DG1
>    - Add some more commentary
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Daniel Vetter <daniel@ffwll.ch>

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


> ---
>   drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 15 +++++++++++++--
>   1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> index a45d0ec2c5b6..a2b485a1be8c 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> @@ -250,8 +250,19 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
>   	if (IS_ERR(pages))
>   		return PTR_ERR(pages);
>   
> -	/* XXX: consider doing a vmap flush or something */
> -	if (!HAS_LLC(i915) || i915_gem_object_can_bypass_llc(obj))
> +	/*
> +	 * DG1 is special here since it still snoops transactions even with
> +	 * CACHE_NONE. This is not the case with other HAS_SNOOP platforms. We
> +	 * might need to revisit this as we add new discrete platforms.
> +	 *
> +	 * XXX: Consider doing a vmap flush or something, where possible.
> +	 * Currently we just do a heavy handed wbinvd_on_all_cpus() here since
> +	 * the underlying sg_table might not even point to struct pages, so we
> +	 * can't just call drm_clflush_sg or similar, like we do elsewhere in
> +	 * the driver.
> +	 */
> +	if (i915_gem_object_can_bypass_llc(obj) ||
> +	    (!HAS_LLC(i915) && !IS_DG1(i915)))
>   		wbinvd_on_all_cpus();
>   
>   	sg_page_sizes = i915_sg_dma_sizes(pages->sgl);

WARNING: multiple messages have this Message-ID (diff)
From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/dmabuf: drop the flush on discrete
Date: Fri, 29 Oct 2021 16:32:21 +0200	[thread overview]
Message-ID: <59e6d31b-1269-1c7b-1a1d-b5baebae1d1f@linux.intel.com> (raw)
In-Reply-To: <20211029122137.3484203-1-matthew.auld@intel.com>


On 10/29/21 14:21, Matthew Auld wrote:
> We were overzealous here; even though discrete is non-LLC, it should
> still be always coherent.
>
> v2(Thomas & Daniel)
>    - Be extra cautious and limit to DG1
>    - Add some more commentary
>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Daniel Vetter <daniel@ffwll.ch>

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


> ---
>   drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 15 +++++++++++++--
>   1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> index a45d0ec2c5b6..a2b485a1be8c 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
> @@ -250,8 +250,19 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
>   	if (IS_ERR(pages))
>   		return PTR_ERR(pages);
>   
> -	/* XXX: consider doing a vmap flush or something */
> -	if (!HAS_LLC(i915) || i915_gem_object_can_bypass_llc(obj))
> +	/*
> +	 * DG1 is special here since it still snoops transactions even with
> +	 * CACHE_NONE. This is not the case with other HAS_SNOOP platforms. We
> +	 * might need to revisit this as we add new discrete platforms.
> +	 *
> +	 * XXX: Consider doing a vmap flush or something, where possible.
> +	 * Currently we just do a heavy handed wbinvd_on_all_cpus() here since
> +	 * the underlying sg_table might not even point to struct pages, so we
> +	 * can't just call drm_clflush_sg or similar, like we do elsewhere in
> +	 * the driver.
> +	 */
> +	if (i915_gem_object_can_bypass_llc(obj) ||
> +	    (!HAS_LLC(i915) && !IS_DG1(i915)))
>   		wbinvd_on_all_cpus();
>   
>   	sg_page_sizes = i915_sg_dma_sizes(pages->sgl);

  parent reply	other threads:[~2021-10-29 14:32 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-29 12:21 [PATCH v2] drm/i915/dmabuf: drop the flush on discrete Matthew Auld
2021-10-29 12:21 ` [Intel-gfx] " Matthew Auld
2021-10-29 13:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-10-29 14:32 ` Thomas Hellström [this message]
2021-10-29 14:32   ` [Intel-gfx] [PATCH v2] " Thomas Hellström
2021-10-29 22:50 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork

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