All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH] drm/amd/amdgpu: fix BANK_SELECT on Vega10
@ 2017-08-24  7:07 Roger He
       [not found] ` <1503558440-15580-1-git-send-email-Hongbo.He-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Roger He @ 2017-08-24  7:07 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Roger He, Christian.Koenig-5C7GfCeVMHo

BANK_SELECT should always be FRAGMENT_SIZE + 3 due to 8-entry (2^3)
per cache line in L2 TLB for Vega10.

Change-Id: I8cfcff197e2c571c1a547aaed959e492b4a6fe0e
Signed-off-by: Roger He <Hongbo.He@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 3 +--
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index 4f2788b..a7351ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -143,9 +143,8 @@ static void gfxhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
 	WREG32_SOC15(GC, 0, mmVM_L2_CNTL2, tmp);
 
-	field = adev->vm_manager.fragment_size;
 	tmp = mmVM_L2_CNTL3_DEFAULT;
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
+	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
 	WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, tmp);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 4395a4f..2a6fa73 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -157,9 +157,8 @@ static void mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
 	WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp);
 
-	field = adev->vm_manager.fragment_size;
 	tmp = mmVM_L2_CNTL3_DEFAULT;
-	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
+	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
 	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
 	WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, tmp);
 
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amd/amdgpu: fix BANK_SELECT on Vega10
       [not found] ` <1503558440-15580-1-git-send-email-Hongbo.He-5C7GfCeVMHo@public.gmane.org>
@ 2017-08-24  8:19   ` Christian König
       [not found]     ` <59f5a0f3-9b4c-4a30-1a17-202a7e74fa1d-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Christian König @ 2017-08-24  8:19 UTC (permalink / raw)
  To: Roger He, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Christian.Koenig-5C7GfCeVMHo

Am 24.08.2017 um 09:07 schrieb Roger He:
> BANK_SELECT should always be FRAGMENT_SIZE + 3 due to 8-entry (2^3)
> per cache line in L2 TLB for Vega10.
>
> Change-Id: I8cfcff197e2c571c1a547aaed959e492b4a6fe0e
> Signed-off-by: Roger He <Hongbo.He@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 3 +--
>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 3 +--
>   2 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index 4f2788b..a7351ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -143,9 +143,8 @@ static void gfxhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
>   	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
>   	WREG32_SOC15(GC, 0, mmVM_L2_CNTL2, tmp);
>   
> -	field = adev->vm_manager.fragment_size;
>   	tmp = mmVM_L2_CNTL3_DEFAULT;
> -	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
> +	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
>   	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
>   	WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, tmp);
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index 4395a4f..2a6fa73 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -157,9 +157,8 @@ static void mmhub_v1_0_init_cache_regs(struct amdgpu_device *adev)
>   	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
>   	WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp);
>   
> -	field = adev->vm_manager.fragment_size;
>   	tmp = mmVM_L2_CNTL3_DEFAULT;
> -	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
> +	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
>   	tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
>   	WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, tmp);
>   


_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH] drm/amd/amdgpu: fix BANK_SELECT on Vega10
       [not found]     ` <59f5a0f3-9b4c-4a30-1a17-202a7e74fa1d-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-08-25  7:32       ` Christian König
       [not found]         ` <0ec37f92-7ab8-4c5b-2fb2-d676de426904-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
  0 siblings, 1 reply; 4+ messages in thread
From: Christian König @ 2017-08-25  7:32 UTC (permalink / raw)
  To: Roger He, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Christian.Koenig-5C7GfCeVMHo

Hi Roger,

there are a few warnings introduced by this commit:
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c: In function 
> ‘gfxhub_v1_0_init_cache_regs’:
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:127:16: warning: unused 
> variable ‘field’ [-Wunused-variable]
>   uint32_t tmp, field;
>                 ^
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c: In function 
> ‘mmhub_v1_0_init_cache_regs’:
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c:141:16: warning: unused 
> variable ‘field’ [-Wunused-variable]
>   uint32_t tmp, field;
>                 ^

Please provide a fix.

Thanks,
Christian.

Am 24.08.2017 um 10:19 schrieb Christian König:
> Am 24.08.2017 um 09:07 schrieb Roger He:
>> BANK_SELECT should always be FRAGMENT_SIZE + 3 due to 8-entry (2^3)
>> per cache line in L2 TLB for Vega10.
>>
>> Change-Id: I8cfcff197e2c571c1a547aaed959e492b4a6fe0e
>> Signed-off-by: Roger He <Hongbo.He@amd.com>
>
> Reviewed-by: Christian König <christian.koenig@amd.com>
>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 3 +--
>>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 3 +--
>>   2 files changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c 
>> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> index 4f2788b..a7351ba 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> @@ -143,9 +143,8 @@ static void gfxhub_v1_0_init_cache_regs(struct 
>> amdgpu_device *adev)
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
>>       WREG32_SOC15(GC, 0, mmVM_L2_CNTL2, tmp);
>>   -    field = adev->vm_manager.fragment_size;
>>       tmp = mmVM_L2_CNTL3_DEFAULT;
>> -    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
>> +    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, 
>> L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
>>       WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, tmp);
>>   diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
>> b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
>> index 4395a4f..2a6fa73 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
>> @@ -157,9 +157,8 @@ static void mmhub_v1_0_init_cache_regs(struct 
>> amdgpu_device *adev)
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
>>       WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp);
>>   -    field = adev->vm_manager.fragment_size;
>>       tmp = mmVM_L2_CNTL3_DEFAULT;
>> -    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
>> +    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, 
>> L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
>>       WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, tmp);
>
>

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
* RE: [PATCH] drm/amd/amdgpu: fix BANK_SELECT on Vega10
       [not found]         ` <0ec37f92-7ab8-4c5b-2fb2-d676de426904-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
@ 2017-08-25  9:20           ` He, Roger
  0 siblings, 0 replies; 4+ messages in thread
From: He, Roger @ 2017-08-25  9:20 UTC (permalink / raw)
  To: Christian König, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: Koenig, Christian

Ok. 

Thanks
Roger(Hongbo.He)
-----Original Message-----
From: Christian König [mailto:deathsimple@vodafone.de] 
Sent: Friday, August 25, 2017 3:33 PM
To: He, Roger <Hongbo.He@amd.com>; amd-gfx@lists.freedesktop.org
Cc: Koenig, Christian <Christian.Koenig@amd.com>
Subject: Re: [PATCH] drm/amd/amdgpu: fix BANK_SELECT on Vega10

Hi Roger,

there are a few warnings introduced by this commit:
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c: In function
> ‘gfxhub_v1_0_init_cache_regs’:
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:127:16: warning: unused 
> variable ‘field’ [-Wunused-variable]
>   uint32_t tmp, field;
>                 ^
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c: In function
> ‘mmhub_v1_0_init_cache_regs’:
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c:141:16: warning: unused 
> variable ‘field’ [-Wunused-variable]
>   uint32_t tmp, field;
>                 ^

Please provide a fix.

Thanks,
Christian.

Am 24.08.2017 um 10:19 schrieb Christian König:
> Am 24.08.2017 um 09:07 schrieb Roger He:
>> BANK_SELECT should always be FRAGMENT_SIZE + 3 due to 8-entry (2^3) 
>> per cache line in L2 TLB for Vega10.
>>
>> Change-Id: I8cfcff197e2c571c1a547aaed959e492b4a6fe0e
>> Signed-off-by: Roger He <Hongbo.He@amd.com>
>
> Reviewed-by: Christian König <christian.koenig@amd.com>
>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 3 +--
>>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 3 +--
>>   2 files changed, 2 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> index 4f2788b..a7351ba 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
>> @@ -143,9 +143,8 @@ static void gfxhub_v1_0_init_cache_regs(struct
>> amdgpu_device *adev)
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
>>       WREG32_SOC15(GC, 0, mmVM_L2_CNTL2, tmp);
>>   -    field = adev->vm_manager.fragment_size;
>>       tmp = mmVM_L2_CNTL3_DEFAULT;
>> -    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
>> +    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, 
>> L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
>>       WREG32_SOC15(GC, 0, mmVM_L2_CNTL3, tmp);
>>   diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
>> b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
>> index 4395a4f..2a6fa73 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
>> @@ -157,9 +157,8 @@ static void mmhub_v1_0_init_cache_regs(struct 
>> amdgpu_device *adev)
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1);
>>       WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL2, tmp);
>>   -    field = adev->vm_manager.fragment_size;
>>       tmp = mmVM_L2_CNTL3_DEFAULT;
>> -    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, field);
>> +    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, BANK_SELECT, 9);
>>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, 
>> L2_CACHE_BIGK_FRAGMENT_SIZE, 6);
>>       WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL3, tmp);
>
>

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-08-25  9:20 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2017-08-24  7:07 [PATCH] drm/amd/amdgpu: fix BANK_SELECT on Vega10 Roger He
     [not found] ` <1503558440-15580-1-git-send-email-Hongbo.He-5C7GfCeVMHo@public.gmane.org>
2017-08-24  8:19   ` Christian König
     [not found]     ` <59f5a0f3-9b4c-4a30-1a17-202a7e74fa1d-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-08-25  7:32       ` Christian König
     [not found]         ` <0ec37f92-7ab8-4c5b-2fb2-d676de426904-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>
2017-08-25  9:20           ` He, Roger

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.