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From: "Jan Beulich" <JBeulich@suse.com>
To: Juergen Gross <jgross@suse.com>
Cc: andrew.cooper3@citrix.com, Dario Faggioli <dfaggioli@suse.com>,
	wei.liu2@citrix.com, xen-devel@lists.xenproject.org
Subject: Re: [PATCH v2 5/6] xen/x86: use flag byte for decision whether xen_cr3 is valid
Date: Thu, 08 Mar 2018 07:24:46 -0700	[thread overview]
Message-ID: <5AA155BE02000078001AFD89@prv-mh.provo.novell.com> (raw)
In-Reply-To: <20180302081403.16953-6-jgross@suse.com>

>>> On 02.03.18 at 09:14, <jgross@suse.com> wrote:
> This reduces the number of branches in interrupt handling and results
> in better performance (e.g. parallel make of the Xen hypervisor on my
> system was using about 3% less system time).

3% seems an awful lot for a single conditional branch on each of the
three affected entry paths.

> --- a/xen/arch/x86/domain.c
> +++ b/xen/arch/x86/domain.c
> @@ -1698,6 +1698,7 @@ void context_switch(struct vcpu *prev, struct vcpu *next)
>      ASSERT(local_irq_is_enabled());
>  
>      get_cpu_info()->xen_cr3 = 0;
> +    get_cpu_info()->use_xen_cr3 = false;

Don't you need this to be the other way around _and_ a barrier() in
between? As the context above shows, interrupts are enabled here
(and NMI/#MC can occur at any time anyway), so with the order
above it seems to me as if restore_all_xen might write zero into CR3.
While the ordering appears to be right elsewhere, the barrier() part
may apply to changes further down as well.

> @@ -523,18 +516,17 @@ ENTRY(common_interrupt)
>  
>  .Lintr_cr3_start:
>          mov   STACK_CPUINFO_FIELD(xen_cr3)(%r14), %rcx
> +        mov   STACK_CPUINFO_FIELD(use_xen_cr3)(%r14), %bl
>          mov   %rcx, %r15
> -        neg   %rcx
> +        test  %rcx, %rcx
>          jz    .Lintr_cr3_okay
> -        jns   .Lintr_cr3_load
> -        mov   %rcx, STACK_CPUINFO_FIELD(xen_cr3)(%r14)
> -        neg   %rcx
> -.Lintr_cr3_load:
> +        movb  $0, STACK_CPUINFO_FIELD(use_xen_cr3)(%r14)
>          mov   %rcx, %cr3
>          xor   %ecx, %ecx
>          mov   %rcx, STACK_CPUINFO_FIELD(xen_cr3)(%r14)
>          testb $3, UREGS_cs(%rsp)
>          cmovnz %rcx, %r15
> +        cmovnz %cx, %bx

32-bit operation please.

> @@ -831,6 +820,7 @@ handle_ist_exception:
>           * and copy the context to stack bottom.
>           */
>          xor   %r15, %r15
> +        xor   %bl, %bl

Same here.

> @@ -68,6 +65,12 @@ struct cpu_info {
>       */
>      bool         root_pgt_changed;
>  
> +    /*
> +     * use_xen_cr3 is set in case the value of xen_cr3 is to be written into
> +     * CR3 when entering the hypervisor.
> +     */
> +    bool         use_xen_cr3;

When entering the hypervisor? Afaics the flag is evaluated only to
trigger the unlikely code in restore_all_xen, which is an exit path (as
the comment portion you remove from xen_cr3 also says).

Jan


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  reply	other threads:[~2018-03-08 14:24 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-02  8:13 [PATCH v2 0/6] xen/x86: various XPTI speedups Juergen Gross
2018-03-02  8:13 ` [PATCH v2 1/6] x86/xpti: avoid copying L4 page table contents when possible Juergen Gross
2018-03-05 16:43   ` Jan Beulich
2018-03-08 11:59     ` Juergen Gross
2018-03-08 12:47       ` Jan Beulich
     [not found]       ` <5AA13EEA02000078001AFCAF@suse.com>
2018-03-08 13:03         ` Juergen Gross
     [not found]   ` <5A9D81DC02000078001AEB68@suse.com>
2018-03-06  7:01     ` Juergen Gross
2018-03-06  7:58       ` Jan Beulich
     [not found]       ` <5A9E583002000078001AED3A@suse.com>
2018-03-06  8:06         ` Juergen Gross
2018-03-06  8:17           ` Jan Beulich
2018-03-02  8:13 ` [PATCH v2 2/6] x86/xpti: don't flush TLB twice when switching to 64-bit pv context Juergen Gross
2018-03-05 16:49   ` Jan Beulich
     [not found]   ` <5A9D831F02000078001AEB7E@suse.com>
2018-03-06  7:02     ` Juergen Gross
2018-03-02  8:14 ` [PATCH v2 3/6] xen/x86: support per-domain flag for xpti Juergen Gross
2018-03-08 10:17   ` Jan Beulich
     [not found]   ` <5AA11BDE02000078001AFB92@suse.com>
2018-03-08 11:30     ` Juergen Gross
2018-03-08 12:49       ` Jan Beulich
     [not found]       ` <5AA13F7D02000078001AFCB3@suse.com>
2018-03-08 13:13         ` Juergen Gross
2018-03-02  8:14 ` [PATCH v2 4/6] xen/x86: disable global pages for domains with XPTI active Juergen Gross
2018-03-02 11:03   ` Wei Liu
2018-03-02 11:30     ` Juergen Gross
2018-03-08 13:38   ` Jan Beulich
2018-03-09  3:01     ` Tian, Kevin
2018-03-09  5:23     ` Tian, Kevin
2018-03-09  8:34       ` Jan Beulich
     [not found]       ` <5AA2551002000078001B0116@suse.com>
2018-03-09  8:42         ` Juergen Gross
     [not found]   ` <5AA14AF302000078001AFD30@suse.com>
2018-03-08 14:05     ` Juergen Gross
2018-03-08 14:33       ` Jan Beulich
     [not found]       ` <5AA157E002000078001AFDA4@suse.com>
2018-03-08 14:39         ` Juergen Gross
2018-03-08 15:06   ` Jan Beulich
2018-03-09 14:40     ` Juergen Gross
2018-03-09 15:30       ` Jan Beulich
2018-03-02  8:14 ` [PATCH v2 5/6] xen/x86: use flag byte for decision whether xen_cr3 is valid Juergen Gross
2018-03-08 14:24   ` Jan Beulich [this message]
     [not found]   ` <5AA155BE02000078001AFD89@suse.com>
2018-03-08 14:28     ` Juergen Gross
2018-03-02  8:14 ` [PATCH v2 6/6] xen/x86: use PCID feature for XPTI Juergen Gross
2018-03-08 15:27   ` Jan Beulich
2018-03-05 16:20 ` [PATCH v2 0/6] xen/x86: various XPTI speedups Dario Faggioli

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