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* [PATCH 07/11] x86/xen: Add support for Hygon's Dhyana Family 18h processor
@ 2018-06-09 13:23 ` Pu Wen
  0 siblings, 0 replies; 5+ messages in thread
From: Pu Wen @ 2018-06-09 13:23 UTC (permalink / raw)
  To: boris.ostrovsky, jgross, tglx, mingo, hpa, x86, zhangpanyong
  Cc: thomas.lendacky, peterz, tony.luck, bp, pbonzini, rkrcmar, rjw,
	lenb, viresh.kumar, mchehab, trenn, shuah, linux-kernel,
	linux-arch, linux-x86_64, linux-pci, linux-acpi, linux-edac,
	linux-pm, kvm, xen-devel, Pu Wen

This patch enables the Xen Hypervisor support to Hygon
Family 18h CPU:
- Add Hygon support in Xen PMU arch init codes.
- Add Hygon support in PMU MSR read/write codes.
- Add Hygon support in read PMC codes.

Signed-off-by: Pu Wen <puwen@hygon.cn>
---
 arch/x86/xen/pmu.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 7d00d4a..e2bee70 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -68,7 +68,8 @@ static __read_mostly int intel_num_arch_counters, intel_num_fixed_counters;
 
 static void xen_pmu_arch_init(void)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 
 		switch (boot_cpu_data.x86) {
 		case 0x15:
@@ -285,7 +286,8 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
 
 bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		if (is_amd_pmu_msr(msr)) {
 			if (!xen_amd_pmu_emulate(msr, val, 1))
 				*val = native_read_msr_safe(msr, err);
@@ -308,7 +310,8 @@ bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
 {
 	uint64_t val = ((uint64_t)high << 32) | low;
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		if (is_amd_pmu_msr(msr)) {
 			if (!xen_amd_pmu_emulate(msr, &val, 0))
 				*err = native_write_msr_safe(msr, low, high);
@@ -379,7 +382,8 @@ static unsigned long long xen_intel_read_pmc(int counter)
 
 unsigned long long xen_read_pmc(int counter)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
 		return xen_amd_read_pmc(counter);
 	else
 		return xen_intel_read_pmc(counter);
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [07/11] x86/xen: Add support for Hygon's Dhyana Family 18h processor
@ 2018-06-09 13:23 ` Pu Wen
  0 siblings, 0 replies; 5+ messages in thread
From: Pu Wen @ 2018-06-09 13:23 UTC (permalink / raw)
  To: boris.ostrovsky, jgross, tglx, mingo, hpa, x86, zhangpanyong
  Cc: thomas.lendacky, peterz, tony.luck, bp, pbonzini, rkrcmar, rjw,
	lenb, viresh.kumar, mchehab, trenn, shuah, linux-kernel,
	linux-arch, linux-x86_64, linux-pci, linux-acpi, linux-edac,
	linux-pm, kvm, xen-devel, Pu Wen

This patch enables the Xen Hypervisor support to Hygon
Family 18h CPU:
- Add Hygon support in Xen PMU arch init codes.
- Add Hygon support in PMU MSR read/write codes.
- Add Hygon support in read PMC codes.

Signed-off-by: Pu Wen <puwen@hygon.cn>
---
 arch/x86/xen/pmu.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 7d00d4a..e2bee70 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -68,7 +68,8 @@ static __read_mostly int intel_num_arch_counters, intel_num_fixed_counters;
 
 static void xen_pmu_arch_init(void)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 
 		switch (boot_cpu_data.x86) {
 		case 0x15:
@@ -285,7 +286,8 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
 
 bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		if (is_amd_pmu_msr(msr)) {
 			if (!xen_amd_pmu_emulate(msr, val, 1))
 				*val = native_read_msr_safe(msr, err);
@@ -308,7 +310,8 @@ bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
 {
 	uint64_t val = ((uint64_t)high << 32) | low;
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		if (is_amd_pmu_msr(msr)) {
 			if (!xen_amd_pmu_emulate(msr, &val, 0))
 				*err = native_write_msr_safe(msr, low, high);
@@ -379,7 +382,8 @@ static unsigned long long xen_intel_read_pmc(int counter)
 
 unsigned long long xen_read_pmc(int counter)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
 		return xen_amd_read_pmc(counter);
 	else
 		return xen_intel_read_pmc(counter);

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH 07/11] x86/xen: Add support for Hygon's Dhyana Family 18h processor
  2018-06-09 13:23 ` [07/11] " Pu Wen
  (?)
@ 2018-06-11  6:38 ` Jan Beulich
  2018-06-12 12:29   ` puwen
  -1 siblings, 1 reply; 5+ messages in thread
From: Jan Beulich @ 2018-06-11  6:38 UTC (permalink / raw)
  To: Pu Wen; +Cc: xen-devel

(heavily shrinking the Cc list)

>>> On 09.06.18 at 15:23, <puwen@hygon.cn> wrote:
> This patch enables the Xen Hypervisor support to Hygon
> Family 18h CPU:
> - Add Hygon support in Xen PMU arch init codes.
> - Add Hygon support in PMU MSR read/write codes.
> - Add Hygon support in read PMC codes.
> 
> Signed-off-by: Pu Wen <puwen@hygon.cn>

Considering this, are there plans to supply patch for Xen itself?
Otherwise I'm not sure I see the point in making the guest side
work.

Jan



_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Re: [PATCH 07/11] x86/xen: Add support for Hygon's Dhyana Family 18h processor
  2018-06-11  6:38 ` [PATCH 07/11] " Jan Beulich
@ 2018-06-12 12:29   ` puwen
  0 siblings, 0 replies; 5+ messages in thread
From: puwen @ 2018-06-12 12:29 UTC (permalink / raw)
  To: jan beulich; +Cc: xen-devel


> (heavily shrinking the Cc list)
> 
> >>> On 09.06.18 at 15:23, wrote:
> > This patch enables the Xen Hypervisor support to Hygon
> > Family 18h CPU:
> > - Add Hygon support in Xen PMU arch init codes.
> > - Add Hygon support in PMU MSR read/write codes.
> > - Add Hygon support in read PMC codes.
> > 
> > Signed-off-by: Pu Wen 
> 
> Considering this, are there plans to supply patch for Xen itself?
> Otherwise I'm not sure I see the point in making the guest side
> work.
> 
> Jan
>

Yes, we do have plan to supply patch for Xen. There already have a
prototype version to support Hygon Dhyana family 18h processor,
We'll submit the patch after testing done.

Thanks,
Pu Wen
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH 07/11] x86/xen: Add support for Hygon's Dhyana Family 18h processor
@ 2018-06-09 13:23 Pu Wen
  0 siblings, 0 replies; 5+ messages in thread
From: Pu Wen @ 2018-06-09 13:23 UTC (permalink / raw)
  To: boris.ostrovsky, jgross, tglx, mingo, hpa, x86, zhangpanyong
  Cc: kvm, rkrcmar, peterz, viresh.kumar, trenn, linux-x86_64, shuah,
	linux-arch, Pu Wen, linux-acpi, linux-pci, xen-devel, lenb,
	thomas.lendacky, linux-pm, bp, mchehab, linux-edac, tony.luck,
	rjw, linux-kernel, pbonzini

This patch enables the Xen Hypervisor support to Hygon
Family 18h CPU:
- Add Hygon support in Xen PMU arch init codes.
- Add Hygon support in PMU MSR read/write codes.
- Add Hygon support in read PMC codes.

Signed-off-by: Pu Wen <puwen@hygon.cn>
---
 arch/x86/xen/pmu.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 7d00d4a..e2bee70 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -68,7 +68,8 @@ static __read_mostly int intel_num_arch_counters, intel_num_fixed_counters;
 
 static void xen_pmu_arch_init(void)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 
 		switch (boot_cpu_data.x86) {
 		case 0x15:
@@ -285,7 +286,8 @@ static bool xen_amd_pmu_emulate(unsigned int msr, u64 *val, bool is_read)
 
 bool pmu_msr_read(unsigned int msr, uint64_t *val, int *err)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		if (is_amd_pmu_msr(msr)) {
 			if (!xen_amd_pmu_emulate(msr, val, 1))
 				*val = native_read_msr_safe(msr, err);
@@ -308,7 +310,8 @@ bool pmu_msr_write(unsigned int msr, uint32_t low, uint32_t high, int *err)
 {
 	uint64_t val = ((uint64_t)high << 32) | low;
 
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON) {
 		if (is_amd_pmu_msr(msr)) {
 			if (!xen_amd_pmu_emulate(msr, &val, 0))
 				*err = native_write_msr_safe(msr, low, high);
@@ -379,7 +382,8 @@ static unsigned long long xen_intel_read_pmc(int counter)
 
 unsigned long long xen_read_pmc(int counter)
 {
-	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
+	if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
+	    boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
 		return xen_amd_read_pmc(counter);
 	else
 		return xen_intel_read_pmc(counter);
-- 
2.7.4


_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-06-12 12:29 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-06-09 13:23 [PATCH 07/11] x86/xen: Add support for Hygon's Dhyana Family 18h processor Pu Wen
2018-06-09 13:23 ` [07/11] " Pu Wen
2018-06-11  6:38 ` [PATCH 07/11] " Jan Beulich
2018-06-12 12:29   ` puwen
  -- strict thread matches above, loose matches on Subject: below --
2018-06-09 13:23 Pu Wen

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