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From: "Jan Beulich" <JBeulich@suse.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>, Tim Deegan <tim@xen.org>
Subject: Ping: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
Date: Fri, 05 Apr 2019 02:12:22 -0600	[thread overview]
Message-ID: <5CA70DE60200007800224CA3@prv1-mh.provo.novell.com> (raw)
In-Reply-To: <0ce9d1f8-ca58-3f81-4975-7a70f5ab669f@citrix.com>

>>> On 19.03.19 at 18:01, <george.dunlap@citrix.com> wrote:
> On 3/11/19 4:37 PM, Jan Beulich wrote:
>> The flag is really only meant for those, both HVM and 32-bit PV tell
>> kernel from user mode based on CPL/RPL. Remove the all-question-marks
>> comment and let's be on the safe side here and also suppress clearing
>> for 32-bit PV (this isn't a fast path after all).
>> 
>> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
>> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
>> assumes the new behavior.
>> 
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Acked-by: George Dunlap <george.dunlap@citrix.com>

While I intend to take George's ack as being sufficient to cover
the shadow side, may I please ask for an ack or otherwise for
the non-mm part of the change? I know you've not been in full
agreement with the change, but iirc I've never heard back on a
subsequent reply of mine. And I further think that with the now
(v2) even more obvious dependency of the shadow code on
this behavior, the change should really be taken as is.

Jan



_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Jan Beulich" <JBeulich@suse.com>
To: "Andrew Cooper" <andrew.cooper3@citrix.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>, Tim Deegan <tim@xen.org>
Subject: [Xen-devel] Ping: [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV
Date: Fri, 05 Apr 2019 02:12:22 -0600	[thread overview]
Message-ID: <5CA70DE60200007800224CA3@prv1-mh.provo.novell.com> (raw)
Message-ID: <20190405081222.S8o9KlkoPKezggpkYEyW3xc-48jZhBdA9MJZraPBfJs@z> (raw)
In-Reply-To: <0ce9d1f8-ca58-3f81-4975-7a70f5ab669f@citrix.com>

>>> On 19.03.19 at 18:01, <george.dunlap@citrix.com> wrote:
> On 3/11/19 4:37 PM, Jan Beulich wrote:
>> The flag is really only meant for those, both HVM and 32-bit PV tell
>> kernel from user mode based on CPL/RPL. Remove the all-question-marks
>> comment and let's be on the safe side here and also suppress clearing
>> for 32-bit PV (this isn't a fast path after all).
>> 
>> Remove no longer necessary is_pv_32bit_*() from sh_update_cr3() and
>> sh_walk_guest_tables(). Note that shadow_one_bit_disable() already
>> assumes the new behavior.
>> 
>> Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Acked-by: George Dunlap <george.dunlap@citrix.com>

While I intend to take George's ack as being sufficient to cover
the shadow side, may I please ask for an ack or otherwise for
the non-mm part of the change? I know you've not been in full
agreement with the change, but iirc I've never heard back on a
subsequent reply of mine. And I further think that with the now
(v2) even more obvious dependency of the shadow code on
this behavior, the change should really be taken as is.

Jan



_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

  reply	other threads:[~2019-04-05  8:12 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-11 16:37 [PATCH v2] x86: don't allow clearing of TF_kernel_mode for other than 64-bit PV Jan Beulich
2019-03-12 12:49 ` Wei Liu
2019-03-19 17:01 ` George Dunlap
2019-04-05  8:12   ` Jan Beulich [this message]
2019-04-05  8:12     ` [Xen-devel] Ping: " Jan Beulich
2019-04-05 13:03     ` Andrew Cooper
2019-04-05 13:03       ` [Xen-devel] " Andrew Cooper

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