* [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
@ 2012-02-16 19:45 Tom Warren
2012-02-16 19:51 ` Tom Warren
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Tom Warren @ 2012-02-16 19:45 UTC (permalink / raw)
To: u-boot
The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP
load using a constant in tegra2_start. Break it up into 4 loads
using mov & orr.
Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also
compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
Signed-off-by: Tom Warren <twarren@nvidia.com>
---
arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++-----
1 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c
index 4c44bb3..d2bc0d5 100644
--- a/arch/arm/cpu/armv7/tegra2/ap20.c
+++ b/arch/arm/cpu/armv7/tegra2/ap20.c
@@ -298,11 +298,26 @@ void tegra2_start(void)
writel(0xC0, &pmt->pmt_cfg_ctl);
/*
- * If we are ARM7 - give it a different stack. We are about to
- * start up the A9 which will want to use this one.
- */
- asm volatile("ldr sp, =%c0\n"
- : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
+ * If we are ARM7 - give it a different stack. We are about to
+ * start up the A9 which will want to use this one.
+ */
+ /*
+ * Note that the 'ldr sp,CONSTANT' version, below, doesn't
+ * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and above.
+ * The work-around is to use the (ugly) 4-pass mov/orr below.
+ *
+ * asm volatile("ldr sp, =%c0\n" : :
+ * "i"(AVP_EARLY_BOOT_STACK_LIMIT));
+ */
+
+ asm volatile("mov sp, %0"
+ : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF));
+ asm volatile("orr sp, %0"
+ : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00));
+ asm volatile("orr sp, %0"
+ : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000));
+ asm volatile("orr sp, %0"
+ : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000));
start_cpu((u32)_start);
halt_avp();
--
1.7.7.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
2012-02-16 19:45 [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load Tom Warren
@ 2012-02-16 19:51 ` Tom Warren
2012-02-16 21:30 ` Simon Glass
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Tom Warren @ 2012-02-16 19:51 UTC (permalink / raw)
To: u-boot
Albert,
> -----Original Message-----
> From: Tom Warren [mailto:twarren.nvidia at gmail.com]
> Sent: Thursday, February 16, 2012 12:46 PM
> To: u-boot at lists.denx.de
> Cc: twarren.nvidia at gmail.com; albert.u.boot at aribaud.net; wd at denx.de;
> sjg at chromium.org; Stephen Warren; Tom Warren
> Subject: [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack
> pointer load
>
> The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP load using a
> constant in tegra2_start. Break it up into 4 loads using mov & orr.
>
> Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also compiled all
> tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
>
> Signed-off-by: Tom Warren <twarren@nvidia.com>
> ---
> arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++-----
> 1 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
> b/arch/arm/cpu/armv7/tegra2/ap20.c
> index 4c44bb3..d2bc0d5 100644
> --- a/arch/arm/cpu/armv7/tegra2/ap20.c
> +++ b/arch/arm/cpu/armv7/tegra2/ap20.c
> @@ -298,11 +298,26 @@ void tegra2_start(void)
> writel(0xC0, &pmt->pmt_cfg_ctl);
>
> /*
> - * If we are ARM7 - give it a different stack. We are about to
> - * start up the A9 which will want to use this one.
> - */
> - asm volatile("ldr sp, =%c0\n"
> - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + * If we are ARM7 - give it a different stack. We are about to
> + * start up the A9 which will want to use this one.
> + */
> + /*
> + * Note that the 'ldr sp,CONSTANT' version, below, doesn't
> + * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and above.
> + * The work-around is to use the (ugly) 4-pass mov/orr below.
> + *
> + * asm volatile("ldr sp, =%c0\n" : :
> + * "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + */
> +
> + asm volatile("mov sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000));
>
> start_cpu((u32)_start);
> halt_avp();
> --
> 1.7.7.1
This should fix the problem you had with compiling the 6 tegra2 builds w/ELDK42. I've also tested it with gcc 4.4.1 (the one I use every day) and gcc 4.6.1 (used internally @ NVIDIA for Chrome U-Boot builds, etc.). It's an ugly work-around, but it works. Thanks to Simon for the fix, BTW.
Tom
--
nvpublic
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
2012-02-16 19:45 [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load Tom Warren
2012-02-16 19:51 ` Tom Warren
@ 2012-02-16 21:30 ` Simon Glass
2012-02-16 22:47 ` Marek Vasut
2012-02-17 8:56 ` Marek Vasut
3 siblings, 0 replies; 7+ messages in thread
From: Simon Glass @ 2012-02-16 21:30 UTC (permalink / raw)
To: u-boot
Hi Tom,
On Feb 16, 2012 11:45 AM, "Tom Warren" <twarren.nvidia@gmail.com> wrote:
>
> The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP
> load using a constant in tegra2_start. Break it up into 4 loads
> using mov & orr.
>
> Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also
> compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
>
> Signed-off-by: Tom Warren <twarren@nvidia.com>
> ---
> arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++-----
> 1 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
b/arch/arm/cpu/armv7/tegra2/ap20.c
> index 4c44bb3..d2bc0d5 100644
> --- a/arch/arm/cpu/armv7/tegra2/ap20.c
> +++ b/arch/arm/cpu/armv7/tegra2/ap20.c
> @@ -298,11 +298,26 @@ void tegra2_start(void)
> writel(0xC0, &pmt->pmt_cfg_ctl);
>
> /*
> - * If we are ARM7 - give it a different stack. We are
about to
> - * start up the A9 which will want to use this one.
> - */
> - asm volatile("ldr sp, =%c0\n"
> - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + * If we are ARM7 - give it a different stack. We are
about to
> + * start up the A9 which will want to use this one.
> + */
> + /*
> + * Note that the 'ldr sp,CONSTANT' version, below, doesn't
> + * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and
above.
> + * The work-around is to use the (ugly) 4-pass mov/orr
below.
> + *
> + * asm volatile("ldr sp, =%c0\n" : :
> + * "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + */
> +
> + asm volatile("mov sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000));
Can we combine these into one asm with 4 parameters?
>
> start_cpu((u32)_start);
> halt_avp();
> --
> 1.7.7.1
>
Regards,
Simon
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
2012-02-16 19:45 [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load Tom Warren
2012-02-16 19:51 ` Tom Warren
2012-02-16 21:30 ` Simon Glass
@ 2012-02-16 22:47 ` Marek Vasut
2012-02-16 23:04 ` Tom Warren
2012-02-17 8:56 ` Marek Vasut
3 siblings, 1 reply; 7+ messages in thread
From: Marek Vasut @ 2012-02-16 22:47 UTC (permalink / raw)
To: u-boot
> The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP
> load using a constant in tegra2_start. Break it up into 4 loads
> using mov & orr.
>
> Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also
> compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
>
> Signed-off-by: Tom Warren <twarren@nvidia.com>
> ---
> arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++-----
> 1 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
> b/arch/arm/cpu/armv7/tegra2/ap20.c index 4c44bb3..d2bc0d5 100644
> --- a/arch/arm/cpu/armv7/tegra2/ap20.c
> +++ b/arch/arm/cpu/armv7/tegra2/ap20.c
> @@ -298,11 +298,26 @@ void tegra2_start(void)
> writel(0xC0, &pmt->pmt_cfg_ctl);
>
> /*
> - * If we are ARM7 - give it a different stack. We are about to
> - * start up the A9 which will want to use this one.
> - */
> - asm volatile("ldr sp, =%c0\n"
> - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + * If we are ARM7 - give it a different stack. We are about to
> + * start up the A9 which will want to use this one.
> + */
> + /*
> + * Note that the 'ldr sp,CONSTANT' version, below, doesn't
> + * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and above.
> + * The work-around is to use the (ugly) 4-pass mov/orr below.
> + *
> + * asm volatile("ldr sp, =%c0\n" : :
> + * "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + */
> +
> + asm volatile("mov sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000));
asm volatile("mov sp, %0"::"r"(AVP_EARLY_BOOT_STACK_LIMIT)); won't work?
M
>
> start_cpu((u32)_start);
> halt_avp();
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
2012-02-16 22:47 ` Marek Vasut
@ 2012-02-16 23:04 ` Tom Warren
0 siblings, 0 replies; 7+ messages in thread
From: Tom Warren @ 2012-02-16 23:04 UTC (permalink / raw)
To: u-boot
Marek,
> -----Original Message-----
> From: Marek Vasut [mailto:marek.vasut at gmail.com]
> Sent: Thursday, February 16, 2012 3:47 PM
> To: u-boot at lists.denx.de
> Cc: Tom Warren; Tom Warren
> Subject: Re: [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with
> inline asm stack pointer load
>
> > The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP load
> > using a constant in tegra2_start. Break it up into 4 loads using mov &
> > orr.
> >
> > Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also compiled
> > all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
> >
> > Signed-off-by: Tom Warren <twarren@nvidia.com>
> > ---
> > arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++-----
> > 1 files changed, 20 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
> > b/arch/arm/cpu/armv7/tegra2/ap20.c index 4c44bb3..d2bc0d5 100644
> > --- a/arch/arm/cpu/armv7/tegra2/ap20.c
> > +++ b/arch/arm/cpu/armv7/tegra2/ap20.c
> > @@ -298,11 +298,26 @@ void tegra2_start(void)
> > writel(0xC0, &pmt->pmt_cfg_ctl);
> >
> > /*
> > - * If we are ARM7 - give it a different stack. We are about to
> > - * start up the A9 which will want to use this one.
> > - */
> > - asm volatile("ldr sp, =%c0\n"
> > - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> > + * If we are ARM7 - give it a different stack. We are about to
> > + * start up the A9 which will want to use this one.
> > + */
> > + /*
> > + * Note that the 'ldr sp,CONSTANT' version, below, doesn't
> > + * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and above.
> > + * The work-around is to use the (ugly) 4-pass mov/orr below.
> > + *
> > + * asm volatile("ldr sp, =%c0\n" : :
> > + * "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> > + */
> > +
> > + asm volatile("mov sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF));
> > + asm volatile("orr sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00));
> > + asm volatile("orr sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000));
> > + asm volatile("orr sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000));
>
> asm volatile("mov sp, %0"::"r"(AVP_EARLY_BOOT_STACK_LIMIT)); won't work?
That actually _did_ work. I'd thought I'd tried all iterations of ldr/mov/etc., including some that compiled OK but gave fixup errors in the linker, but I guess I missed that one.
Thanks. I'll retest and resubmit.
Tom
>
> M
> >
> > start_cpu((u32)_start);
> > halt_avp();
--
nvpublic
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
2012-02-16 19:45 [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load Tom Warren
` (2 preceding siblings ...)
2012-02-16 22:47 ` Marek Vasut
@ 2012-02-17 8:56 ` Marek Vasut
2012-02-17 16:08 ` Tom Warren
3 siblings, 1 reply; 7+ messages in thread
From: Marek Vasut @ 2012-02-17 8:56 UTC (permalink / raw)
To: u-boot
> The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP
> load using a constant in tegra2_start. Break it up into 4 loads
> using mov & orr.
>
> Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also
> compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
>
> Signed-off-by: Tom Warren <twarren@nvidia.com>
> ---
> arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++-----
> 1 files changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
> b/arch/arm/cpu/armv7/tegra2/ap20.c index 4c44bb3..d2bc0d5 100644
> --- a/arch/arm/cpu/armv7/tegra2/ap20.c
> +++ b/arch/arm/cpu/armv7/tegra2/ap20.c
> @@ -298,11 +298,26 @@ void tegra2_start(void)
> writel(0xC0, &pmt->pmt_cfg_ctl);
>
> /*
> - * If we are ARM7 - give it a different stack. We are about to
> - * start up the A9 which will want to use this one.
> - */
> - asm volatile("ldr sp, =%c0\n"
> - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + * If we are ARM7 - give it a different stack. We are about to
> + * start up the A9 which will want to use this one.
> + */
> + /*
> + * Note that the 'ldr sp,CONSTANT' version, below, doesn't
> + * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and above.
> + * The work-around is to use the (ugly) 4-pass mov/orr below.
> + *
> + * asm volatile("ldr sp, =%c0\n" : :
> + * "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> + */
> +
> + asm volatile("mov sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000));
> + asm volatile("orr sp, %0"
> + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000));
>
> start_cpu((u32)_start);
> halt_avp();
I think you said you'll send an updated patch.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
2012-02-17 8:56 ` Marek Vasut
@ 2012-02-17 16:08 ` Tom Warren
0 siblings, 0 replies; 7+ messages in thread
From: Tom Warren @ 2012-02-17 16:08 UTC (permalink / raw)
To: u-boot
Marek,
> -----Original Message-----
> From: Marek Vasut [mailto:marek.vasut at gmail.com]
> Sent: Friday, February 17, 2012 1:57 AM
> To: u-boot at lists.denx.de
> Cc: Tom Warren; Tom Warren
> Subject: Re: [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with
> inline asm stack pointer load
>
> > The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP load
> > using a constant in tegra2_start. Break it up into 4 loads using mov &
> > orr.
> >
> > Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also compiled
> > all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
> >
> > Signed-off-by: Tom Warren <twarren@nvidia.com>
> > ---
> > arch/arm/cpu/armv7/tegra2/ap20.c | 25 ++++++++++++++++++++-----
> > 1 files changed, 20 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
> > b/arch/arm/cpu/armv7/tegra2/ap20.c index 4c44bb3..d2bc0d5 100644
> > --- a/arch/arm/cpu/armv7/tegra2/ap20.c
> > +++ b/arch/arm/cpu/armv7/tegra2/ap20.c
> > @@ -298,11 +298,26 @@ void tegra2_start(void)
> > writel(0xC0, &pmt->pmt_cfg_ctl);
> >
> > /*
> > - * If we are ARM7 - give it a different stack. We are about to
> > - * start up the A9 which will want to use this one.
> > - */
> > - asm volatile("ldr sp, =%c0\n"
> > - : : "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> > + * If we are ARM7 - give it a different stack. We are about to
> > + * start up the A9 which will want to use this one.
> > + */
> > + /*
> > + * Note that the 'ldr sp,CONSTANT' version, below, doesn't
> > + * work on gcc 4.2.2 (ELDK42), but does on gcc 4.4.1 and above.
> > + * The work-around is to use the (ugly) 4-pass mov/orr below.
> > + *
> > + * asm volatile("ldr sp, =%c0\n" : :
> > + * "i"(AVP_EARLY_BOOT_STACK_LIMIT));
> > + */
> > +
> > + asm volatile("mov sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF));
> > + asm volatile("orr sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF00));
> > + asm volatile("orr sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF0000));
> > + asm volatile("orr sp, %0"
> > + : : "i"(AVP_EARLY_BOOT_STACK_LIMIT & 0xFF000000));
> >
> > start_cpu((u32)_start);
> > halt_avp();
>
> I think you said you'll send an updated patch.
Yep. Needed to test w/different compilers first. Posted V2.
Tom
--
nvpublic
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2012-02-17 16:08 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-02-16 19:45 [U-Boot] [PATCH] arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load Tom Warren
2012-02-16 19:51 ` Tom Warren
2012-02-16 21:30 ` Simon Glass
2012-02-16 22:47 ` Marek Vasut
2012-02-16 23:04 ` Tom Warren
2012-02-17 8:56 ` Marek Vasut
2012-02-17 16:08 ` Tom Warren
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.