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* [PATCH 2/2] ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
@ 2022-05-03 14:56 ` Fabien Dessenne
  0 siblings, 0 replies; 4+ messages in thread
From: Fabien Dessenne @ 2022-05-03 14:56 UTC (permalink / raw)
  To: Rob Herring, Jassi Brar, Maxime Coquelin, Alexandre Torgue,
	linux-kernel, linux-stm32, linux-arm-kernel, devicetree
  Cc: Fabien Dessenne

The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
remove the unsupported "wakeup" one.
Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
---
 arch/arm/boot/dts/stm32mp151.dtsi | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 7fdc324b3cf9..edc0a1641c7b 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1117,10 +1117,9 @@ ipcc: mailbox@4c001000 {
 			reg = <0x4c001000 0x400>;
 			st,proc-id = <0>;
 			interrupts-extended =
-				<&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
-				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
-				<&exti 61 1>;
-			interrupt-names = "rx", "tx", "wakeup";
+				<&exti 61 1>,
+				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "rx", "tx";
 			clocks = <&rcc IPCC>;
 			wakeup-source;
 			status = "disabled";
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [PATCH 2/2] ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
@ 2022-05-03 14:56 ` Fabien Dessenne
  0 siblings, 0 replies; 4+ messages in thread
From: Fabien Dessenne @ 2022-05-03 14:56 UTC (permalink / raw)
  To: Rob Herring, Jassi Brar, Maxime Coquelin, Alexandre Torgue,
	linux-kernel, linux-stm32, linux-arm-kernel, devicetree
  Cc: Fabien Dessenne

The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
remove the unsupported "wakeup" one.
Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.

Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
---
 arch/arm/boot/dts/stm32mp151.dtsi | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
index 7fdc324b3cf9..edc0a1641c7b 100644
--- a/arch/arm/boot/dts/stm32mp151.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -1117,10 +1117,9 @@ ipcc: mailbox@4c001000 {
 			reg = <0x4c001000 0x400>;
 			st,proc-id = <0>;
 			interrupts-extended =
-				<&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
-				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
-				<&exti 61 1>;
-			interrupt-names = "rx", "tx", "wakeup";
+				<&exti 61 1>,
+				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "rx", "tx";
 			clocks = <&rcc IPCC>;
 			wakeup-source;
 			status = "disabled";
-- 
2.25.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
  2022-05-03 14:56 ` Fabien Dessenne
@ 2022-06-13  7:39   ` Alexandre TORGUE
  -1 siblings, 0 replies; 4+ messages in thread
From: Alexandre TORGUE @ 2022-06-13  7:39 UTC (permalink / raw)
  To: Fabien Dessenne, Rob Herring, Jassi Brar, Maxime Coquelin,
	linux-kernel, linux-stm32, linux-arm-kernel, devicetree

Hi Fabien

On 5/3/22 16:56, Fabien Dessenne wrote:
> The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
> remove the unsupported "wakeup" one.
> Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
> to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.
> 
> Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
> ---
>   arch/arm/boot/dts/stm32mp151.dtsi | 7 +++----
>   1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
> index 7fdc324b3cf9..edc0a1641c7b 100644
> --- a/arch/arm/boot/dts/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/stm32mp151.dtsi
> @@ -1117,10 +1117,9 @@ ipcc: mailbox@4c001000 {
>   			reg = <0x4c001000 0x400>;
>   			st,proc-id = <0>;
>   			interrupts-extended =
> -				<&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> -				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> -				<&exti 61 1>;
> -			interrupt-names = "rx", "tx", "wakeup";
> +				<&exti 61 1>,
> +				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "rx", "tx";
>   			clocks = <&rcc IPCC>;
>   			wakeup-source;
>   			status = "disabled";

Applied on stm32-next.

Thanks.
Alex

^ permalink raw reply	[flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
@ 2022-06-13  7:39   ` Alexandre TORGUE
  0 siblings, 0 replies; 4+ messages in thread
From: Alexandre TORGUE @ 2022-06-13  7:39 UTC (permalink / raw)
  To: Fabien Dessenne, Rob Herring, Jassi Brar, Maxime Coquelin,
	linux-kernel, linux-stm32, linux-arm-kernel, devicetree

Hi Fabien

On 5/3/22 16:56, Fabien Dessenne wrote:
> The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
> remove the unsupported "wakeup" one.
> Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
> to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.
> 
> Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com>
> ---
>   arch/arm/boot/dts/stm32mp151.dtsi | 7 +++----
>   1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
> index 7fdc324b3cf9..edc0a1641c7b 100644
> --- a/arch/arm/boot/dts/stm32mp151.dtsi
> +++ b/arch/arm/boot/dts/stm32mp151.dtsi
> @@ -1117,10 +1117,9 @@ ipcc: mailbox@4c001000 {
>   			reg = <0x4c001000 0x400>;
>   			st,proc-id = <0>;
>   			interrupts-extended =
> -				<&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
> -				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
> -				<&exti 61 1>;
> -			interrupt-names = "rx", "tx", "wakeup";
> +				<&exti 61 1>,
> +				<&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "rx", "tx";
>   			clocks = <&rcc IPCC>;
>   			wakeup-source;
>   			status = "disabled";

Applied on stm32-next.

Thanks.
Alex

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-06-13  7:41 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-03 14:56 [PATCH 2/2] ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151 Fabien Dessenne
2022-05-03 14:56 ` Fabien Dessenne
2022-06-13  7:39 ` Alexandre TORGUE
2022-06-13  7:39   ` Alexandre TORGUE

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