* [PATCH v3 0/2] irqchip: Conexant CX92755 interrupts controller support
@ 2015-01-15 10:33 ` Baruch Siach
0 siblings, 0 replies; 9+ messages in thread
From: Baruch Siach @ 2015-01-15 10:33 UTC (permalink / raw)
To: Thomas Gleixner, Jason Cooper
Cc: linux-kernel, linux-arm-kernel, devicetree, Arnd Bergmann,
Sergei Shtylyov, Mark Rutland, Baruch Siach
This short series adds support for the Conexant CX92755 SoC interrupts
controller. This SoC is part of the Conexant Digicolor series of SoCs.
v3:
* Split from the "ARM: Conexant Digicolor CX92755 SoC support" series, as
these patches should go via the irqchip maintainers
* Use syscon to access the system global UC_IRQ_CONTROL register
* Add description of the "syscon" property to the device tree binding
documentation
* Rename the interrupt controller node name to "interrupt-controller"
(Sergei Shtylyov)
v2:
http://marc.info/?t=142074613900007&r=1&w=2
* Migrate the irq driver to generic irq chip, simplifying the code somewhat
(Arnd Bergmann)
v1:
http://thread.gmane.org/gmane.linux.kernel/1855027
Baruch Siach (2):
irqchip: devicetree: document Conexant Digicolor irq binding
irqchip: Conexant CX92755 interrupts controller driver
.../bindings/interrupt-controller/digicolor-ic.txt | 22 ++++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-digicolor.c | 120 +++++++++++++++++++++
3 files changed, 143 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt
create mode 100644 drivers/irqchip/irq-digicolor.c
--
2.1.4
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v3 0/2] irqchip: Conexant CX92755 interrupts controller support @ 2015-01-15 10:33 ` Baruch Siach 0 siblings, 0 replies; 9+ messages in thread From: Baruch Siach @ 2015-01-15 10:33 UTC (permalink / raw) To: linux-arm-kernel This short series adds support for the Conexant CX92755 SoC interrupts controller. This SoC is part of the Conexant Digicolor series of SoCs. v3: * Split from the "ARM: Conexant Digicolor CX92755 SoC support" series, as these patches should go via the irqchip maintainers * Use syscon to access the system global UC_IRQ_CONTROL register * Add description of the "syscon" property to the device tree binding documentation * Rename the interrupt controller node name to "interrupt-controller" (Sergei Shtylyov) v2: http://marc.info/?t=142074613900007&r=1&w=2 * Migrate the irq driver to generic irq chip, simplifying the code somewhat (Arnd Bergmann) v1: http://thread.gmane.org/gmane.linux.kernel/1855027 Baruch Siach (2): irqchip: devicetree: document Conexant Digicolor irq binding irqchip: Conexant CX92755 interrupts controller driver .../bindings/interrupt-controller/digicolor-ic.txt | 22 ++++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-digicolor.c | 120 +++++++++++++++++++++ 3 files changed, 143 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt create mode 100644 drivers/irqchip/irq-digicolor.c -- 2.1.4 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 1/2] irqchip: devicetree: document Conexant Digicolor irq binding @ 2015-01-15 10:33 ` Baruch Siach 0 siblings, 0 replies; 9+ messages in thread From: Baruch Siach @ 2015-01-15 10:33 UTC (permalink / raw) To: Thomas Gleixner, Jason Cooper Cc: linux-kernel, linux-arm-kernel, devicetree, Arnd Bergmann, Sergei Shtylyov, Mark Rutland, Baruch Siach Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- .../bindings/interrupt-controller/digicolor-ic.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt new file mode 100644 index 000000000000..c25c9a4de615 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt @@ -0,0 +1,22 @@ +Conexant Digicolor Interrupt Controller + +Required properties: + +- compatible : should be "cnxt,cx92755-ic" +- reg : Specifies base physical address and size of the interrupt controller + registers (IC) area +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- syscon: A phandle to the syscon node describing UC registers + +Example: + + intc: interrupt-controller@f0000040 { + compatible = "cnxt,cx92755-ic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xf0000040 0x40>; + syscon = <&uc_regs>; + }; + -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 1/2] irqchip: devicetree: document Conexant Digicolor irq binding @ 2015-01-15 10:33 ` Baruch Siach 0 siblings, 0 replies; 9+ messages in thread From: Baruch Siach @ 2015-01-15 10:33 UTC (permalink / raw) To: linux-arm-kernel Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- .../bindings/interrupt-controller/digicolor-ic.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt new file mode 100644 index 000000000000..c25c9a4de615 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt @@ -0,0 +1,22 @@ +Conexant Digicolor Interrupt Controller + +Required properties: + +- compatible : should be "cnxt,cx92755-ic" +- reg : Specifies base physical address and size of the interrupt controller + registers (IC) area +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- syscon: A phandle to the syscon node describing UC registers + +Example: + + intc: interrupt-controller at f0000040 { + compatible = "cnxt,cx92755-ic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xf0000040 0x40>; + syscon = <&uc_regs>; + }; + -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 1/2] irqchip: devicetree: document Conexant Digicolor irq binding @ 2015-01-15 10:33 ` Baruch Siach 0 siblings, 0 replies; 9+ messages in thread From: Baruch Siach @ 2015-01-15 10:33 UTC (permalink / raw) To: Thomas Gleixner, Jason Cooper Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, devicetree-u79uwXL29TY76Z2rM5mHXA, Arnd Bergmann, Sergei Shtylyov, Mark Rutland, Baruch Siach Signed-off-by: Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org> --- .../bindings/interrupt-controller/digicolor-ic.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt new file mode 100644 index 000000000000..c25c9a4de615 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt @@ -0,0 +1,22 @@ +Conexant Digicolor Interrupt Controller + +Required properties: + +- compatible : should be "cnxt,cx92755-ic" +- reg : Specifies base physical address and size of the interrupt controller + registers (IC) area +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- syscon: A phandle to the syscon node describing UC registers + +Example: + + intc: interrupt-controller@f0000040 { + compatible = "cnxt,cx92755-ic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xf0000040 0x40>; + syscon = <&uc_regs>; + }; + -- 2.1.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [tip:irq/core] irqchip: Devicetree: document Conexant Digicolor irq binding 2015-01-15 10:33 ` Baruch Siach (?) (?) @ 2015-01-26 10:44 ` tip-bot for Baruch Siach -1 siblings, 0 replies; 9+ messages in thread From: tip-bot for Baruch Siach @ 2015-01-26 10:44 UTC (permalink / raw) To: linux-tip-commits Cc: hpa, jason, linux-kernel, sergei.shtylyov, arnd, baruch, mingo, tglx, mark.rutland Commit-ID: f848526f3768a80cb3fbcf503306e2c29a80a83c Gitweb: http://git.kernel.org/tip/f848526f3768a80cb3fbcf503306e2c29a80a83c Author: Baruch Siach <baruch@tkos.co.il> AuthorDate: Thu, 15 Jan 2015 12:33:59 +0200 Committer: Thomas Gleixner <tglx@linutronix.de> CommitDate: Mon, 26 Jan 2015 11:38:23 +0100 irqchip: Devicetree: document Conexant Digicolor irq binding Signed-off-by: Baruch Siach <baruch@tkos.co.il> Cc: linux-arm-kernel@lists.infradead.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/505a65c8861e5210d94227bc0eec89cab0593fca.1421317616.git.baruch@tkos.co.il Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- .../bindings/interrupt-controller/digicolor-ic.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt new file mode 100644 index 0000000..42d41ec --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/digicolor-ic.txt @@ -0,0 +1,21 @@ +Conexant Digicolor Interrupt Controller + +Required properties: + +- compatible : should be "cnxt,cx92755-ic" +- reg : Specifies base physical address and size of the interrupt controller + registers (IC) area +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value shall be 1. +- syscon: A phandle to the syscon node describing UC registers + +Example: + + intc: interrupt-controller@f0000040 { + compatible = "cnxt,cx92755-ic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xf0000040 0x40>; + syscon = <&uc_regs>; + }; ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 2/2] irqchip: Conexant CX92755 interrupts controller driver 2015-01-15 10:33 ` Baruch Siach @ 2015-01-15 10:34 ` Baruch Siach -1 siblings, 0 replies; 9+ messages in thread From: Baruch Siach @ 2015-01-15 10:34 UTC (permalink / raw) To: Thomas Gleixner, Jason Cooper Cc: linux-kernel, linux-arm-kernel, devicetree, Arnd Bergmann, Sergei Shtylyov, Mark Rutland, Baruch Siach Add interrupt controller driver to the Conexant CX92755 SoC, part of the Digicolor SoCs series. Use the generic irq framework support. Use syscon to access the system global UC_IRQ_CONTROL register. Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-digicolor.c | 120 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+) create mode 100644 drivers/irqchip/irq-digicolor.c diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 9516a324be6d..42965d2476bb 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -42,3 +42,4 @@ obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o +obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o diff --git a/drivers/irqchip/irq-digicolor.c b/drivers/irqchip/irq-digicolor.c new file mode 100644 index 000000000000..930a2a2fac7f --- /dev/null +++ b/drivers/irqchip/irq-digicolor.c @@ -0,0 +1,120 @@ +/* + * Conexant Digicolor SoCs IRQ chip driver + * + * Author: Baruch Siach <baruch@tkos.co.il> + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/io.h> +#include <linux/irq.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> + +#include <asm/exception.h> + +#include "irqchip.h" + +#define UC_IRQ_CONTROL 0x04 + +#define IC_FLAG_CLEAR_LO 0x00 +#define IC_FLAG_CLEAR_XLO 0x04 +#define IC_INT0ENABLE_LO 0x10 +#define IC_INT0ENABLE_XLO 0x14 +#define IC_INT0STATUS_LO 0x18 +#define IC_INT0STATUS_XLO 0x1c + +static struct irq_domain *digicolor_irq_domain; + +static void __exception_irq_entry digicolor_handle_irq(struct pt_regs *regs) +{ + struct irq_domain_chip_generic *dgc = digicolor_irq_domain->gc; + struct irq_chip_generic *gc = dgc->gc[0]; + u32 status, hwirq; + + do { + status = irq_reg_readl(gc, IC_INT0STATUS_LO); + if (status) { + hwirq = ffs(status) - 1; + } else { + status = irq_reg_readl(gc, IC_INT0STATUS_XLO); + if (status) + hwirq = ffs(status) - 1 + 32; + else + return; + } + + handle_domain_irq(digicolor_irq_domain, hwirq, regs); + } while (1); +} + +static void digicolor_set_gc(void __iomem *reg_base, unsigned irq_base, + unsigned en_reg, unsigned ack_reg) +{ + struct irq_chip_generic *gc; + + gc = irq_get_domain_generic_chip(digicolor_irq_domain, irq_base); + gc->reg_base = reg_base; + gc->chip_types[0].regs.ack = ack_reg; + gc->chip_types[0].regs.mask = en_reg; + gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; + gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; + gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; +} + +static int __init digicolor_of_init(struct device_node *node, + struct device_node *parent) +{ + static void __iomem *reg_base; + unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; + struct regmap *ucregs; + int ret; + + reg_base = of_iomap(node, 0); + if (!reg_base) { + pr_err("%s: unable to map IC registers\n", node->full_name); + return -ENXIO; + } + + /* disable all interrupts */ + writel(0, reg_base + IC_INT0ENABLE_LO); + writel(0, reg_base + IC_INT0ENABLE_XLO); + + ucregs = syscon_regmap_lookup_by_phandle(node, "syscon"); + if (IS_ERR(ucregs)) { + pr_err("%s: unable to map UC registers\n", node->full_name); + return PTR_ERR(ucregs); + } + /* channel 1, regular IRQs */ + regmap_write(ucregs, UC_IRQ_CONTROL, 1); + + digicolor_irq_domain = + irq_domain_add_linear(node, 64, &irq_generic_chip_ops, NULL); + if (!digicolor_irq_domain) { + pr_err("%s: unable to create IRQ domain\n", node->full_name); + return -ENOMEM; + } + + ret = irq_alloc_domain_generic_chips(digicolor_irq_domain, 32, 1, + "digicolor_irq", handle_level_irq, + clr, 0, 0); + if (ret) { + pr_err("%s: unable to allocate IRQ gc\n", node->full_name); + return ret; + } + + digicolor_set_gc(reg_base, 0, IC_INT0ENABLE_LO, IC_FLAG_CLEAR_LO); + digicolor_set_gc(reg_base, 32, IC_INT0ENABLE_XLO, IC_FLAG_CLEAR_XLO); + + set_handle_irq(digicolor_handle_irq); + + return 0; +} +IRQCHIP_DECLARE(conexant_digicolor_ic, "cnxt,cx92755-ic", digicolor_of_init); -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 2/2] irqchip: Conexant CX92755 interrupts controller driver @ 2015-01-15 10:34 ` Baruch Siach 0 siblings, 0 replies; 9+ messages in thread From: Baruch Siach @ 2015-01-15 10:34 UTC (permalink / raw) To: linux-arm-kernel Add interrupt controller driver to the Conexant CX92755 SoC, part of the Digicolor SoCs series. Use the generic irq framework support. Use syscon to access the system global UC_IRQ_CONTROL register. Signed-off-by: Baruch Siach <baruch@tkos.co.il> --- drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-digicolor.c | 120 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+) create mode 100644 drivers/irqchip/irq-digicolor.c diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 9516a324be6d..42965d2476bb 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -42,3 +42,4 @@ obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o +obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o diff --git a/drivers/irqchip/irq-digicolor.c b/drivers/irqchip/irq-digicolor.c new file mode 100644 index 000000000000..930a2a2fac7f --- /dev/null +++ b/drivers/irqchip/irq-digicolor.c @@ -0,0 +1,120 @@ +/* + * Conexant Digicolor SoCs IRQ chip driver + * + * Author: Baruch Siach <baruch@tkos.co.il> + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/io.h> +#include <linux/irq.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> + +#include <asm/exception.h> + +#include "irqchip.h" + +#define UC_IRQ_CONTROL 0x04 + +#define IC_FLAG_CLEAR_LO 0x00 +#define IC_FLAG_CLEAR_XLO 0x04 +#define IC_INT0ENABLE_LO 0x10 +#define IC_INT0ENABLE_XLO 0x14 +#define IC_INT0STATUS_LO 0x18 +#define IC_INT0STATUS_XLO 0x1c + +static struct irq_domain *digicolor_irq_domain; + +static void __exception_irq_entry digicolor_handle_irq(struct pt_regs *regs) +{ + struct irq_domain_chip_generic *dgc = digicolor_irq_domain->gc; + struct irq_chip_generic *gc = dgc->gc[0]; + u32 status, hwirq; + + do { + status = irq_reg_readl(gc, IC_INT0STATUS_LO); + if (status) { + hwirq = ffs(status) - 1; + } else { + status = irq_reg_readl(gc, IC_INT0STATUS_XLO); + if (status) + hwirq = ffs(status) - 1 + 32; + else + return; + } + + handle_domain_irq(digicolor_irq_domain, hwirq, regs); + } while (1); +} + +static void digicolor_set_gc(void __iomem *reg_base, unsigned irq_base, + unsigned en_reg, unsigned ack_reg) +{ + struct irq_chip_generic *gc; + + gc = irq_get_domain_generic_chip(digicolor_irq_domain, irq_base); + gc->reg_base = reg_base; + gc->chip_types[0].regs.ack = ack_reg; + gc->chip_types[0].regs.mask = en_reg; + gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; + gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; + gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; +} + +static int __init digicolor_of_init(struct device_node *node, + struct device_node *parent) +{ + static void __iomem *reg_base; + unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; + struct regmap *ucregs; + int ret; + + reg_base = of_iomap(node, 0); + if (!reg_base) { + pr_err("%s: unable to map IC registers\n", node->full_name); + return -ENXIO; + } + + /* disable all interrupts */ + writel(0, reg_base + IC_INT0ENABLE_LO); + writel(0, reg_base + IC_INT0ENABLE_XLO); + + ucregs = syscon_regmap_lookup_by_phandle(node, "syscon"); + if (IS_ERR(ucregs)) { + pr_err("%s: unable to map UC registers\n", node->full_name); + return PTR_ERR(ucregs); + } + /* channel 1, regular IRQs */ + regmap_write(ucregs, UC_IRQ_CONTROL, 1); + + digicolor_irq_domain = + irq_domain_add_linear(node, 64, &irq_generic_chip_ops, NULL); + if (!digicolor_irq_domain) { + pr_err("%s: unable to create IRQ domain\n", node->full_name); + return -ENOMEM; + } + + ret = irq_alloc_domain_generic_chips(digicolor_irq_domain, 32, 1, + "digicolor_irq", handle_level_irq, + clr, 0, 0); + if (ret) { + pr_err("%s: unable to allocate IRQ gc\n", node->full_name); + return ret; + } + + digicolor_set_gc(reg_base, 0, IC_INT0ENABLE_LO, IC_FLAG_CLEAR_LO); + digicolor_set_gc(reg_base, 32, IC_INT0ENABLE_XLO, IC_FLAG_CLEAR_XLO); + + set_handle_irq(digicolor_handle_irq); + + return 0; +} +IRQCHIP_DECLARE(conexant_digicolor_ic, "cnxt,cx92755-ic", digicolor_of_init); -- 2.1.4 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [tip:irq/core] irqchip: Conexant CX92755 interrupts controller driver 2015-01-15 10:34 ` Baruch Siach (?) @ 2015-01-26 10:45 ` tip-bot for Baruch Siach -1 siblings, 0 replies; 9+ messages in thread From: tip-bot for Baruch Siach @ 2015-01-26 10:45 UTC (permalink / raw) To: linux-tip-commits Cc: tglx, baruch, hpa, sergei.shtylyov, mark.rutland, arnd, linux-kernel, mingo, jason Commit-ID: 8041dfbd31cfff31309a2469c3d692595381c38e Gitweb: http://git.kernel.org/tip/8041dfbd31cfff31309a2469c3d692595381c38e Author: Baruch Siach <baruch@tkos.co.il> AuthorDate: Thu, 15 Jan 2015 12:34:00 +0200 Committer: Thomas Gleixner <tglx@linutronix.de> CommitDate: Mon, 26 Jan 2015 11:38:23 +0100 irqchip: Conexant CX92755 interrupts controller driver Add interrupt controller driver to the Conexant CX92755 SoC, part of the Digicolor SoCs series. Use the generic irq framework support. Use syscon to access the system global UC_IRQ_CONTROL register. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Cc: linux-arm-kernel@lists.infradead.org Cc: Arnd Bergmann <arnd@arndb.de> Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/5b769e3c23dfa5fde08c4f3bc966c2c2b3921d8a.1421317616.git.baruch@tkos.co.il Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-digicolor.c | 120 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 9516a32..42965d2 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -42,3 +42,4 @@ obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o obj-$(CONFIG_KEYSTONE_IRQ) += irq-keystone.o obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o obj-$(CONFIG_ARCH_MEDIATEK) += irq-mtk-sysirq.o +obj-$(CONFIG_ARCH_DIGICOLOR) += irq-digicolor.o diff --git a/drivers/irqchip/irq-digicolor.c b/drivers/irqchip/irq-digicolor.c new file mode 100644 index 0000000..930a2a2 --- /dev/null +++ b/drivers/irqchip/irq-digicolor.c @@ -0,0 +1,120 @@ +/* + * Conexant Digicolor SoCs IRQ chip driver + * + * Author: Baruch Siach <baruch@tkos.co.il> + * + * Copyright (C) 2014 Paradox Innovation Ltd. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/io.h> +#include <linux/irq.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> +#include <linux/mfd/syscon.h> +#include <linux/regmap.h> + +#include <asm/exception.h> + +#include "irqchip.h" + +#define UC_IRQ_CONTROL 0x04 + +#define IC_FLAG_CLEAR_LO 0x00 +#define IC_FLAG_CLEAR_XLO 0x04 +#define IC_INT0ENABLE_LO 0x10 +#define IC_INT0ENABLE_XLO 0x14 +#define IC_INT0STATUS_LO 0x18 +#define IC_INT0STATUS_XLO 0x1c + +static struct irq_domain *digicolor_irq_domain; + +static void __exception_irq_entry digicolor_handle_irq(struct pt_regs *regs) +{ + struct irq_domain_chip_generic *dgc = digicolor_irq_domain->gc; + struct irq_chip_generic *gc = dgc->gc[0]; + u32 status, hwirq; + + do { + status = irq_reg_readl(gc, IC_INT0STATUS_LO); + if (status) { + hwirq = ffs(status) - 1; + } else { + status = irq_reg_readl(gc, IC_INT0STATUS_XLO); + if (status) + hwirq = ffs(status) - 1 + 32; + else + return; + } + + handle_domain_irq(digicolor_irq_domain, hwirq, regs); + } while (1); +} + +static void digicolor_set_gc(void __iomem *reg_base, unsigned irq_base, + unsigned en_reg, unsigned ack_reg) +{ + struct irq_chip_generic *gc; + + gc = irq_get_domain_generic_chip(digicolor_irq_domain, irq_base); + gc->reg_base = reg_base; + gc->chip_types[0].regs.ack = ack_reg; + gc->chip_types[0].regs.mask = en_reg; + gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; + gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; + gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; +} + +static int __init digicolor_of_init(struct device_node *node, + struct device_node *parent) +{ + static void __iomem *reg_base; + unsigned int clr = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; + struct regmap *ucregs; + int ret; + + reg_base = of_iomap(node, 0); + if (!reg_base) { + pr_err("%s: unable to map IC registers\n", node->full_name); + return -ENXIO; + } + + /* disable all interrupts */ + writel(0, reg_base + IC_INT0ENABLE_LO); + writel(0, reg_base + IC_INT0ENABLE_XLO); + + ucregs = syscon_regmap_lookup_by_phandle(node, "syscon"); + if (IS_ERR(ucregs)) { + pr_err("%s: unable to map UC registers\n", node->full_name); + return PTR_ERR(ucregs); + } + /* channel 1, regular IRQs */ + regmap_write(ucregs, UC_IRQ_CONTROL, 1); + + digicolor_irq_domain = + irq_domain_add_linear(node, 64, &irq_generic_chip_ops, NULL); + if (!digicolor_irq_domain) { + pr_err("%s: unable to create IRQ domain\n", node->full_name); + return -ENOMEM; + } + + ret = irq_alloc_domain_generic_chips(digicolor_irq_domain, 32, 1, + "digicolor_irq", handle_level_irq, + clr, 0, 0); + if (ret) { + pr_err("%s: unable to allocate IRQ gc\n", node->full_name); + return ret; + } + + digicolor_set_gc(reg_base, 0, IC_INT0ENABLE_LO, IC_FLAG_CLEAR_LO); + digicolor_set_gc(reg_base, 32, IC_INT0ENABLE_XLO, IC_FLAG_CLEAR_XLO); + + set_handle_irq(digicolor_handle_irq); + + return 0; +} +IRQCHIP_DECLARE(conexant_digicolor_ic, "cnxt,cx92755-ic", digicolor_of_init); ^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2015-01-26 10:45 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2015-01-15 10:33 [PATCH v3 0/2] irqchip: Conexant CX92755 interrupts controller support Baruch Siach 2015-01-15 10:33 ` Baruch Siach 2015-01-15 10:33 ` [PATCH v3 1/2] irqchip: devicetree: document Conexant Digicolor irq binding Baruch Siach 2015-01-15 10:33 ` Baruch Siach 2015-01-15 10:33 ` Baruch Siach 2015-01-26 10:44 ` [tip:irq/core] irqchip: Devicetree: " tip-bot for Baruch Siach 2015-01-15 10:34 ` [PATCH v3 2/2] irqchip: Conexant CX92755 interrupts controller driver Baruch Siach 2015-01-15 10:34 ` Baruch Siach 2015-01-26 10:45 ` [tip:irq/core] " tip-bot for Baruch Siach
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