* [PATCH] drm/i915: avoid flush_scheduled_work() usage
@ 2023-03-03 10:11 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-03 10:11 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
There was an attempt to remove flush_scheduled_work() from
intel_modeset_driver_remove_noirq(), but it went to backlog [1].
Now that i915 is about to become the last flush_scheduled_work() user,
for now let's start with blind
sed -e 's/system_wq,/i915_wq,/g'
-e 's/schedule_work(/queue_work(i915_wq, /g'
-e 's/schedule_delayed_work(/queue_delayed_work(i915_wq, /g'
-e 's/flush_scheduled_work()/flush_workqueue(i915_wq)/g'
conversion inside the whole drivers/gpu/drm/i915/ directory.
There will be work items which do not need to be flushed by
flush_workqueue(i915_wq), but that cleanup can be done after
flush_scheduled_work() is removed.
Link: https://lkml.kernel.org/r/20220923142934.29528-1-tvrtko.ursulin@linux.intel.com [1]
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 14 +++++++-------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../gpu/drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 5 +++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
24 files changed, 56 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d3994e2a7d63..4088f69f68ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7648,7 +7648,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
@@ -8981,7 +8981,7 @@ void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 257aa2b7cf20..acf30b64492b 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -992,7 +992,7 @@ void intel_dmc_ucode_init(struct drm_i915_private *dev_priv)
}
drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dev_priv->display.dmc.work);
+ queue_work(i915_wq, &dev_priv->display.dmc.work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 62cbab7402e9..dd401dce099d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5064,7 +5064,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 3d3efcf02011..4449b21ad9bd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1123,7 +1123,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 29c6421cd666..032402659dc0 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -117,7 +117,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index b507ff944864..ab8666e19613 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1599,7 +1599,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index f76b06293eb9..07553b03efc5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -667,7 +667,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 6406fd487ee5..26ea37530830 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1030,7 +1030,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2131,10 +2131,10 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
+ queue_delayed_work(i915_wq, &hdcp->check_work,
DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
+ queue_delayed_work(i915_wq, &hdcp->check_work,
DRM_HDCP_CHECK_PERIOD_MS);
}
@@ -2372,7 +2372,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2447,7 +2447,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2464,7 +2464,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2582,5 +2582,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 907ab7526cb4..4ca33e9aad1f 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -211,7 +211,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -338,7 +338,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -438,7 +438,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -569,7 +569,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -679,7 +679,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -707,7 +707,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b8dce0576512..369331543b81 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 7b21438edd9b..c4f444f8cb25 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -880,7 +880,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 7a72e15e6836..2bb44107d714 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -264,7 +264,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
val |= psr_irq_psr_error_bit_get(intel_dp);
intel_de_write(dev_priv, imr_reg, val);
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2316,7 +2316,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2355,7 +2355,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 1bbe6708d0a7..42888158a4c6 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2367,7 +2367,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3672,7 +3672,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..bc438f8aba7a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,7 +90,7 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
+ queue_delayed_work(i915_wq, &pool->work,
round_jiffies_up_relative(HZ));
}
@@ -116,7 +116,7 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
+ queue_delayed_work(i915_wq, &pool->work,
round_jiffies_up_relative(HZ));
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 1b25a6039152..93a3ca24719c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -358,7 +358,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..1d6ea9aa6efc 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,7 +207,7 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
+ queue_delayed_work(i915_wq, >->requests.retire_work,
round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,7 +224,7 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
+ queue_delayed_work(i915_wq, >->requests.retire_work,
round_jiffies_up_relative(HZ));
}
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 0bb9094fdacd..d34472c99039 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1545,7 +1545,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index f5d7b5126433..d656d9385277 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -131,12 +131,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -971,7 +971,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1023,7 +1023,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1039,7 +1039,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1927,7 +1927,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1944,7 +1944,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4295306487c7..97d9a1b42e50 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -944,4 +944,5 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
return (struct intel_device_info *)INTEL_INFO(dev_priv);
}
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..06e002cbe393 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,7 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +89,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +117,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 7503dcb9043b..190376fe1146 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -291,7 +291,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] [PATCH] drm/i915: avoid flush_scheduled_work() usage
@ 2023-03-03 10:11 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-03 10:11 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
There was an attempt to remove flush_scheduled_work() from
intel_modeset_driver_remove_noirq(), but it went to backlog [1].
Now that i915 is about to become the last flush_scheduled_work() user,
for now let's start with blind
sed -e 's/system_wq,/i915_wq,/g'
-e 's/schedule_work(/queue_work(i915_wq, /g'
-e 's/schedule_delayed_work(/queue_delayed_work(i915_wq, /g'
-e 's/flush_scheduled_work()/flush_workqueue(i915_wq)/g'
conversion inside the whole drivers/gpu/drm/i915/ directory.
There will be work items which do not need to be flushed by
flush_workqueue(i915_wq), but that cleanup can be done after
flush_scheduled_work() is removed.
Link: https://lkml.kernel.org/r/20220923142934.29528-1-tvrtko.ursulin@linux.intel.com [1]
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 14 +++++++-------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../gpu/drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 5 +++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
24 files changed, 56 insertions(+), 46 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index d3994e2a7d63..4088f69f68ba 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7648,7 +7648,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
@@ -8981,7 +8981,7 @@ void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 257aa2b7cf20..acf30b64492b 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -992,7 +992,7 @@ void intel_dmc_ucode_init(struct drm_i915_private *dev_priv)
}
drm_dbg_kms(&dev_priv->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dev_priv->display.dmc.work);
+ queue_work(i915_wq, &dev_priv->display.dmc.work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 62cbab7402e9..dd401dce099d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5064,7 +5064,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 3d3efcf02011..4449b21ad9bd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1123,7 +1123,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 29c6421cd666..032402659dc0 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -117,7 +117,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index b507ff944864..ab8666e19613 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1599,7 +1599,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index f76b06293eb9..07553b03efc5 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -667,7 +667,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 6406fd487ee5..26ea37530830 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1030,7 +1030,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2131,10 +2131,10 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
+ queue_delayed_work(i915_wq, &hdcp->check_work,
DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
+ queue_delayed_work(i915_wq, &hdcp->check_work,
DRM_HDCP_CHECK_PERIOD_MS);
}
@@ -2372,7 +2372,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2447,7 +2447,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2464,7 +2464,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2582,5 +2582,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 907ab7526cb4..4ca33e9aad1f 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -211,7 +211,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -338,7 +338,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -438,7 +438,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -569,7 +569,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -679,7 +679,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -707,7 +707,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b8dce0576512..369331543b81 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 7b21438edd9b..c4f444f8cb25 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -880,7 +880,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 7a72e15e6836..2bb44107d714 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -264,7 +264,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
val |= psr_irq_psr_error_bit_get(intel_dp);
intel_de_write(dev_priv, imr_reg, val);
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2316,7 +2316,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2355,7 +2355,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 1bbe6708d0a7..42888158a4c6 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2367,7 +2367,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3672,7 +3672,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..bc438f8aba7a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,7 +90,7 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
+ queue_delayed_work(i915_wq, &pool->work,
round_jiffies_up_relative(HZ));
}
@@ -116,7 +116,7 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
+ queue_delayed_work(i915_wq, &pool->work,
round_jiffies_up_relative(HZ));
}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 1b25a6039152..93a3ca24719c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -358,7 +358,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..1d6ea9aa6efc 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,7 +207,7 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
+ queue_delayed_work(i915_wq, >->requests.retire_work,
round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,7 +224,7 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
+ queue_delayed_work(i915_wq, >->requests.retire_work,
round_jiffies_up_relative(HZ));
}
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 0bb9094fdacd..d34472c99039 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1545,7 +1545,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index f5d7b5126433..d656d9385277 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -131,12 +131,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -971,7 +971,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1023,7 +1023,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1039,7 +1039,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1927,7 +1927,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1944,7 +1944,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4295306487c7..97d9a1b42e50 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -944,4 +944,5 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
return (struct intel_device_info *)INTEL_INFO(dev_priv);
}
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..06e002cbe393 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,7 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +89,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +117,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 7503dcb9043b..190376fe1146 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -291,7 +291,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: avoid flush_scheduled_work() usage
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
(?)
@ 2023-03-03 10:44 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-03-03 10:44 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: dim checkpatch failed
2457aaaeeb44 drm/i915: avoid flush_scheduled_work() usage
-:154: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#154: FILE: drivers/gpu/drm/i915/display/intel_hdcp.c:2132:
+ queue_delayed_work(i915_wq, &hdcp->check_work,
DRM_HDCP2_CHECK_PERIOD_MS);
-:158: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#158: FILE: drivers/gpu/drm/i915/display/intel_hdcp.c:2135:
+ queue_delayed_work(i915_wq, &hdcp->check_work,
DRM_HDCP_CHECK_PERIOD_MS);
-:342: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#342: FILE: drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c:94:
+ queue_delayed_work(i915_wq, &pool->work,
round_jiffies_up_relative(HZ));
-:351: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#351: FILE: drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c:120:
+ queue_delayed_work(i915_wq, &pool->work,
round_jiffies_up_relative(HZ));
-:386: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#386: FILE: drivers/gpu/drm/i915/gt/intel_gt_requests.c:211:
+ queue_delayed_work(i915_wq, >->requests.retire_work,
round_jiffies_up_relative(HZ));
-:395: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#395: FILE: drivers/gpu/drm/i915/gt/intel_gt_requests.c:228:
+ queue_delayed_work(i915_wq, >->requests.retire_work,
round_jiffies_up_relative(HZ));
total: 0 errors, 0 warnings, 6 checks, 410 lines checked
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: avoid flush_scheduled_work() usage
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
(?)
(?)
@ 2023-03-03 11:22 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-03-03 11:22 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 69907 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage
URL : https://patchwork.freedesktop.org/series/114608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12805 -> Patchwork_114608v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/index.html
Participating hosts (3 -> 40)
------------------------------
Additional (38): fi-kbl-soraka fi-rkl-11600 bat-adls-5 bat-dg1-6 bat-dg1-5 bat-adlp-6 fi-apl-guc fi-pnv-d510 bat-rpls-1 bat-rpls-2 fi-blb-e6850 fi-skl-6600u fi-bsw-n3050 bat-dg2-8 bat-adlm-1 bat-dg2-9 fi-ilk-650 fi-hsw-4770 bat-adln-1 fi-ivb-3770 bat-jsl-3 bat-rplp-1 fi-elk-e7500 bat-dg2-11 fi-bsw-nick fi-kbl-7567u bat-dg1-7 bat-kbl-2 bat-adlp-9 fi-skl-guc fi-cfl-8700k fi-glk-j4005 bat-jsl-1 fi-tgl-1115g4 fi-cfl-guc fi-kbl-guc fi-kbl-x1275 fi-cfl-8109u
Missing (1): fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_114608v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-rpls-2: NOTRUN -> [SKIP][1] ([i915#7456])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@debugfs_test@basic-hwmon.html
- bat-adlp-9: NOTRUN -> [SKIP][2] ([i915#7456])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@debugfs_test@basic-hwmon.html
- bat-adlp-6: NOTRUN -> [SKIP][3] ([i915#7456])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@debugfs_test@basic-hwmon.html
- bat-rplp-1: NOTRUN -> [SKIP][4] ([i915#7456])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@debugfs_test@basic-hwmon.html
- fi-rkl-11600: NOTRUN -> [SKIP][5] ([i915#7456])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@debugfs_test@basic-hwmon.html
- bat-adls-5: NOTRUN -> [SKIP][6] ([i915#7456])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@debugfs_test@basic-hwmon.html
- bat-jsl-3: NOTRUN -> [SKIP][7] ([i915#7456])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@debugfs_test@basic-hwmon.html
- bat-adln-1: NOTRUN -> [SKIP][8] ([i915#7456])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@debugfs_test@basic-hwmon.html
- bat-adlm-1: NOTRUN -> [SKIP][9] ([i915#7456])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@debugfs_test@basic-hwmon.html
- bat-jsl-1: NOTRUN -> [SKIP][10] ([i915#7456])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@debugfs_test@basic-hwmon.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][11] ([i915#7456])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@debugfs_test@basic-hwmon.html
- bat-rpls-1: NOTRUN -> [SKIP][12] ([i915#7456])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@debugfs_test@basic-hwmon.html
* igt@fbdev@eof:
- bat-atsm-1: NOTRUN -> [SKIP][13] ([i915#2582]) +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@fbdev@eof.html
- bat-adlm-1: NOTRUN -> [SKIP][14] ([i915#2582]) +4 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@fbdev@eof.html
* igt@fbdev@read:
- bat-rpls-2: NOTRUN -> [SKIP][15] ([i915#2582]) +4 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@fbdev@read.html
* igt@fbdev@write:
- bat-rpls-1: NOTRUN -> [SKIP][16] ([i915#2582]) +4 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@fbdev@write.html
- bat-dg1-7: NOTRUN -> [SKIP][17] ([i915#2582]) +4 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@fbdev@write.html
* igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#2190])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html
- fi-kbl-7567u: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-7567u/igt@gem_huc_copy@huc-copy.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][20] ([i915#2190])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html
- bat-jsl-1: NOTRUN -> [SKIP][21] ([i915#2190])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@gem_huc_copy@huc-copy.html
- fi-cfl-8700k: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#2190])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-8700k/igt@gem_huc_copy@huc-copy.html
- fi-rkl-11600: NOTRUN -> [SKIP][23] ([i915#2190])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html
- fi-skl-6600u: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#2190])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
- bat-jsl-3: NOTRUN -> [SKIP][25] ([i915#2190])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@gem_huc_copy@huc-copy.html
- fi-glk-j4005: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#2190])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-glk-j4005/igt@gem_huc_copy@huc-copy.html
- fi-kbl-x1275: NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#2190])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-x1275/igt@gem_huc_copy@huc-copy.html
- fi-kbl-soraka: NOTRUN -> [SKIP][28] ([fdo#109271] / [i915#2190])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#4613]) +3 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-apl-guc/igt@gem_lmem_swapping@basic.html
- bat-jsl-3: NOTRUN -> [SKIP][30] ([i915#4613]) +3 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@gem_lmem_swapping@basic.html
- fi-glk-j4005: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#4613]) +3 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-glk-j4005/igt@gem_lmem_swapping@basic.html
- bat-adlp-9: NOTRUN -> [SKIP][32] ([i915#4613]) +3 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@gem_lmem_swapping@basic.html
- fi-skl-guc: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#4613]) +3 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-skl-guc/igt@gem_lmem_swapping@basic.html
- fi-kbl-soraka: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#4613]) +3 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
- fi-kbl-7567u: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#4613]) +3 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-7567u/igt@gem_lmem_swapping@basic.html
- bat-adln-1: NOTRUN -> [SKIP][36] ([i915#4613]) +3 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@gem_lmem_swapping@basic.html
- fi-cfl-8700k: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#4613]) +3 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-8700k/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-bsw-nick: NOTRUN -> [SKIP][38] ([fdo#109271]) +53 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-bsw-nick/igt@gem_lmem_swapping@parallel-random-engines.html
- bat-adlm-1: NOTRUN -> [SKIP][39] ([i915#4613]) +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@gem_lmem_swapping@parallel-random-engines.html
- bat-rplp-1: NOTRUN -> [SKIP][40] ([i915#4613]) +3 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@gem_lmem_swapping@parallel-random-engines.html
- fi-rkl-11600: NOTRUN -> [SKIP][41] ([i915#4613]) +3 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@gem_lmem_swapping@parallel-random-engines.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][42] ([i915#4613]) +3 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050: NOTRUN -> [SKIP][43] ([fdo#109271]) +28 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-bsw-n3050/igt@gem_lmem_swapping@random-engines.html
- bat-rpls-1: NOTRUN -> [SKIP][44] ([i915#4613]) +3 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@gem_lmem_swapping@random-engines.html
- bat-adlp-6: NOTRUN -> [SKIP][45] ([i915#4613]) +3 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@gem_lmem_swapping@random-engines.html
- fi-skl-6600u: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#4613]) +3 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-skl-6600u/igt@gem_lmem_swapping@random-engines.html
- bat-adls-5: NOTRUN -> [SKIP][47] ([i915#4613]) +3 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@gem_lmem_swapping@random-engines.html
* igt@gem_lmem_swapping@verify-random:
- fi-cfl-guc: NOTRUN -> [SKIP][48] ([fdo#109271] / [i915#4613]) +3 similar issues
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-guc/igt@gem_lmem_swapping@verify-random.html
- fi-kbl-x1275: NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#4613]) +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-x1275/igt@gem_lmem_swapping@verify-random.html
- fi-cfl-8109u: NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#4613]) +3 similar issues
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-8109u/igt@gem_lmem_swapping@verify-random.html
- bat-rpls-2: NOTRUN -> [SKIP][51] ([i915#4613]) +3 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@gem_lmem_swapping@verify-random.html
- fi-kbl-guc: NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#4613]) +3 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-guc/igt@gem_lmem_swapping@verify-random.html
- bat-jsl-1: NOTRUN -> [SKIP][53] ([i915#4613]) +3 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@gem_lmem_swapping@verify-random.html
* igt@gem_mmap@basic:
- bat-dg1-5: NOTRUN -> [SKIP][54] ([i915#4083])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@gem_mmap@basic.html
- bat-atsm-1: NOTRUN -> [SKIP][55] ([i915#4083])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@gem_mmap@basic.html
- bat-dg1-7: NOTRUN -> [SKIP][56] ([i915#4083])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@gem_mmap@basic.html
- bat-dg2-9: NOTRUN -> [SKIP][57] ([i915#4083])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@gem_mmap@basic.html
- bat-dg2-11: NOTRUN -> [SKIP][58] ([i915#4083])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@gem_mmap@basic.html
- bat-dg2-8: NOTRUN -> [SKIP][59] ([i915#4083])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@gem_mmap@basic.html
- bat-dg1-6: NOTRUN -> [SKIP][60] ([i915#4083])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@gem_mmap@basic.html
* igt@gem_mmap_gtt@basic:
- bat-dg2-9: NOTRUN -> [SKIP][61] ([i915#4077]) +2 similar issues
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@gem_mmap_gtt@basic.html
- bat-dg2-8: NOTRUN -> [SKIP][62] ([i915#4077]) +2 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@gem_mmap_gtt@basic.html
* igt@gem_render_tiled_blits@basic:
- bat-dg1-6: NOTRUN -> [SKIP][63] ([i915#4079]) +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@gem_render_tiled_blits@basic.html
- bat-dg2-9: NOTRUN -> [SKIP][64] ([i915#4079]) +1 similar issue
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-dg1-6: NOTRUN -> [SKIP][65] ([i915#4077]) +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@gem_tiled_fence_blits@basic.html
- bat-dg1-5: NOTRUN -> [SKIP][66] ([i915#4077]) +2 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@gem_tiled_fence_blits@basic.html
- bat-atsm-1: NOTRUN -> [SKIP][67] ([i915#4077]) +2 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@gem_tiled_fence_blits@basic.html
- bat-dg1-7: NOTRUN -> [SKIP][68] ([i915#4077]) +2 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@gem_tiled_fence_blits@basic.html
- bat-dg2-11: NOTRUN -> [SKIP][69] ([i915#4077]) +2 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-adlp-6: NOTRUN -> [SKIP][70] ([i915#3282])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@gem_tiled_pread_basic.html
- fi-rkl-11600: NOTRUN -> [SKIP][71] ([i915#3282])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@gem_tiled_pread_basic.html
- bat-adls-5: NOTRUN -> [SKIP][72] ([i915#3282])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@gem_tiled_pread_basic.html
- bat-dg1-5: NOTRUN -> [SKIP][73] ([i915#4079]) +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-atsm-1: NOTRUN -> [SKIP][74] ([i915#4079]) +1 similar issue
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@gem_tiled_pread_basic.html
- bat-dg1-7: NOTRUN -> [SKIP][75] ([i915#4079]) +1 similar issue
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@gem_tiled_pread_basic.html
- bat-adlp-9: NOTRUN -> [SKIP][76] ([i915#3282])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@gem_tiled_pread_basic.html
- bat-dg2-11: NOTRUN -> [SKIP][77] ([i915#4079]) +1 similar issue
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@gem_tiled_pread_basic.html
- bat-adln-1: NOTRUN -> [SKIP][78] ([i915#3282])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@gem_tiled_pread_basic.html
- bat-dg2-8: NOTRUN -> [SKIP][79] ([i915#4079]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@gem_tiled_pread_basic.html
- bat-adlm-1: NOTRUN -> [SKIP][80] ([i915#3282])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@gem_tiled_pread_basic.html
- bat-rplp-1: NOTRUN -> [SKIP][81] ([i915#3282])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@gem_tiled_pread_basic.html
- bat-rpls-2: NOTRUN -> [SKIP][82] ([i915#3282])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@gem_tiled_pread_basic.html
- bat-rpls-1: NOTRUN -> [SKIP][83] ([i915#3282])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- bat-dg2-8: NOTRUN -> [SKIP][84] ([i915#5354] / [i915#7561])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@i915_pm_backlight@basic-brightness.html
- bat-adlm-1: NOTRUN -> [SKIP][85] ([i915#7561])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@i915_pm_backlight@basic-brightness.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][86] ([i915#7561])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html
- bat-rpls-1: NOTRUN -> [SKIP][87] ([i915#7561])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@i915_pm_backlight@basic-brightness.html
- bat-rpls-2: NOTRUN -> [SKIP][88] ([i915#7561])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@i915_pm_backlight@basic-brightness.html
- bat-adlp-9: NOTRUN -> [SKIP][89] ([i915#7561])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@i915_pm_backlight@basic-brightness.html
- bat-dg1-6: NOTRUN -> [SKIP][90] ([i915#7561])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@i915_pm_backlight@basic-brightness.html
- fi-rkl-11600: NOTRUN -> [SKIP][91] ([i915#7561])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
- bat-dg1-5: NOTRUN -> [SKIP][92] ([i915#7561])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@i915_pm_backlight@basic-brightness.html
- bat-dg1-7: NOTRUN -> [SKIP][93] ([i915#7561])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@i915_pm_backlight@basic-brightness.html
- bat-dg2-9: NOTRUN -> [SKIP][94] ([i915#5354] / [i915#7561])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@i915_pm_backlight@basic-brightness.html
- bat-dg2-11: NOTRUN -> [SKIP][95] ([i915#5354] / [i915#7561])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-elk-e7500: NOTRUN -> [SKIP][96] ([fdo#109271]) +30 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-elk-e7500/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_pm_rpm@module-reload:
- fi-blb-e6850: NOTRUN -> [SKIP][97] ([fdo#109271]) +38 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-blb-e6850/igt@i915_pm_rpm@module-reload.html
* igt@i915_pm_rps@basic-api:
- bat-dg1-7: NOTRUN -> [SKIP][98] ([i915#6621])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@i915_pm_rps@basic-api.html
- bat-rpls-2: NOTRUN -> [SKIP][99] ([i915#6621])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@i915_pm_rps@basic-api.html
- bat-adlp-9: NOTRUN -> [SKIP][100] ([i915#6621])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@i915_pm_rps@basic-api.html
- bat-dg1-6: NOTRUN -> [SKIP][101] ([i915#6621])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@i915_pm_rps@basic-api.html
- bat-adlp-6: NOTRUN -> [SKIP][102] ([i915#6621])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@i915_pm_rps@basic-api.html
- bat-rplp-1: NOTRUN -> [SKIP][103] ([i915#6621])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@i915_pm_rps@basic-api.html
- bat-dg1-5: NOTRUN -> [SKIP][104] ([i915#6621])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@i915_pm_rps@basic-api.html
- bat-atsm-1: NOTRUN -> [SKIP][105] ([i915#6621])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@i915_pm_rps@basic-api.html
- bat-dg2-9: NOTRUN -> [SKIP][106] ([i915#6621])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@i915_pm_rps@basic-api.html
- bat-dg2-11: NOTRUN -> [SKIP][107] ([i915#6621])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@i915_pm_rps@basic-api.html
- bat-adln-1: NOTRUN -> [SKIP][108] ([i915#6621])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@i915_pm_rps@basic-api.html
- bat-dg2-8: NOTRUN -> [SKIP][109] ([i915#6621])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@i915_pm_rps@basic-api.html
- bat-adlm-1: NOTRUN -> [SKIP][110] ([i915#6621])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@i915_pm_rps@basic-api.html
- bat-rpls-1: NOTRUN -> [SKIP][111] ([i915#6621])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@i915_pm_rps@basic-api.html
* igt@i915_selftest@live@execlists:
- fi-bsw-n3050: NOTRUN -> [ABORT][112] ([i915#7911])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][113] ([i915#5334] / [i915#7872])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- bat-rpls-2: NOTRUN -> [DMESG-FAIL][114] ([i915#4258])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][115] ([i915#1886])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][116] ([i915#7913])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-soraka/igt@i915_selftest@live@hangcheck.html
- fi-skl-guc: NOTRUN -> [DMESG-WARN][117] ([i915#8073])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
- bat-adls-5: NOTRUN -> [DMESG-WARN][118] ([i915#5591])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@reset:
- bat-rpls-1: NOTRUN -> [ABORT][119] ([i915#4983])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@i915_selftest@live@reset.html
* igt@i915_selftest@live@slpc:
- bat-rpls-2: NOTRUN -> [DMESG-FAIL][120] ([i915#6997] / [i915#7913])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@i915_selftest@live@slpc.html
- bat-adln-1: NOTRUN -> [DMESG-FAIL][121] ([i915#6997])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@i915_selftest@live@slpc.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-tgl-1115g4: NOTRUN -> [INCOMPLETE][122] ([i915#7443])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@i915_suspend@basic-s3-without-i915.html
- bat-atsm-1: NOTRUN -> [SKIP][123] ([i915#6645])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@i915_suspend@basic-s3-without-i915.html
- bat-dg2-8: NOTRUN -> [SKIP][124] ([i915#6645])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
- bat-dg1-7: NOTRUN -> [SKIP][125] ([i915#4212]) +7 similar issues
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
- bat-dg2-11: NOTRUN -> [SKIP][126] ([i915#4212]) +7 similar issues
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][127] ([i915#5190])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][128] ([i915#5190])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
- bat-dg2-11: NOTRUN -> [SKIP][129] ([i915#5190])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5: NOTRUN -> [SKIP][130] ([i915#4212]) +7 similar issues
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-9: NOTRUN -> [SKIP][131] ([i915#4215] / [i915#5190])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][132] ([i915#4215] / [i915#5190])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg1-5: NOTRUN -> [SKIP][133] ([i915#4215])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg1-7: NOTRUN -> [SKIP][134] ([i915#4215])
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg2-11: NOTRUN -> [SKIP][135] ([i915#4215] / [i915#5190])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_addfb_basic@basic-y-tiled-legacy.html
- bat-dg1-6: NOTRUN -> [SKIP][136] ([i915#4215])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@kms_addfb_basic@basic-y-tiled-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-9: NOTRUN -> [SKIP][137] ([i915#4212]) +7 similar issues
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
- bat-dg2-8: NOTRUN -> [SKIP][138] ([i915#4212]) +7 similar issues
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_addfb_basic@size-max:
- bat-atsm-1: NOTRUN -> [SKIP][139] ([i915#6077]) +36 similar issues
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_addfb_basic@size-max.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg1-6: NOTRUN -> [SKIP][140] ([i915#4212]) +7 similar issues
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_busy@basic:
- bat-rpls-2: NOTRUN -> [SKIP][141] ([i915#1845]) +15 similar issues
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@kms_busy@basic.html
- bat-dg1-7: NOTRUN -> [SKIP][142] ([i915#1845] / [i915#4303])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_busy@basic.html
* igt@kms_chamelium_edid@dp-edid-read:
- fi-ilk-650: NOTRUN -> [SKIP][143] ([fdo#109271]) +29 similar issues
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-ilk-650/igt@kms_chamelium_edid@dp-edid-read.html
- bat-jsl-1: NOTRUN -> [SKIP][144] ([i915#7828]) +8 similar issues
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@kms_chamelium_edid@dp-edid-read.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][145] ([i915#7828]) +7 similar issues
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@kms_chamelium_edid@dp-edid-read.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- fi-cfl-guc: NOTRUN -> [SKIP][146] ([fdo#109271]) +19 similar issues
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-guc/igt@kms_chamelium_edid@hdmi-edid-read.html
- fi-skl-6600u: NOTRUN -> [SKIP][147] ([fdo#109271]) +14 similar issues
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-skl-6600u/igt@kms_chamelium_edid@hdmi-edid-read.html
* igt@kms_chamelium_frames@dp-crc-fast:
- bat-adlm-1: NOTRUN -> [SKIP][148] ([i915#7828]) +8 similar issues
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@kms_chamelium_frames@dp-crc-fast.html
- bat-rplp-1: NOTRUN -> [SKIP][149] ([i915#7828]) +8 similar issues
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][150] ([fdo#109271]) +16 similar issues
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html
- fi-hsw-4770: NOTRUN -> [SKIP][151] ([fdo#109271]) +20 similar issues
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-hsw-4770/igt@kms_chamelium_frames@hdmi-crc-fast.html
- fi-cfl-8109u: NOTRUN -> [SKIP][152] ([fdo#109271]) +19 similar issues
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-8109u/igt@kms_chamelium_frames@hdmi-crc-fast.html
- bat-adln-1: NOTRUN -> [SKIP][153] ([i915#7828]) +8 similar issues
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@kms_chamelium_frames@hdmi-crc-fast.html
- bat-dg2-8: NOTRUN -> [SKIP][154] ([i915#7828]) +8 similar issues
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-rpls-2: NOTRUN -> [SKIP][155] ([i915#7828]) +8 similar issues
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- bat-adlp-9: NOTRUN -> [SKIP][156] ([i915#7828]) +8 similar issues
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
- bat-dg1-6: NOTRUN -> [SKIP][157] ([i915#7828]) +8 similar issues
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- bat-adlp-6: NOTRUN -> [SKIP][158] ([i915#7828]) +8 similar issues
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@kms_chamelium_hpd@dp-hpd-fast.html
- fi-rkl-11600: NOTRUN -> [SKIP][159] ([i915#7828]) +8 similar issues
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_chamelium_hpd@hdmi-hpd-fast:
- fi-cfl-8700k: NOTRUN -> [SKIP][160] ([fdo#109271]) +19 similar issues
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-cfl-8700k/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
- bat-rpls-1: NOTRUN -> [SKIP][161] ([i915#7828]) +7 similar issues
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@kms_chamelium_hpd@hdmi-hpd-fast.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- bat-adls-5: NOTRUN -> [SKIP][162] ([i915#7828]) +8 similar issues
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@kms_chamelium_hpd@vga-hpd-fast.html
- fi-apl-guc: NOTRUN -> [SKIP][163] ([fdo#109271]) +22 similar issues
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-apl-guc/igt@kms_chamelium_hpd@vga-hpd-fast.html
- bat-dg1-5: NOTRUN -> [SKIP][164] ([i915#7828]) +8 similar issues
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@kms_chamelium_hpd@vga-hpd-fast.html
- bat-dg1-7: NOTRUN -> [SKIP][165] ([i915#7828]) +8 similar issues
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_chamelium_hpd@vga-hpd-fast.html
- bat-jsl-3: NOTRUN -> [SKIP][166] ([i915#7828]) +8 similar issues
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@kms_chamelium_hpd@vga-hpd-fast.html
- bat-dg2-9: NOTRUN -> [SKIP][167] ([i915#7828]) +8 similar issues
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_chamelium_hpd@vga-hpd-fast.html
- bat-dg2-11: NOTRUN -> [SKIP][168] ([i915#7828]) +8 similar issues
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-glk-j4005: NOTRUN -> [SKIP][169] ([fdo#109271]) +19 similar issues
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-glk-j4005/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- bat-adlp-9: NOTRUN -> [SKIP][170] ([i915#4103]) +1 similar issue
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- bat-dg2-11: NOTRUN -> [SKIP][171] ([i915#4103] / [i915#4213]) +1 similar issue
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- bat-dg1-6: NOTRUN -> [SKIP][172] ([i915#4103] / [i915#4213]) +1 similar issue
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- bat-adln-1: NOTRUN -> [SKIP][173] ([i915#4213]) +1 similar issue
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][174] ([i915#4103]) +1 similar issue
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-rplp-1: NOTRUN -> [SKIP][175] ([i915#4103] / [i915#4213]) +1 similar issue
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- fi-rkl-11600: NOTRUN -> [SKIP][176] ([i915#4103]) +1 similar issue
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-adls-5: NOTRUN -> [SKIP][177] ([i915#4103]) +1 similar issue
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-jsl-3: NOTRUN -> [SKIP][178] ([i915#4103]) +1 similar issue
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-dg2-9: NOTRUN -> [SKIP][179] ([i915#4103] / [i915#4213]) +1 similar issue
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-dg2-8: NOTRUN -> [SKIP][180] ([i915#4103] / [i915#4213]) +1 similar issue
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-jsl-1: NOTRUN -> [SKIP][181] ([i915#4103]) +1 similar issue
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-adlp-6: NOTRUN -> [SKIP][182] ([i915#4103]) +1 similar issue
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- bat-dg1-5: NOTRUN -> [SKIP][183] ([i915#4103] / [i915#4213]) +1 similar issue
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- bat-atsm-1: NOTRUN -> [SKIP][184] ([i915#6078]) +19 similar issues
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-rpls-1: NOTRUN -> [SKIP][185] ([i915#1845]) +14 similar issues
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
- bat-dg1-7: NOTRUN -> [SKIP][186] ([i915#1845]) +7 similar issues
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size:
- bat-adlm-1: NOTRUN -> [SKIP][187] ([i915#1845]) +15 similar issues
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@kms_cursor_legacy@basic-flip-after-cursor-varying-size.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- fi-kbl-guc: NOTRUN -> [SKIP][188] ([fdo#109271] / [i915#1845]) +8 similar issues
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-guc/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
* igt@kms_flip@basic-flip-vs-dpms:
- bat-rpls-2: NOTRUN -> [SKIP][189] ([i915#3637]) +3 similar issues
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@kms_flip@basic-flip-vs-dpms.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-rpls-1: NOTRUN -> [SKIP][190] ([i915#3637]) +3 similar issues
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- bat-dg1-7: NOTRUN -> [SKIP][191] ([i915#3637] / [i915#4078]) +2 similar issues
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_flip@basic-flip-vs-wf_vblank.html
* igt@kms_flip@basic-plain-flip:
- bat-atsm-1: NOTRUN -> [SKIP][192] ([i915#6166]) +3 similar issues
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_flip@basic-plain-flip.html
- bat-adlm-1: NOTRUN -> [SKIP][193] ([i915#3637]) +3 similar issues
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@kms_flip@basic-plain-flip.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adln-1: NOTRUN -> [SKIP][194] ([fdo#109285])
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@kms_force_connector_basic@force-load-detect.html
- bat-adlm-1: NOTRUN -> [SKIP][195] ([fdo#109285])
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@kms_force_connector_basic@force-load-detect.html
- bat-rplp-1: NOTRUN -> [SKIP][196] ([fdo#109285])
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@kms_force_connector_basic@force-load-detect.html
- fi-rkl-11600: NOTRUN -> [SKIP][197] ([fdo#109285] / [i915#4098])
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][198] ([fdo#109285])
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html
- bat-jsl-3: NOTRUN -> [SKIP][199] ([fdo#109285])
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg2-9: NOTRUN -> [SKIP][200] ([fdo#109285])
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_force_connector_basic@force-load-detect.html
- bat-rpls-2: NOTRUN -> [SKIP][201] ([fdo#109285])
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg2-8: NOTRUN -> [SKIP][202] ([fdo#109285])
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_force_connector_basic@force-load-detect.html
- bat-jsl-1: NOTRUN -> [SKIP][203] ([fdo#109285])
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@kms_force_connector_basic@force-load-detect.html
- bat-rpls-1: NOTRUN -> [SKIP][204] ([fdo#109285])
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@kms_force_connector_basic@force-load-detect.html
- bat-adlp-6: NOTRUN -> [SKIP][205] ([fdo#109285])
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@kms_force_connector_basic@force-load-detect.html
- bat-adls-5: NOTRUN -> [SKIP][206] ([fdo#109285])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg1-5: NOTRUN -> [SKIP][207] ([fdo#109285])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg1-7: NOTRUN -> [SKIP][208] ([fdo#109285])
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_force_connector_basic@force-load-detect.html
- bat-adlp-9: NOTRUN -> [SKIP][209] ([fdo#109285])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg2-11: NOTRUN -> [SKIP][210] ([fdo#109285])
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_force_connector_basic@force-load-detect.html
- bat-dg1-6: NOTRUN -> [SKIP][211] ([fdo#109285])
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-atsm-1: NOTRUN -> [SKIP][212] ([i915#6093]) +3 similar issues
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-9: NOTRUN -> [SKIP][213] ([i915#5274])
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-11: NOTRUN -> [SKIP][214] ([i915#5274])
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_force_connector_basic@prune-stale-modes.html
- bat-dg2-8: NOTRUN -> [SKIP][215] ([i915#5274])
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@basic:
- bat-rpls-2: NOTRUN -> [SKIP][216] ([i915#1849])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@kms_frontbuffer_tracking@basic.html
- bat-adlm-1: NOTRUN -> [SKIP][217] ([i915#1849])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@kms_frontbuffer_tracking@basic.html
- bat-rpls-1: NOTRUN -> [SKIP][218] ([i915#1849])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@kms_frontbuffer_tracking@basic.html
- bat-dg1-7: NOTRUN -> [SKIP][219] ([i915#4078]) +1 similar issue
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-atsm-1: NOTRUN -> [SKIP][220] ([i915#1836]) +6 similar issues
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-dg1-7: NOTRUN -> [SKIP][221] ([i915#1845] / [i915#4078]) +6 similar issues
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_pipe_crc_basic@nonblocking-crc.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][222] ([i915#5354]) +2 similar issues
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_pipe_crc_basic@read-crc:
- fi-kbl-x1275: NOTRUN -> [SKIP][223] ([fdo#109271]) +45 similar issues
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-x1275/igt@kms_pipe_crc_basic@read-crc.html
* igt@kms_pipe_crc_basic@suspend-read-crc:
- fi-kbl-guc: NOTRUN -> [SKIP][224] ([fdo#109271]) +35 similar issues
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-guc/igt@kms_pipe_crc_basic@suspend-read-crc.html
* igt@kms_prop_blob@basic:
- bat-atsm-1: NOTRUN -> [SKIP][225] ([i915#7357])
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_prop_blob@basic.html
* igt@kms_psr@cursor_plane_move:
- fi-kbl-7567u: NOTRUN -> [SKIP][226] ([fdo#109271]) +15 similar issues
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-kbl-7567u/igt@kms_psr@cursor_plane_move.html
- fi-ivb-3770: NOTRUN -> [SKIP][227] ([fdo#109271]) +27 similar issues
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-ivb-3770/igt@kms_psr@cursor_plane_move.html
- bat-dg2-8: NOTRUN -> [SKIP][228] ([i915#1072]) +3 similar issues
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_psr@cursor_plane_move.html
- bat-adlm-1: NOTRUN -> [SKIP][229] ([i915#1072]) +3 similar issues
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@kms_psr@cursor_plane_move.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][230] ([fdo#110189]) +3 similar issues
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@kms_psr@cursor_plane_move.html
- bat-rpls-1: NOTRUN -> [SKIP][231] ([i915#1072]) +3 similar issues
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@kms_psr@cursor_plane_move.html
* igt@kms_psr@primary_page_flip:
- fi-pnv-d510: NOTRUN -> [SKIP][232] ([fdo#109271]) +38 similar issues
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-pnv-d510/igt@kms_psr@primary_page_flip.html
- bat-rplp-1: NOTRUN -> [SKIP][233] ([i915#1072]) +3 similar issues
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@kms_psr@primary_page_flip.html
* igt@kms_psr@sprite_plane_onoff:
- bat-rpls-2: NOTRUN -> [SKIP][234] ([i915#1072]) +3 similar issues
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@kms_psr@sprite_plane_onoff.html
- bat-adlp-9: NOTRUN -> [SKIP][235] ([i915#1072]) +3 similar issues
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@kms_psr@sprite_plane_onoff.html
- bat-dg1-6: NOTRUN -> [SKIP][236] ([i915#1072] / [i915#4078]) +3 similar issues
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@kms_psr@sprite_plane_onoff.html
- bat-jsl-1: NOTRUN -> [FAIL][237] ([i915#132] / [i915#3003]) +3 similar issues
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@kms_psr@sprite_plane_onoff.html
- fi-rkl-11600: NOTRUN -> [SKIP][238] ([i915#1072]) +3 similar issues
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@kms_psr@sprite_plane_onoff.html
- bat-dg1-5: NOTRUN -> [SKIP][239] ([i915#1072] / [i915#4078]) +3 similar issues
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@kms_psr@sprite_plane_onoff.html
- bat-atsm-1: NOTRUN -> [SKIP][240] ([i915#1072]) +3 similar issues
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_psr@sprite_plane_onoff.html
- bat-dg1-7: NOTRUN -> [SKIP][241] ([i915#1072]) +3 similar issues
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_psr@sprite_plane_onoff.html
- bat-jsl-3: NOTRUN -> [FAIL][242] ([i915#132] / [i915#3003]) +3 similar issues
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
- bat-dg2-9: NOTRUN -> [SKIP][243] ([i915#1072]) +3 similar issues
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_psr@sprite_plane_onoff.html
- bat-dg2-11: NOTRUN -> [SKIP][244] ([i915#1072]) +3 similar issues
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_psr@sprite_plane_onoff.html
- fi-hsw-4770: NOTRUN -> [SKIP][245] ([fdo#109271] / [i915#1072]) +3 similar issues
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-adlp-9: NOTRUN -> [SKIP][246] ([i915#3555] / [i915#4579])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@kms_setmode@basic-clone-single-crtc.html
- fi-skl-guc: NOTRUN -> [SKIP][247] ([fdo#109271]) +19 similar issues
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-skl-guc/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg1-6: NOTRUN -> [SKIP][248] ([i915#3555])
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@kms_setmode@basic-clone-single-crtc.html
- bat-adlp-6: NOTRUN -> [SKIP][249] ([i915#3555] / [i915#4579])
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@kms_setmode@basic-clone-single-crtc.html
- bat-rplp-1: NOTRUN -> [SKIP][250] ([i915#3555] / [i915#4579])
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
- fi-rkl-11600: NOTRUN -> [SKIP][251] ([i915#3555] / [i915#4098])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
- bat-adls-5: NOTRUN -> [SKIP][252] ([i915#3555])
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg1-5: NOTRUN -> [SKIP][253] ([i915#3555])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@kms_setmode@basic-clone-single-crtc.html
- bat-atsm-1: NOTRUN -> [SKIP][254] ([i915#6094])
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@kms_setmode@basic-clone-single-crtc.html
- bat-jsl-3: NOTRUN -> [SKIP][255] ([i915#3555] / [i915#4579])
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg2-9: NOTRUN -> [SKIP][256] ([i915#3555] / [i915#4579])
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg2-11: NOTRUN -> [SKIP][257] ([i915#3555] / [i915#4579])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@kms_setmode@basic-clone-single-crtc.html
- bat-adln-1: NOTRUN -> [SKIP][258] ([i915#3555] / [i915#4579])
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg2-8: NOTRUN -> [SKIP][259] ([i915#3555] / [i915#4579])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@kms_setmode@basic-clone-single-crtc.html
- bat-adlm-1: NOTRUN -> [SKIP][260] ([i915#3555])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@kms_setmode@basic-clone-single-crtc.html
- bat-jsl-1: NOTRUN -> [SKIP][261] ([i915#3555] / [i915#4579])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@kms_setmode@basic-clone-single-crtc.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][262] ([i915#3555])
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@kms_setmode@basic-clone-single-crtc.html
- bat-rpls-1: NOTRUN -> [SKIP][263] ([i915#3555])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@kms_setmode@basic-clone-single-crtc.html
- bat-dg1-7: NOTRUN -> [SKIP][264] ([i915#3555])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@kms_setmode@basic-clone-single-crtc.html
- bat-rpls-2: NOTRUN -> [SKIP][265] ([i915#3555])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-atsm-1: NOTRUN -> [SKIP][266] ([fdo#109295] / [i915#6078])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@prime_vgem@basic-fence-flip.html
- bat-dg1-7: NOTRUN -> [SKIP][267] ([i915#1845] / [i915#3708])
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@prime_vgem@basic-fence-flip.html
- bat-dg2-9: NOTRUN -> [SKIP][268] ([i915#3708])
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@prime_vgem@basic-fence-flip.html
- bat-dg2-11: NOTRUN -> [SKIP][269] ([i915#3708])
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@prime_vgem@basic-fence-flip.html
- bat-dg2-8: NOTRUN -> [SKIP][270] ([i915#3708])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@prime_vgem@basic-fence-flip.html
- bat-adlm-1: NOTRUN -> [SKIP][271] ([i915#1845] / [i915#3708])
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@prime_vgem@basic-fence-flip.html
- bat-rpls-1: NOTRUN -> [SKIP][272] ([fdo#109295] / [i915#1845] / [i915#3708])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@prime_vgem@basic-fence-flip.html
- bat-rpls-2: NOTRUN -> [SKIP][273] ([fdo#109295] / [i915#1845] / [i915#3708])
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-atsm-1: NOTRUN -> [SKIP][274] ([fdo#109295] / [i915#4077]) +1 similar issue
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@prime_vgem@basic-fence-mmap.html
- bat-dg1-7: NOTRUN -> [SKIP][275] ([i915#3708] / [i915#4077]) +1 similar issue
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@prime_vgem@basic-fence-mmap.html
- bat-dg2-11: NOTRUN -> [SKIP][276] ([i915#3708] / [i915#4077]) +1 similar issue
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@prime_vgem@basic-fence-mmap.html
- bat-dg2-8: NOTRUN -> [SKIP][277] ([i915#3708] / [i915#4077]) +1 similar issue
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@prime_vgem@basic-fence-mmap.html
- bat-dg2-9: NOTRUN -> [SKIP][278] ([i915#3708] / [i915#4077]) +1 similar issue
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-fence-read:
- bat-rpls-2: NOTRUN -> [SKIP][279] ([fdo#109295] / [i915#3708]) +3 similar issues
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-2/igt@prime_vgem@basic-fence-read.html
- bat-adlp-9: NOTRUN -> [SKIP][280] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@prime_vgem@basic-fence-read.html
- bat-adlp-6: NOTRUN -> [SKIP][281] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@prime_vgem@basic-fence-read.html
- bat-dg1-5: NOTRUN -> [SKIP][282] ([i915#3708]) +3 similar issues
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@prime_vgem@basic-fence-read.html
- bat-dg1-7: NOTRUN -> [SKIP][283] ([i915#3708]) +2 similar issues
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-gtt:
- bat-dg1-5: NOTRUN -> [SKIP][284] ([i915#3708] / [i915#4077]) +1 similar issue
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@prime_vgem@basic-gtt.html
- bat-dg1-6: NOTRUN -> [SKIP][285] ([i915#3708] / [i915#4077]) +1 similar issue
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@basic-read:
- bat-dg2-11: NOTRUN -> [SKIP][286] ([i915#3291] / [i915#3708]) +2 similar issues
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@prime_vgem@basic-read.html
- bat-dg1-6: NOTRUN -> [SKIP][287] ([i915#3708]) +3 similar issues
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@prime_vgem@basic-read.html
- bat-rplp-1: NOTRUN -> [SKIP][288] ([i915#3708]) +3 similar issues
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rplp-1/igt@prime_vgem@basic-read.html
- fi-rkl-11600: NOTRUN -> [SKIP][289] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@prime_vgem@basic-read.html
- bat-adls-5: NOTRUN -> [SKIP][290] ([fdo#109295] / [i915#3291]) +2 similar issues
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- bat-jsl-3: NOTRUN -> [SKIP][291] ([fdo#109295] / [i915#3301])
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-3/igt@prime_vgem@basic-userptr.html
- bat-dg2-9: NOTRUN -> [SKIP][292] ([i915#3708] / [i915#4873])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@prime_vgem@basic-userptr.html
- bat-adln-1: NOTRUN -> [SKIP][293] ([fdo#109295] / [i915#3301])
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@prime_vgem@basic-userptr.html
- bat-dg2-8: NOTRUN -> [SKIP][294] ([i915#3708] / [i915#4873])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@prime_vgem@basic-userptr.html
- bat-jsl-1: NOTRUN -> [SKIP][295] ([fdo#109295] / [i915#3301])
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-jsl-1/igt@prime_vgem@basic-userptr.html
- fi-tgl-1115g4: NOTRUN -> [SKIP][296] ([fdo#109295] / [i915#3301])
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html
- bat-adlp-6: NOTRUN -> [SKIP][297] ([fdo#109295] / [i915#3301] / [i915#3708])
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-6/igt@prime_vgem@basic-userptr.html
- bat-dg1-5: NOTRUN -> [SKIP][298] ([i915#3708] / [i915#4873])
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-5/igt@prime_vgem@basic-userptr.html
- bat-dg1-7: NOTRUN -> [SKIP][299] ([i915#3708] / [i915#4873])
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-7/igt@prime_vgem@basic-userptr.html
- bat-adlp-9: NOTRUN -> [SKIP][300] ([fdo#109295] / [i915#3301] / [i915#3708])
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlp-9/igt@prime_vgem@basic-userptr.html
- bat-dg2-11: NOTRUN -> [SKIP][301] ([i915#3708] / [i915#4873])
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-11/igt@prime_vgem@basic-userptr.html
- bat-dg1-6: NOTRUN -> [SKIP][302] ([i915#3708] / [i915#4873])
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg1-6/igt@prime_vgem@basic-userptr.html
- fi-rkl-11600: NOTRUN -> [SKIP][303] ([fdo#109295] / [i915#3301] / [i915#3708])
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/fi-rkl-11600/igt@prime_vgem@basic-userptr.html
- bat-adls-5: NOTRUN -> [SKIP][304] ([fdo#109295] / [i915#3301])
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adls-5/igt@prime_vgem@basic-userptr.html
* igt@prime_vgem@basic-write:
- bat-atsm-1: NOTRUN -> [SKIP][305] ([fdo#109295]) +3 similar issues
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@prime_vgem@basic-write.html
- bat-dg2-9: NOTRUN -> [SKIP][306] ([i915#3291] / [i915#3708]) +2 similar issues
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-9/igt@prime_vgem@basic-write.html
- bat-adln-1: NOTRUN -> [SKIP][307] ([fdo#109295] / [i915#3291]) +2 similar issues
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adln-1/igt@prime_vgem@basic-write.html
- bat-dg2-8: NOTRUN -> [SKIP][308] ([i915#3291] / [i915#3708]) +2 similar issues
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-dg2-8/igt@prime_vgem@basic-write.html
- bat-adlm-1: NOTRUN -> [SKIP][309] ([i915#3708]) +3 similar issues
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-adlm-1/igt@prime_vgem@basic-write.html
- bat-rpls-1: NOTRUN -> [SKIP][310] ([fdo#109295] / [i915#3708]) +3 similar issues
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-rpls-1/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@i915_module_load@load:
- bat-atsm-1: [ABORT][311] ([i915#8219]) -> [PASS][312]
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/bat-atsm-1/igt@i915_module_load@load.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/bat-atsm-1/igt@i915_module_load@load.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3003]: https://gitlab.freedesktop.org/drm/intel/issues/3003
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4303]: https://gitlab.freedesktop.org/drm/intel/issues/4303
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
[i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
[i915#6093]: https://gitlab.freedesktop.org/drm/intel/issues/6093
[i915#6094]: https://gitlab.freedesktop.org/drm/intel/issues/6094
[i915#6166]: https://gitlab.freedesktop.org/drm/intel/issues/6166
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7357]: https://gitlab.freedesktop.org/drm/intel/issues/7357
[i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#8073]: https://gitlab.freedesktop.org/drm/intel/issues/8073
[i915#8219]: https://gitlab.freedesktop.org/drm/intel/issues/8219
Build changes
-------------
* Linux: CI_DRM_12805 -> Patchwork_114608v1
CI-20190529: 20190529
CI_DRM_12805: c1dbd5b5c8fdb5efd37a5a5234469b293c89a358 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7179: fcbbb6ab645cdbd7545c3f96d7b7df7674e620be @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v1: c1dbd5b5c8fdb5efd37a5a5234469b293c89a358 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
4b0009ea15e8 drm/i915: avoid flush_scheduled_work() usage
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/index.html
[-- Attachment #2: Type: text/html, Size: 98471 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH] drm/i915: avoid flush_scheduled_work() usage
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
@ 2023-03-03 12:49 ` Tetsuo Handa
-1 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-03 12:49 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On 2023/03/03 19:11, Tetsuo Handa wrote:
> @@ -79,6 +81,7 @@ static int __init i915_init(void)
> {
> int err, i;
>
> + i915_wq = alloc_workqueue("i915", 0, 0);
Oops. I forgot to add
if (!i915_wq)
return -ENOMEM;
here. But I'd like to wait for your response for a while before submitting v2 patch.
> for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
> err = init_funcs[i].init();
> if (err < 0) {
> @@ -86,6 +89,7 @@ static int __init i915_init(void)
> if (init_funcs[i].exit)
> init_funcs[i].exit();
> }
> + destroy_workqueue(i915_wq);
> return err;
> } else if (err > 0) {
> /*
> @@ -113,6 +117,7 @@ static void __exit i915_exit(void)
> if (init_funcs[i].exit)
> init_funcs[i].exit();
> }
> + destroy_workqueue(i915_wq);
> }
>
> module_init(i915_init);
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: avoid flush_scheduled_work() usage
@ 2023-03-03 12:49 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-03 12:49 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On 2023/03/03 19:11, Tetsuo Handa wrote:
> @@ -79,6 +81,7 @@ static int __init i915_init(void)
> {
> int err, i;
>
> + i915_wq = alloc_workqueue("i915", 0, 0);
Oops. I forgot to add
if (!i915_wq)
return -ENOMEM;
here. But I'd like to wait for your response for a while before submitting v2 patch.
> for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
> err = init_funcs[i].init();
> if (err < 0) {
> @@ -86,6 +89,7 @@ static int __init i915_init(void)
> if (init_funcs[i].exit)
> init_funcs[i].exit();
> }
> + destroy_workqueue(i915_wq);
> return err;
> } else if (err > 0) {
> /*
> @@ -113,6 +117,7 @@ static void __exit i915_exit(void)
> if (init_funcs[i].exit)
> init_funcs[i].exit();
> }
> + destroy_workqueue(i915_wq);
> }
>
> module_init(i915_init);
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH] drm/i915: avoid flush_scheduled_work() usage
2023-03-03 12:49 ` [Intel-gfx] " Tetsuo Handa
@ 2023-03-06 11:05 ` Jani Nikula
-1 siblings, 0 replies; 43+ messages in thread
From: Jani Nikula @ 2023-03-06 11:05 UTC (permalink / raw)
To: Tetsuo Handa, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On Fri, 03 Mar 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
> On 2023/03/03 19:11, Tetsuo Handa wrote:
>> @@ -79,6 +81,7 @@ static int __init i915_init(void)
>> {
>> int err, i;
>>
>> + i915_wq = alloc_workqueue("i915", 0, 0);
>
> Oops. I forgot to add
>
> if (!i915_wq)
> return -ENOMEM;
>
> here. But I'd like to wait for your response for a while before submitting v2 patch.
Looks like accounting for every schedule_work() and friends that we have
is pretty difficult at this point, so I agree going for a local
workqueue and flushing that is probably the way to go. Work specific
cleanups can follow.
However, we really don't want to add new module globals, not for this,
not for anything. So for most things it would have to be i915 device
specific. And that, in turn, would have to be two workqueues, one for
display, one for other stuff. Don't want to mix the two.
BR,
Jani.
>
>
>> for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
>> err = init_funcs[i].init();
>> if (err < 0) {
>> @@ -86,6 +89,7 @@ static int __init i915_init(void)
>> if (init_funcs[i].exit)
>> init_funcs[i].exit();
>> }
>> + destroy_workqueue(i915_wq);
>> return err;
>> } else if (err > 0) {
>> /*
>> @@ -113,6 +117,7 @@ static void __exit i915_exit(void)
>> if (init_funcs[i].exit)
>> init_funcs[i].exit();
>> }
>> + destroy_workqueue(i915_wq);
>> }
>>
>> module_init(i915_init);
>
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: avoid flush_scheduled_work() usage
@ 2023-03-06 11:05 ` Jani Nikula
0 siblings, 0 replies; 43+ messages in thread
From: Jani Nikula @ 2023-03-06 11:05 UTC (permalink / raw)
To: Tetsuo Handa, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On Fri, 03 Mar 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
> On 2023/03/03 19:11, Tetsuo Handa wrote:
>> @@ -79,6 +81,7 @@ static int __init i915_init(void)
>> {
>> int err, i;
>>
>> + i915_wq = alloc_workqueue("i915", 0, 0);
>
> Oops. I forgot to add
>
> if (!i915_wq)
> return -ENOMEM;
>
> here. But I'd like to wait for your response for a while before submitting v2 patch.
Looks like accounting for every schedule_work() and friends that we have
is pretty difficult at this point, so I agree going for a local
workqueue and flushing that is probably the way to go. Work specific
cleanups can follow.
However, we really don't want to add new module globals, not for this,
not for anything. So for most things it would have to be i915 device
specific. And that, in turn, would have to be two workqueues, one for
display, one for other stuff. Don't want to mix the two.
BR,
Jani.
>
>
>> for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
>> err = init_funcs[i].init();
>> if (err < 0) {
>> @@ -86,6 +89,7 @@ static int __init i915_init(void)
>> if (init_funcs[i].exit)
>> init_funcs[i].exit();
>> }
>> + destroy_workqueue(i915_wq);
>> return err;
>> } else if (err > 0) {
>> /*
>> @@ -113,6 +117,7 @@ static void __exit i915_exit(void)
>> if (init_funcs[i].exit)
>> init_funcs[i].exit();
>> }
>> + destroy_workqueue(i915_wq);
>> }
>>
>> module_init(i915_init);
>
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH] drm/i915: avoid flush_scheduled_work() usage
2023-03-06 11:05 ` [Intel-gfx] " Jani Nikula
@ 2023-03-06 11:17 ` Tetsuo Handa
-1 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-06 11:17 UTC (permalink / raw)
To: Jani Nikula, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On 2023/03/06 20:05, Jani Nikula wrote:
> On Fri, 03 Mar 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
>> On 2023/03/03 19:11, Tetsuo Handa wrote:
>>> @@ -79,6 +81,7 @@ static int __init i915_init(void)
>>> {
>>> int err, i;
>>>
>>> + i915_wq = alloc_workqueue("i915", 0, 0);
>>
>> Oops. I forgot to add
>>
>> if (!i915_wq)
>> return -ENOMEM;
>>
>> here. But I'd like to wait for your response for a while before submitting v2 patch.
>
> Looks like accounting for every schedule_work() and friends that we have
> is pretty difficult at this point, so I agree going for a local
> workqueue and flushing that is probably the way to go. Work specific
> cleanups can follow.
>
> However, we really don't want to add new module globals, not for this,
> not for anything. So for most things it would have to be i915 device
> specific. And that, in turn, would have to be two workqueues, one for
> display, one for other stuff. Don't want to mix the two.
>
Thank you for responding. Please go that way.
(I'm not familiar enough to propose a patch.)
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915: avoid flush_scheduled_work() usage
@ 2023-03-06 11:17 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-06 11:17 UTC (permalink / raw)
To: Jani Nikula, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On 2023/03/06 20:05, Jani Nikula wrote:
> On Fri, 03 Mar 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
>> On 2023/03/03 19:11, Tetsuo Handa wrote:
>>> @@ -79,6 +81,7 @@ static int __init i915_init(void)
>>> {
>>> int err, i;
>>>
>>> + i915_wq = alloc_workqueue("i915", 0, 0);
>>
>> Oops. I forgot to add
>>
>> if (!i915_wq)
>> return -ENOMEM;
>>
>> here. But I'd like to wait for your response for a while before submitting v2 patch.
>
> Looks like accounting for every schedule_work() and friends that we have
> is pretty difficult at this point, so I agree going for a local
> workqueue and flushing that is probably the way to go. Work specific
> cleanups can follow.
>
> However, we really don't want to add new module globals, not for this,
> not for anything. So for most things it would have to be i915 device
> specific. And that, in turn, would have to be two workqueues, one for
> display, one for other stuff. Don't want to mix the two.
>
Thank you for responding. Please go that way.
(I'm not familiar enough to propose a patch.)
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: avoid flush_scheduled_work() usage
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (3 preceding siblings ...)
(?)
@ 2023-03-06 18:56 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-03-06 18:56 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 15638 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage
URL : https://patchwork.freedesktop.org/series/114608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12805_full -> Patchwork_114608v1_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_114608v1_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_114608v1_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 9)
------------------------------
Missing (1): shard-tglu-10
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114608v1_full:
### IGT changes ###
#### Warnings ####
* igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_mc_ccs:
- shard-apl: [SKIP][1] ([fdo#109271]) -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-apl2/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_mc_ccs.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-apl2/igt@kms_ccs@pipe-b-bad-pixel-format-4_tiled_dg2_mc_ccs.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@sw_sync@alloc_merge_fence:
- {shard-tglu}: NOTRUN -> [ABORT][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-tglu-1/igt@sw_sync@alloc_merge_fence.html
Known issues
------------
Here are the changes found in Patchwork_114608v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rc6_residency@rc6-idle@vecs0:
- shard-glk: [PASS][4] -> [DMESG-WARN][5] ([i915#118])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-glk6/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-glk2/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [PASS][6] -> [DMESG-FAIL][7] ([i915#5334])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-apl4/igt@i915_selftest@live@gt_heartbeat.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-apl2/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_atomic@plane-primary-overlay-mutable-zpos:
- shard-glk: NOTRUN -> [SKIP][8] ([fdo#109271]) +7 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-glk2/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#3886])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-apl3/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_color@ctm-green-to-red@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][10] ([fdo#109271]) +12 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-snb1/igt@kms_color@ctm-green-to-red@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [PASS][11] -> [FAIL][12] ([i915#2346])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-apl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#658])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-apl3/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_setmode@basic@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [FAIL][14] ([i915#5465]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-snb1/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html
* igt@vc4/vc4_perfmon@create-single-perfmon:
- shard-apl: NOTRUN -> [SKIP][15] ([fdo#109271]) +25 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-apl3/igt@vc4/vc4_perfmon@create-single-perfmon.html
#### Possible fixes ####
* igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
- {shard-rkl}: [FAIL][16] ([i915#7742]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-rkl-4/igt@drm_fdinfo@most-busy-idle-check-all@rcs0.html
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-tglu}: [FAIL][18] ([i915#6268]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-tglu-3/igt@gem_ctx_exec@basic-nohangcheck.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-tglu-7/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@i915_pm_dc@dc9-dpms:
- {shard-tglu}: [SKIP][20] ([i915#4281]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-tglu-5/igt@i915_pm_dc@dc9-dpms.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-tglu-4/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- {shard-dg1}: [SKIP][22] ([i915#1397]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-dg1-17/igt@i915_pm_rpm@modeset-lpsp-stress.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-dg1-14/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-apl: [FAIL][24] ([i915#2346]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [ABORT][26] ([i915#180]) -> [PASS][27] +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12805/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/shard-apl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4036]: https://gitlab.freedesktop.org/drm/intel/issues/4036
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
[i915#4884]: https://gitlab.freedesktop.org/drm/intel/issues/4884
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5431]: https://gitlab.freedesktop.org/drm/intel/issues/5431
[i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
[i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7582]: https://gitlab.freedesktop.org/drm/intel/issues/7582
[i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7949]: https://gitlab.freedesktop.org/drm/intel/issues/7949
[i915#7957]: https://gitlab.freedesktop.org/drm/intel/issues/7957
[i915#8152]: https://gitlab.freedesktop.org/drm/intel/issues/8152
[i915#8155]: https://gitlab.freedesktop.org/drm/intel/issues/8155
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
Build changes
-------------
* Linux: CI_DRM_12805 -> Patchwork_114608v1
* Piglit: None -> piglit_4509
CI-20190529: 20190529
CI_DRM_12805: c1dbd5b5c8fdb5efd37a5a5234469b293c89a358 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7179: fcbbb6ab645cdbd7545c3f96d7b7df7674e620be @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v1: c1dbd5b5c8fdb5efd37a5a5234469b293c89a358 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v1/index.html
[-- Attachment #2: Type: text/html, Size: 9756 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
@ 2023-03-14 11:21 ` Tetsuo Handa
-1 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-14 11:21 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
Now that i915 is the last flush_scheduled_work() user, for now let's
start with blind conversion inside the whole drivers/gpu/drm/i915/
directory. Jani Nikula wants to use two workqueues in order to avoid
adding new module globals, but I'm not familiar enough to audit and
split into two workqueues.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
24 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 410c84fd905c..2ae7b9ed559e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7605,7 +7605,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
@@ -8833,7 +8833,7 @@ void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8e16745275f6..a90abc28e16f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5085,7 +5085,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 3d3efcf02011..4449b21ad9bd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1123,7 +1123,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index b507ff944864..ab8666e19613 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1599,7 +1599,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 673bcdfb7ff6..9be091d12685 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -679,7 +679,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 2984d2810e42..72c38d036948 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1029,7 +1029,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2128,11 +2128,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2369,7 +2369,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2444,7 +2444,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2461,7 +2461,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2579,5 +2579,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 907ab7526cb4..4ca33e9aad1f 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -211,7 +211,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -338,7 +338,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -438,7 +438,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -569,7 +569,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -679,7 +679,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -707,7 +707,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 24b5b12f7732..95af3df6b530 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -881,7 +881,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 44610b20cd29..c60ef4e77d64 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -257,7 +257,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2313,7 +2313,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2352,7 +2352,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 40413bcff7a1..8f4cb5c6c20a 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2367,7 +2367,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3672,7 +3672,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 1b25a6039152..93a3ca24719c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -358,7 +358,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 0bb9094fdacd..d34472c99039 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1545,7 +1545,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index e68a38b1dfb2..8b6a0f89018c 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -131,12 +131,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -971,7 +971,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1023,7 +1023,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1039,7 +1039,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1898,7 +1898,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1915,7 +1915,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6254aa977398..298f0b443936 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -934,4 +934,5 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
return (struct intel_device_info *)INTEL_INFO(dev_priv);
}
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..cf54373c33ba 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
@ 2023-03-14 11:21 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-03-14 11:21 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
Now that i915 is the last flush_scheduled_work() user, for now let's
start with blind conversion inside the whole drivers/gpu/drm/i915/
directory. Jani Nikula wants to use two workqueues in order to avoid
adding new module globals, but I'm not familiar enough to audit and
split into two workqueues.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
24 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 410c84fd905c..2ae7b9ed559e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7605,7 +7605,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
@@ -8833,7 +8833,7 @@ void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 8e16745275f6..a90abc28e16f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5085,7 +5085,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 3d3efcf02011..4449b21ad9bd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1123,7 +1123,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index b507ff944864..ab8666e19613 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1599,7 +1599,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index 673bcdfb7ff6..9be091d12685 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -679,7 +679,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 2984d2810e42..72c38d036948 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1029,7 +1029,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2128,11 +2128,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2369,7 +2369,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2444,7 +2444,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2461,7 +2461,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2579,5 +2579,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 907ab7526cb4..4ca33e9aad1f 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -211,7 +211,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -338,7 +338,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -438,7 +438,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -569,7 +569,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -679,7 +679,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -707,7 +707,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 24b5b12f7732..95af3df6b530 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -881,7 +881,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 44610b20cd29..c60ef4e77d64 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -257,7 +257,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2313,7 +2313,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2352,7 +2352,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 40413bcff7a1..8f4cb5c6c20a 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2367,7 +2367,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3672,7 +3672,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 1b25a6039152..93a3ca24719c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -358,7 +358,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 0bb9094fdacd..d34472c99039 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1545,7 +1545,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index e68a38b1dfb2..8b6a0f89018c 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -131,12 +131,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -971,7 +971,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1023,7 +1023,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1039,7 +1039,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1898,7 +1898,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1915,7 +1915,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6254aa977398..298f0b443936 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -934,4 +934,5 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
return (struct intel_device_info *)INTEL_INFO(dev_priv);
}
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..cf54373c33ba 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
2023-03-14 11:21 ` [Intel-gfx] " Tetsuo Handa
(?)
@ 2023-03-15 10:47 ` Luca Coelho
2023-04-14 10:01 ` Tetsuo Handa
-1 siblings, 1 reply; 43+ messages in thread
From: Luca Coelho @ 2023-03-15 10:47 UTC (permalink / raw)
To: Tetsuo Handa, Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>
> Now that i915 is the last flush_scheduled_work() user, for now let's
> start with blind conversion inside the whole drivers/gpu/drm/i915/
> directory. Jani Nikula wants to use two workqueues in order to avoid
> adding new module globals, but I'm not familiar enough to audit and
> split into two workqueues.
>
> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> Changes in v2:
> Add missing alloc_workqueue() failure check.
Hi,
Thanks for your patch! But it seems that you only fixed that failure
check, without making the other change Jani proposed, namely, move the
work to the i915 struct instead of making it a global.
I'm working on that now.
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
2023-03-15 10:47 ` Luca Coelho
@ 2023-04-14 10:01 ` Tetsuo Handa
2023-04-14 10:13 ` Jani Nikula
0 siblings, 1 reply; 43+ messages in thread
From: Tetsuo Handa @ 2023-04-14 10:01 UTC (permalink / raw)
To: Luca Coelho, Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On 2023/03/15 19:47, Luca Coelho wrote:
> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
>> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>>
>> Now that i915 is the last flush_scheduled_work() user, for now let's
>> start with blind conversion inside the whole drivers/gpu/drm/i915/
>> directory. Jani Nikula wants to use two workqueues in order to avoid
>> adding new module globals, but I'm not familiar enough to audit and
>> split into two workqueues.
>>
>> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
>> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> ---
>> Changes in v2:
>> Add missing alloc_workqueue() failure check.
>
> Hi,
>
> Thanks for your patch! But it seems that you only fixed that failure
> check, without making the other change Jani proposed, namely, move the
> work to the i915 struct instead of making it a global.
>
> I'm working on that now.
What is estimated time of arrival on this?
Can we expect your work in Linux 6.4 ?
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
2023-04-14 10:01 ` Tetsuo Handa
@ 2023-04-14 10:13 ` Jani Nikula
2023-04-14 10:52 ` Tetsuo Handa
0 siblings, 1 reply; 43+ messages in thread
From: Jani Nikula @ 2023-04-14 10:13 UTC (permalink / raw)
To: Tetsuo Handa, Luca Coelho, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On Fri, 14 Apr 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
> On 2023/03/15 19:47, Luca Coelho wrote:
>> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
>>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
>>> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>>>
>>> Now that i915 is the last flush_scheduled_work() user, for now let's
>>> start with blind conversion inside the whole drivers/gpu/drm/i915/
>>> directory. Jani Nikula wants to use two workqueues in order to avoid
>>> adding new module globals, but I'm not familiar enough to audit and
>>> split into two workqueues.
>>>
>>> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
>>> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> ---
>>> Changes in v2:
>>> Add missing alloc_workqueue() failure check.
>>
>> Hi,
>>
>> Thanks for your patch! But it seems that you only fixed that failure
>> check, without making the other change Jani proposed, namely, move the
>> work to the i915 struct instead of making it a global.
>>
>> I'm working on that now.
>
> What is estimated time of arrival on this?
> Can we expect your work in Linux 6.4 ?
I'm afraid that ship has sailed. Sorry. :(
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
2023-04-14 10:13 ` Jani Nikula
@ 2023-04-14 10:52 ` Tetsuo Handa
2023-04-16 7:45 ` Daniel Vetter
0 siblings, 1 reply; 43+ messages in thread
From: Tetsuo Handa @ 2023-04-14 10:52 UTC (permalink / raw)
To: Jani Nikula, Luca Coelho, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On 2023/04/14 19:13, Jani Nikula wrote:
> On Fri, 14 Apr 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
>> On 2023/03/15 19:47, Luca Coelho wrote:
>>> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
>>>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
>>>> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>>>>
>>>> Now that i915 is the last flush_scheduled_work() user, for now let's
>>>> start with blind conversion inside the whole drivers/gpu/drm/i915/
>>>> directory. Jani Nikula wants to use two workqueues in order to avoid
>>>> adding new module globals, but I'm not familiar enough to audit and
>>>> split into two workqueues.
>>>>
>>>> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
>>>> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
>>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>>>> Cc: Jani Nikula <jani.nikula@intel.com>
>>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>> ---
>>>> Changes in v2:
>>>> Add missing alloc_workqueue() failure check.
>>>
>>> Hi,
>>>
>>> Thanks for your patch! But it seems that you only fixed that failure
>>> check, without making the other change Jani proposed, namely, move the
>>> work to the i915 struct instead of making it a global.
>>>
>>> I'm working on that now.
>>
>> What is estimated time of arrival on this?
>> Can we expect your work in Linux 6.4 ?
>
> I'm afraid that ship has sailed. Sorry. :(
Well, then, can we temporarily apply "[PATCH v2] drm/i915: avoid flush_scheduled_work() usage" ?
This patch is a mechanical conversion which unlikely causes regressions. This patch eliminates
interference from work items outside of i915, which is small but an improvement for i915 users.
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
2023-04-14 10:52 ` Tetsuo Handa
@ 2023-04-16 7:45 ` Daniel Vetter
0 siblings, 0 replies; 43+ messages in thread
From: Daniel Vetter @ 2023-04-16 7:45 UTC (permalink / raw)
To: Tetsuo Handa
Cc: Tvrtko Ursulin, Jani Nikula, Intel Graphics Development, DRI,
Luca Coelho
On Fri, Apr 14, 2023 at 07:52:12PM +0900, Tetsuo Handa wrote:
> On 2023/04/14 19:13, Jani Nikula wrote:
> > On Fri, 14 Apr 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
> >> On 2023/03/15 19:47, Luca Coelho wrote:
> >>> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
> >>>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> >>>> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
> >>>>
> >>>> Now that i915 is the last flush_scheduled_work() user, for now let's
> >>>> start with blind conversion inside the whole drivers/gpu/drm/i915/
> >>>> directory. Jani Nikula wants to use two workqueues in order to avoid
> >>>> adding new module globals, but I'm not familiar enough to audit and
> >>>> split into two workqueues.
> >>>>
> >>>> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
> >>>> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
> >>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>> Cc: Jani Nikula <jani.nikula@intel.com>
> >>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>> ---
> >>>> Changes in v2:
> >>>> Add missing alloc_workqueue() failure check.
> >>>
> >>> Hi,
> >>>
> >>> Thanks for your patch! But it seems that you only fixed that failure
> >>> check, without making the other change Jani proposed, namely, move the
> >>> work to the i915 struct instead of making it a global.
> >>>
> >>> I'm working on that now.
> >>
> >> What is estimated time of arrival on this?
> >> Can we expect your work in Linux 6.4 ?
> >
> > I'm afraid that ship has sailed. Sorry. :(
>
> Well, then, can we temporarily apply "[PATCH v2] drm/i915: avoid flush_scheduled_work() usage" ?
> This patch is a mechanical conversion which unlikely causes regressions. This patch eliminates
> interference from work items outside of i915, which is small but an improvement for i915 users.
I think if someone from i915 team triple-checks that i915 really doesn't
use any of the drm workers (hotplug handling, atomic commit, ...) then I
think we should be fine. The one that's unavoidable is the rmfb work
(which really only exists to avoid signal interruptions when doing this in
userspace process context, it's entirely synchronous otherwise), but I
think that's safe.
With that tripled checked I think the mechanical conversion is ok to land
late for 6.4 and has my
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[Dropped this on irc already, here just for the record]
Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
@ 2023-04-16 7:45 ` Daniel Vetter
0 siblings, 0 replies; 43+ messages in thread
From: Daniel Vetter @ 2023-04-16 7:45 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: Jani Nikula, Intel Graphics Development, DRI
On Fri, Apr 14, 2023 at 07:52:12PM +0900, Tetsuo Handa wrote:
> On 2023/04/14 19:13, Jani Nikula wrote:
> > On Fri, 14 Apr 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
> >> On 2023/03/15 19:47, Luca Coelho wrote:
> >>> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
> >>>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> >>>> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
> >>>>
> >>>> Now that i915 is the last flush_scheduled_work() user, for now let's
> >>>> start with blind conversion inside the whole drivers/gpu/drm/i915/
> >>>> directory. Jani Nikula wants to use two workqueues in order to avoid
> >>>> adding new module globals, but I'm not familiar enough to audit and
> >>>> split into two workqueues.
> >>>>
> >>>> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
> >>>> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
> >>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> >>>> Cc: Jani Nikula <jani.nikula@intel.com>
> >>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>> ---
> >>>> Changes in v2:
> >>>> Add missing alloc_workqueue() failure check.
> >>>
> >>> Hi,
> >>>
> >>> Thanks for your patch! But it seems that you only fixed that failure
> >>> check, without making the other change Jani proposed, namely, move the
> >>> work to the i915 struct instead of making it a global.
> >>>
> >>> I'm working on that now.
> >>
> >> What is estimated time of arrival on this?
> >> Can we expect your work in Linux 6.4 ?
> >
> > I'm afraid that ship has sailed. Sorry. :(
>
> Well, then, can we temporarily apply "[PATCH v2] drm/i915: avoid flush_scheduled_work() usage" ?
> This patch is a mechanical conversion which unlikely causes regressions. This patch eliminates
> interference from work items outside of i915, which is small but an improvement for i915 users.
I think if someone from i915 team triple-checks that i915 really doesn't
use any of the drm workers (hotplug handling, atomic commit, ...) then I
think we should be fine. The one that's unavoidable is the rmfb work
(which really only exists to avoid signal interruptions when doing this in
userspace process context, it's entirely synchronous otherwise), but I
think that's safe.
With that tripled checked I think the mechanical conversion is ok to land
late for 6.4 and has my
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[Dropped this on irc already, here just for the record]
Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
2023-04-16 7:45 ` Daniel Vetter
@ 2023-05-03 10:06 ` Jani Nikula
-1 siblings, 0 replies; 43+ messages in thread
From: Jani Nikula @ 2023-05-03 10:06 UTC (permalink / raw)
To: Daniel Vetter, Tetsuo Handa
Cc: Intel Graphics Development, Luca Coelho, DRI, Tvrtko Ursulin
On Sun, 16 Apr 2023, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Fri, Apr 14, 2023 at 07:52:12PM +0900, Tetsuo Handa wrote:
>> On 2023/04/14 19:13, Jani Nikula wrote:
>> > On Fri, 14 Apr 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
>> >> On 2023/03/15 19:47, Luca Coelho wrote:
>> >>> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
>> >>>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
>> >>>> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>> >>>>
>> >>>> Now that i915 is the last flush_scheduled_work() user, for now let's
>> >>>> start with blind conversion inside the whole drivers/gpu/drm/i915/
>> >>>> directory. Jani Nikula wants to use two workqueues in order to avoid
>> >>>> adding new module globals, but I'm not familiar enough to audit and
>> >>>> split into two workqueues.
>> >>>>
>> >>>> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
>> >>>> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
>> >>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> >>>> Cc: Jani Nikula <jani.nikula@intel.com>
>> >>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >>>> ---
>> >>>> Changes in v2:
>> >>>> Add missing alloc_workqueue() failure check.
>> >>>
>> >>> Hi,
>> >>>
>> >>> Thanks for your patch! But it seems that you only fixed that failure
>> >>> check, without making the other change Jani proposed, namely, move the
>> >>> work to the i915 struct instead of making it a global.
>> >>>
>> >>> I'm working on that now.
>> >>
>> >> What is estimated time of arrival on this?
>> >> Can we expect your work in Linux 6.4 ?
>> >
>> > I'm afraid that ship has sailed. Sorry. :(
>>
>> Well, then, can we temporarily apply "[PATCH v2] drm/i915: avoid flush_scheduled_work() usage" ?
>> This patch is a mechanical conversion which unlikely causes regressions. This patch eliminates
>> interference from work items outside of i915, which is small but an improvement for i915 users.
>
> I think if someone from i915 team triple-checks that i915 really doesn't
> use any of the drm workers (hotplug handling, atomic commit, ...) then I
> think we should be fine. The one that's unavoidable is the rmfb work
> (which really only exists to avoid signal interruptions when doing this in
> userspace process context, it's entirely synchronous otherwise), but I
> think that's safe.
>
> With that tripled checked I think the mechanical conversion is ok to land
> late for 6.4 and has my
>
> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> [Dropped this on irc already, here just for the record]
The patch conflicts already, I was out sick for a week, and nobody
picked this up in the mean time. I just don't see a way to rush it to
v6.4 anymore, with mere days remaining in the merge window. I'm sorry.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v2] drm/i915: avoid flush_scheduled_work() usage
@ 2023-05-03 10:06 ` Jani Nikula
0 siblings, 0 replies; 43+ messages in thread
From: Jani Nikula @ 2023-05-03 10:06 UTC (permalink / raw)
To: Daniel Vetter, Tetsuo Handa; +Cc: Intel Graphics Development, DRI
On Sun, 16 Apr 2023, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Fri, Apr 14, 2023 at 07:52:12PM +0900, Tetsuo Handa wrote:
>> On 2023/04/14 19:13, Jani Nikula wrote:
>> > On Fri, 14 Apr 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
>> >> On 2023/03/15 19:47, Luca Coelho wrote:
>> >>> On Tue, 2023-03-14 at 20:21 +0900, Tetsuo Handa wrote:
>> >>>> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
>> >>>> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>> >>>>
>> >>>> Now that i915 is the last flush_scheduled_work() user, for now let's
>> >>>> start with blind conversion inside the whole drivers/gpu/drm/i915/
>> >>>> directory. Jani Nikula wants to use two workqueues in order to avoid
>> >>>> adding new module globals, but I'm not familiar enough to audit and
>> >>>> split into two workqueues.
>> >>>>
>> >>>> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
>> >>>> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
>> >>>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> >>>> Cc: Jani Nikula <jani.nikula@intel.com>
>> >>>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> >>>> ---
>> >>>> Changes in v2:
>> >>>> Add missing alloc_workqueue() failure check.
>> >>>
>> >>> Hi,
>> >>>
>> >>> Thanks for your patch! But it seems that you only fixed that failure
>> >>> check, without making the other change Jani proposed, namely, move the
>> >>> work to the i915 struct instead of making it a global.
>> >>>
>> >>> I'm working on that now.
>> >>
>> >> What is estimated time of arrival on this?
>> >> Can we expect your work in Linux 6.4 ?
>> >
>> > I'm afraid that ship has sailed. Sorry. :(
>>
>> Well, then, can we temporarily apply "[PATCH v2] drm/i915: avoid flush_scheduled_work() usage" ?
>> This patch is a mechanical conversion which unlikely causes regressions. This patch eliminates
>> interference from work items outside of i915, which is small but an improvement for i915 users.
>
> I think if someone from i915 team triple-checks that i915 really doesn't
> use any of the drm workers (hotplug handling, atomic commit, ...) then I
> think we should be fine. The one that's unavoidable is the rmfb work
> (which really only exists to avoid signal interruptions when doing this in
> userspace process context, it's entirely synchronous otherwise), but I
> think that's safe.
>
> With that tripled checked I think the mechanical conversion is ok to land
> late for 6.4 and has my
>
> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> [Dropped this on irc already, here just for the record]
The patch conflicts already, I was out sick for a week, and nobody
picked this up in the mean time. I just don't see a way to rush it to
v6.4 anymore, with mere days remaining in the merge window. I'm sorry.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 43+ messages in thread
* [PATCH v3] drm/i915: avoid flush_scheduled_work() usage
2023-03-14 11:21 ` [Intel-gfx] " Tetsuo Handa
@ 2023-05-03 14:00 ` Tetsuo Handa
-1 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-05-03 14:00 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
i915 became the last flush_scheduled_work() user, but developers cannot
find time for auditing which work items does this flush_scheduled_work()
need to wait.
Therefore, for now let's start with blind/mechanical conversion within
the whole drivers/gpu/drm/i915/ directory, based on an assumption that
i915 does not need to wait for work items outside of this directory.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Changes in v3:
Refreshed using drm-tip.git, for commit 40053823baad ("drm/i915/display:
move modeset probe/remove functions to intel_display_driver.c") moved
flush_scheduled_work() from intel_display.c to intel_display_driver.c .
Please check the comment from Daniel Vetter at
https://lkml.kernel.org/r/ZDuntOkUeh0Eve8a@phenom.ffwll.local .
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
25 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3d3483e6f836..3436f95a081c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7122,7 +7122,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 60ce10fc7205..a20a9cfaab0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -435,7 +435,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4361c1ac65c3..b4f0f4472835 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5158,7 +5158,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index e92c62bcc9b8..91e949f985fa 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1144,7 +1144,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 11bb8cf9c9d0..ba2c5b5c6e14 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1600,7 +1600,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index aab1ae74a8f7..e093270b6a4c 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -689,7 +689,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 650232c4892b..e5355b71765c 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1037,7 +1037,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2137,11 +2137,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2386,7 +2386,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2461,7 +2461,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2478,7 +2478,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2599,5 +2599,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index b12900446828..922b44876cff 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -211,7 +211,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -338,7 +338,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -445,7 +445,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -576,7 +576,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -686,7 +686,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -714,7 +714,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 4f0b0cca03cc..125eb48427b8 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -882,7 +882,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ea0389c5f656..346ec839ab6c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -341,7 +341,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2453,7 +2453,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2493,7 +2493,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 750326434677..e10d285ddb2c 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2375,7 +2375,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3680,7 +3680,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index c0f3ff4746ad..9705affdfdb1 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -359,7 +359,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 195ff72d7a14..f4e986f4c7c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1625,7 +1625,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 80968e49e2c3..b2292c2b3db1 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -132,12 +132,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -972,7 +972,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1024,7 +1024,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1040,7 +1040,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1899,7 +1899,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1916,7 +1916,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 14c5338c96a6..18bafa694c35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -931,4 +931,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..cf54373c33ba 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] [PATCH v3] drm/i915: avoid flush_scheduled_work() usage
@ 2023-05-03 14:00 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-05-03 14:00 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
i915 became the last flush_scheduled_work() user, but developers cannot
find time for auditing which work items does this flush_scheduled_work()
need to wait.
Therefore, for now let's start with blind/mechanical conversion within
the whole drivers/gpu/drm/i915/ directory, based on an assumption that
i915 does not need to wait for work items outside of this directory.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Changes in v3:
Refreshed using drm-tip.git, for commit 40053823baad ("drm/i915/display:
move modeset probe/remove functions to intel_display_driver.c") moved
flush_scheduled_work() from intel_display.c to intel_display_driver.c .
Please check the comment from Daniel Vetter at
https://lkml.kernel.org/r/ZDuntOkUeh0Eve8a@phenom.ffwll.local .
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
25 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3d3483e6f836..3436f95a081c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7122,7 +7122,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 60ce10fc7205..a20a9cfaab0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -435,7 +435,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4361c1ac65c3..b4f0f4472835 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5158,7 +5158,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index e92c62bcc9b8..91e949f985fa 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1144,7 +1144,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 11bb8cf9c9d0..ba2c5b5c6e14 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1600,7 +1600,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index aab1ae74a8f7..e093270b6a4c 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -689,7 +689,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 650232c4892b..e5355b71765c 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1037,7 +1037,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2137,11 +2137,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2386,7 +2386,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2461,7 +2461,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2478,7 +2478,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2599,5 +2599,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index b12900446828..922b44876cff 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -211,7 +211,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -338,7 +338,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -445,7 +445,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -576,7 +576,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -686,7 +686,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -714,7 +714,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 4f0b0cca03cc..125eb48427b8 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -882,7 +882,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ea0389c5f656..346ec839ab6c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -341,7 +341,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2453,7 +2453,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2493,7 +2493,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 750326434677..e10d285ddb2c 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2375,7 +2375,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3680,7 +3680,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index c0f3ff4746ad..9705affdfdb1 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -359,7 +359,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 195ff72d7a14..f4e986f4c7c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1625,7 +1625,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 80968e49e2c3..b2292c2b3db1 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -132,12 +132,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -972,7 +972,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1024,7 +1024,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1040,7 +1040,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1899,7 +1899,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1916,7 +1916,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 14c5338c96a6..18bafa694c35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -931,4 +931,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..cf54373c33ba 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid flush_scheduled_work() usage (rev3)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (5 preceding siblings ...)
(?)
@ 2023-05-03 14:34 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-03 14:34 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev3)
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: avoid flush_scheduled_work() usage (rev3)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (6 preceding siblings ...)
(?)
@ 2023-05-03 14:46 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-03 14:46 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8385 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev3)
URL : https://patchwork.freedesktop.org/series/114608/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13103 -> Patchwork_114608v3
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_114608v3 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_114608v3, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/index.html
Participating hosts (37 -> 34)
------------------------------
Additional (1): bat-atsm-1
Missing (4): bat-dg2-8 fi-bsw-nick fi-snb-2520m bat-mtlp-6
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114608v3:
### IGT changes ###
#### Possible regressions ####
* igt@dmabuf@all-tests@dma_fence_chain:
- bat-rplp-1: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13103/bat-rplp-1/igt@dmabuf@all-tests@dma_fence_chain.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-rplp-1/igt@dmabuf@all-tests@dma_fence_chain.html
* igt@dmabuf@all-tests@dma_fence_unwrap:
- bat-rplp-1: [PASS][3] -> [DMESG-FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13103/bat-rplp-1/igt@dmabuf@all-tests@dma_fence_unwrap.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-rplp-1/igt@dmabuf@all-tests@dma_fence_unwrap.html
Known issues
------------
Here are the changes found in Patchwork_114608v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap@basic:
- bat-atsm-1: NOTRUN -> [SKIP][5] ([i915#4083])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@gem_mmap@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-atsm-1: NOTRUN -> [SKIP][6] ([i915#4077]) +2 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-atsm-1: NOTRUN -> [SKIP][7] ([i915#4079]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-atsm-1: NOTRUN -> [SKIP][8] ([i915#6621])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@i915_pm_rps@basic-api.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-atsm-1: NOTRUN -> [SKIP][9] ([i915#6645])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@size-max:
- bat-atsm-1: NOTRUN -> [SKIP][10] ([i915#6077]) +36 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_addfb_basic@size-max.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- bat-atsm-1: NOTRUN -> [SKIP][11] ([i915#6078]) +19 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
* igt@kms_flip@basic-plain-flip:
- bat-atsm-1: NOTRUN -> [SKIP][12] ([i915#6166]) +3 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_flip@basic-plain-flip.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-atsm-1: NOTRUN -> [SKIP][13] ([i915#6093]) +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_pipe_crc_basic@hang-read-crc:
- bat-atsm-1: NOTRUN -> [SKIP][14] ([i915#1836]) +6 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_pipe_crc_basic@hang-read-crc.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][15] ([i915#1845] / [i915#5354]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_prop_blob@basic:
- bat-atsm-1: NOTRUN -> [SKIP][16] ([i915#7357])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_prop_blob@basic.html
* igt@kms_psr@sprite_plane_onoff:
- bat-atsm-1: NOTRUN -> [SKIP][17] ([i915#1072]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-atsm-1: NOTRUN -> [SKIP][18] ([i915#6094])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-atsm-1: NOTRUN -> [SKIP][19] ([fdo#109295] / [i915#6078])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-atsm-1: NOTRUN -> [SKIP][20] ([fdo#109295] / [i915#4077]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-write:
- bat-atsm-1: NOTRUN -> [SKIP][21] ([fdo#109295]) +3 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/bat-atsm-1/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-7567u: [DMESG-FAIL][22] ([i915#5334] / [i915#7872]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13103/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
[i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
[i915#6093]: https://gitlab.freedesktop.org/drm/intel/issues/6093
[i915#6094]: https://gitlab.freedesktop.org/drm/intel/issues/6094
[i915#6166]: https://gitlab.freedesktop.org/drm/intel/issues/6166
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7357]: https://gitlab.freedesktop.org/drm/intel/issues/7357
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
[i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
Build changes
-------------
* Linux: CI_DRM_13103 -> Patchwork_114608v3
CI-20190529: 20190529
CI_DRM_13103: 6b5e2f67878dc507c30fadd8a136de074e756efc @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7277: 1cb3507f3ff28d11bd5cfabcde576fe78ddab571 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v3: 6b5e2f67878dc507c30fadd8a136de074e756efc @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
d20e0f3f3ff5 drm/i915: avoid flush_scheduled_work() usage
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v3/index.html
[-- Attachment #2: Type: text/html, Size: 9653 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid flush_scheduled_work() usage (rev4)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (7 preceding siblings ...)
(?)
@ 2023-05-04 19:49 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-04 19:49 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev4)
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: avoid flush_scheduled_work() usage (rev4)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (8 preceding siblings ...)
(?)
@ 2023-05-04 20:14 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-04 20:14 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4041 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev4)
URL : https://patchwork.freedesktop.org/series/114608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13109 -> Patchwork_114608v4
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/index.html
Participating hosts (41 -> 40)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114608v4:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_pm_rpm@basic-rte:
- {bat-mtlp-8}: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/bat-mtlp-8/igt@i915_pm_rpm@basic-rte.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/bat-mtlp-8/igt@i915_pm_rpm@basic-rte.html
Known issues
------------
Here are the changes found in Patchwork_114608v4 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@hangcheck:
- bat-rpls-1: NOTRUN -> [ABORT][3] ([i915#7677])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/bat-rpls-1/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@reset:
- bat-rpls-2: [PASS][4] -> [ABORT][5] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#7981] / [i915#8347])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/bat-rpls-2/igt@i915_selftest@live@reset.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/bat-rpls-2/igt@i915_selftest@live@reset.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1:
- bat-dg2-8: [PASS][6] -> [FAIL][7] ([i915#7932])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-1.html
#### Possible fixes ####
* igt@i915_selftest@live@requests:
- bat-rpls-1: [ABORT][8] ([i915#4983] / [i915#7911] / [i915#7920]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/bat-rpls-1/igt@i915_selftest@live@requests.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/bat-rpls-1/igt@i915_selftest@live@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7677]: https://gitlab.freedesktop.org/drm/intel/issues/7677
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
Build changes
-------------
* Linux: CI_DRM_13109 -> Patchwork_114608v4
CI-20190529: 20190529
CI_DRM_13109: 1c3b807eabfd457e98ccbec6c22cc39b45befed5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7277: 1cb3507f3ff28d11bd5cfabcde576fe78ddab571 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v4: 1c3b807eabfd457e98ccbec6c22cc39b45befed5 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
60833f210bc2 drm/i915: avoid flush_scheduled_work() usage
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/index.html
[-- Attachment #2: Type: text/html, Size: 4819 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: avoid flush_scheduled_work() usage (rev4)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (9 preceding siblings ...)
(?)
@ 2023-05-05 6:33 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-05 6:33 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 10330 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev4)
URL : https://patchwork.freedesktop.org/series/114608/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13109_full -> Patchwork_114608v4_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_114608v4_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_114608v4_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114608v4_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_mmap_gtt@hang:
- shard-snb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-snb4/igt@gem_mmap_gtt@hang.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-snb4/igt@gem_mmap_gtt@hang.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_pipe_stress@stress-xrgb8888-ytiled:
- {shard-rkl}: [PASS][3] -> [ABORT][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-rkl-3/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-rkl-2/igt@i915_pipe_stress@stress-xrgb8888-ytiled.html
Known issues
------------
Here are the changes found in Patchwork_114608v4_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: [PASS][5] -> [FAIL][6] ([i915#2842])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-apl2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-apl3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-glk1/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#3886]) +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-glk1/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-glk: [PASS][9] -> [FAIL][10] ([i915#72])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-glk7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1:
- shard-glk: [PASS][11] -> [FAIL][12] ([i915#79]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-0-25@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][13] ([fdo#109271]) +23 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-snb1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-0-25@pipe-a-hdmi-a-1.html
* igt@vc4/vc4_tiling@set-bad-flags:
- shard-glk: NOTRUN -> [SKIP][14] ([fdo#109271]) +43 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-glk1/igt@vc4/vc4_tiling@set-bad-flags.html
#### Possible fixes ####
* igt@gem_exec_fair@basic-none@bcs0:
- {shard-rkl}: [FAIL][15] ([i915#2842]) -> [PASS][16] +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-rkl-6/igt@gem_exec_fair@basic-none@bcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-rkl-1/igt@gem_exec_fair@basic-none@bcs0.html
* igt@i915_pm_rpm@modeset-non-lpsp-stress:
- {shard-rkl}: [SKIP][17] ([i915#1397]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-rkl-7/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-rkl-4/igt@i915_pm_rpm@modeset-non-lpsp-stress.html
* igt@i915_pm_rps@engine-order:
- shard-apl: [FAIL][19] ([i915#6537]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-apl6/igt@i915_pm_rps@engine-order.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-apl4/igt@i915_pm_rps@engine-order.html
* igt@kms_cursor_legacy@forked-bo@pipe-b:
- {shard-rkl}: [INCOMPLETE][21] ([i915#8011]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13109/shard-rkl-7/igt@kms_cursor_legacy@forked-bo@pipe-b.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/shard-rkl-4/igt@kms_cursor_legacy@forked-bo@pipe-b.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8234]: https://gitlab.freedesktop.org/drm/intel/issues/8234
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
Build changes
-------------
* Linux: CI_DRM_13109 -> Patchwork_114608v4
CI-20190529: 20190529
CI_DRM_13109: 1c3b807eabfd457e98ccbec6c22cc39b45befed5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7277: 1cb3507f3ff28d11bd5cfabcde576fe78ddab571 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v4: 1c3b807eabfd457e98ccbec6c22cc39b45befed5 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v4/index.html
[-- Attachment #2: Type: text/html, Size: 8215 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* [PATCH v4] drm/i915: avoid flush_scheduled_work() usage
2023-05-03 14:00 ` [Intel-gfx] " Tetsuo Handa
@ 2023-05-18 14:44 ` Tetsuo Handa
-1 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-05-18 14:44 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
i915 became the last flush_scheduled_work() user, but developers cannot
find time for auditing which work items does this flush_scheduled_work()
need to wait.
Therefore, for now let's start with blind/mechanical conversion within
the whole drivers/gpu/drm/i915/ directory, based on an assumption that
i915 does not need to wait for work items outside of this directory.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Changes in v4:
Refreshed using drm-tip.git.
Changes in v3:
Refreshed using drm-tip.git, for commit 40053823baad ("drm/i915/display:
move modeset probe/remove functions to intel_display_driver.c") moved
flush_scheduled_work() from intel_display.c to intel_display_driver.c .
Please check the comment from Daniel Vetter at
https://lkml.kernel.org/r/ZDuntOkUeh0Eve8a@phenom.ffwll.local .
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
25 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 09320e14d75c..5f1ba9c908cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7145,7 +7145,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 60ce10fc7205..a20a9cfaab0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -435,7 +435,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4bec8cd7979f..4782bdfc7c61 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5251,7 +5251,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 0952a707358c..06859fb6f30e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1081,7 +1081,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 11bb8cf9c9d0..ba2c5b5c6e14 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1600,7 +1600,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index aab1ae74a8f7..e093270b6a4c 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -689,7 +689,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index dd539106ee5a..d981defc8b0a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1001,7 +1001,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2095,11 +2095,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2398,7 +2398,7 @@ int intel_hdcp_enable(struct intel_atomic_state *state,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2473,7 +2473,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2490,7 +2490,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2609,5 +2609,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 23a5e1a875f1..8247b3e02968 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -212,7 +212,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -339,7 +339,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -446,7 +446,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -577,7 +577,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -687,7 +687,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -715,7 +715,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 5e7ba594e7e7..805bd0442d19 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -882,7 +882,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ea0389c5f656..346ec839ab6c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -341,7 +341,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2453,7 +2453,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2493,7 +2493,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 750326434677..e10d285ddb2c 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2375,7 +2375,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3680,7 +3680,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 8f888d36f16d..5b38e9d53e8d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -376,7 +376,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 195ff72d7a14..f4e986f4c7c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1625,7 +1625,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index e68a99205599..9221d88118e2 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -133,12 +133,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -973,7 +973,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1025,7 +1025,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1041,7 +1041,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1900,7 +1900,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1917,7 +1917,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 14c5338c96a6..18bafa694c35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -931,4 +931,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..cf54373c33ba 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] [PATCH v4] drm/i915: avoid flush_scheduled_work() usage
@ 2023-05-18 14:44 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-05-18 14:44 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
i915 became the last flush_scheduled_work() user, but developers cannot
find time for auditing which work items does this flush_scheduled_work()
need to wait.
Therefore, for now let's start with blind/mechanical conversion within
the whole drivers/gpu/drm/i915/ directory, based on an assumption that
i915 does not need to wait for work items outside of this directory.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Changes in v4:
Refreshed using drm-tip.git.
Changes in v3:
Refreshed using drm-tip.git, for commit 40053823baad ("drm/i915/display:
move modeset probe/remove functions to intel_display_driver.c") moved
flush_scheduled_work() from intel_display.c to intel_display_driver.c .
Please check the comment from Daniel Vetter at
https://lkml.kernel.org/r/ZDuntOkUeh0Eve8a@phenom.ffwll.local .
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
25 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 09320e14d75c..5f1ba9c908cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7145,7 +7145,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 60ce10fc7205..a20a9cfaab0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -435,7 +435,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4bec8cd7979f..4782bdfc7c61 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5251,7 +5251,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 0952a707358c..06859fb6f30e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1081,7 +1081,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 11bb8cf9c9d0..ba2c5b5c6e14 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1600,7 +1600,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index aab1ae74a8f7..e093270b6a4c 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -689,7 +689,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index dd539106ee5a..d981defc8b0a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1001,7 +1001,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2095,11 +2095,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2398,7 +2398,7 @@ int intel_hdcp_enable(struct intel_atomic_state *state,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2473,7 +2473,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2490,7 +2490,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2609,5 +2609,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 23a5e1a875f1..8247b3e02968 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -212,7 +212,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -339,7 +339,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -446,7 +446,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -577,7 +577,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -687,7 +687,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -715,7 +715,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 5e7ba594e7e7..805bd0442d19 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -882,7 +882,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ea0389c5f656..346ec839ab6c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -341,7 +341,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2453,7 +2453,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2493,7 +2493,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 750326434677..e10d285ddb2c 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2375,7 +2375,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3680,7 +3680,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 8f888d36f16d..5b38e9d53e8d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -376,7 +376,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 195ff72d7a14..f4e986f4c7c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1625,7 +1625,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index e68a99205599..9221d88118e2 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -133,12 +133,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -973,7 +973,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1025,7 +1025,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1041,7 +1041,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1900,7 +1900,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1917,7 +1917,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 14c5338c96a6..18bafa694c35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -931,4 +931,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..cf54373c33ba 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid flush_scheduled_work() usage (rev5)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (10 preceding siblings ...)
(?)
@ 2023-05-18 15:22 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-18 15:22 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev5)
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: avoid flush_scheduled_work() usage (rev5)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (11 preceding siblings ...)
(?)
@ 2023-05-18 15:39 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-18 15:39 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 9107 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev5)
URL : https://patchwork.freedesktop.org/series/114608/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13163 -> Patchwork_114608v5
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_114608v5 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_114608v5, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/index.html
Participating hosts (37 -> 37)
------------------------------
Additional (2): fi-kbl-soraka bat-adlp-6
Missing (2): fi-snb-2520m bat-mtlp-6
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114608v5:
### IGT changes ###
#### Possible regressions ####
* igt@kms_pipe_crc_basic@read-crc@pipe-b-edp-1:
- bat-adlp-6: NOTRUN -> [ABORT][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-adlp-6/igt@kms_pipe_crc_basic@read-crc@pipe-b-edp-1.html
Known issues
------------
Here are the changes found in Patchwork_114608v5 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- bat-adlp-6: NOTRUN -> [SKIP][2] ([i915#7456])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-adlp-6/igt@debugfs_test@basic-hwmon.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
* igt@gem_tiled_pread_basic:
- bat-adlp-6: NOTRUN -> [SKIP][5] ([i915#3282])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-adlp-6/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][6] ([i915#7077])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-rplp-1/igt@i915_pm_backlight@basic-brightness@edp-1.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#5334] / [i915#7872])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][8] ([i915#1886] / [i915#7913])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@hangcheck:
- bat-adls-5: [PASS][9] -> [DMESG-WARN][10] ([i915#5591])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13163/bat-adls-5/igt@i915_selftest@live@hangcheck.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-adls-5/igt@i915_selftest@live@hangcheck.html
* igt@i915_selftest@live@reset:
- bat-rpls-2: [PASS][11] -> [ABORT][12] ([i915#4983] / [i915#7461] / [i915#7913] / [i915#7981] / [i915#8347])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13163/bat-rpls-2/igt@i915_selftest@live@reset.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-rpls-2/igt@i915_selftest@live@reset.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- fi-kbl-soraka: NOTRUN -> [SKIP][13] ([fdo#109271]) +14 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- bat-adlp-6: NOTRUN -> [SKIP][14] ([i915#7828]) +7 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-adlp-6/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-6: NOTRUN -> [SKIP][15] ([i915#4103]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-adlp-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-adlp-6: NOTRUN -> [SKIP][16] ([fdo#109285])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-adlp-6/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1:
- bat-dg2-8: [PASS][17] -> [FAIL][18] ([i915#7932])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13163/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-1.html
* igt@kms_psr@primary_mmap_gtt:
- bat-rplp-1: NOTRUN -> [SKIP][19] ([i915#1072])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-rplp-1: NOTRUN -> [SKIP][20] ([i915#3555] / [i915#4579])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
- fi-kbl-soraka: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4579])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/fi-kbl-soraka/igt@kms_setmode@basic-clone-single-crtc.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-7567u: [DMESG-FAIL][22] ([i915#5334] / [i915#7872]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13163/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html
#### Warnings ####
* igt@kms_psr@sprite_plane_onoff:
- bat-rplp-1: [ABORT][24] ([i915#8434] / [i915#8442]) -> [SKIP][25] ([i915#1072])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13163/bat-rplp-1/igt@kms_psr@sprite_plane_onoff.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/bat-rplp-1/igt@kms_psr@sprite_plane_onoff.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#7981]: https://gitlab.freedesktop.org/drm/intel/issues/7981
[i915#8347]: https://gitlab.freedesktop.org/drm/intel/issues/8347
[i915#8434]: https://gitlab.freedesktop.org/drm/intel/issues/8434
[i915#8442]: https://gitlab.freedesktop.org/drm/intel/issues/8442
Build changes
-------------
* Linux: CI_DRM_13163 -> Patchwork_114608v5
CI-20190529: 20190529
CI_DRM_13163: b0e2432ff9ab0f200107e6c566f378cd04de2703 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7295: 34168d9156c5780c9e9790475c894fd829840e32 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v5: b0e2432ff9ab0f200107e6c566f378cd04de2703 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
51fd33e0c9f3 drm/i915: avoid flush_scheduled_work() usage
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v5/index.html
[-- Attachment #2: Type: text/html, Size: 10663 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v4] drm/i915: avoid flush_scheduled_work() usage
2023-05-18 14:44 ` [Intel-gfx] " Tetsuo Handa
(?)
@ 2023-05-19 8:02 ` Tvrtko Ursulin
-1 siblings, 0 replies; 43+ messages in thread
From: Tvrtko Ursulin @ 2023-05-19 8:02 UTC (permalink / raw)
To: Tetsuo Handa, Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
On 18/05/2023 15:44, Tetsuo Handa wrote:
> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>
> i915 became the last flush_scheduled_work() user, but developers cannot
> find time for auditing which work items does this flush_scheduled_work()
> need to wait.
>
> Therefore, for now let's start with blind/mechanical conversion within
> the whole drivers/gpu/drm/i915/ directory, based on an assumption that
> i915 does not need to wait for work items outside of this directory.
>
> Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
> Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> Changes in v4:
> Refreshed using drm-tip.git.
>
> Changes in v3:
> Refreshed using drm-tip.git, for commit 40053823baad ("drm/i915/display:
> move modeset probe/remove functions to intel_display_driver.c") moved
> flush_scheduled_work() from intel_display.c to intel_display_driver.c .
>
> Please check the comment from Daniel Vetter at
> https://lkml.kernel.org/r/ZDuntOkUeh0Eve8a@phenom.ffwll.local .
I can't help with that display code assesment but in general the
approach with a driver global wq works for me.
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
I haven't read the patch in detail, just one thing caught my eye which
is that we already have a workqueue named "i915" (see
i915_workqueues_init). So I'd suggest naming the one from this patch
"i915-global" or something. Just so it is clearer if/when debugging aids
start firing what is what.
Regards,
Tvrtko
>
> Changes in v2:
> Add missing alloc_workqueue() failure check.
>
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> .../drm/i915/display/intel_display_driver.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> .../drm/i915/display/intel_dp_link_training.c | 2 +-
> drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
> drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
> drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
> drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
> drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
> drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
> drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
> drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
> .../drm/i915/gt/intel_execlists_submission.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
> drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
> drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
> drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_module.c | 7 +++++++
> drivers/gpu/drm/i915/i915_request.c | 2 +-
> drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
> drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
> 25 files changed, 64 insertions(+), 52 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 09320e14d75c..5f1ba9c908cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7145,7 +7145,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
> &to_i915(state->base.dev)->display.atomic_helper;
>
> if (llist_add(&state->freed, &helper->free_list))
> - schedule_work(&helper->free_work);
> + queue_work(i915_wq, &helper->free_work);
> break;
> }
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
> index 60ce10fc7205..a20a9cfaab0e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> @@ -435,7 +435,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
> intel_unregister_dsm_handler();
>
> /* flush any delayed tasks or pending work */
> - flush_scheduled_work();
> + flush_workqueue(i915_wq);
>
> intel_hdcp_component_fini(i915);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index 8a88de67ff0a..57d015006784 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
> i915->display.dmc.dmc = dmc;
>
> drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
> - schedule_work(&dmc->work);
> + queue_work(i915_wq, &dmc->work);
>
> return;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4bec8cd7979f..4782bdfc7c61 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5251,7 +5251,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
> spin_lock_irq(&i915->irq_lock);
> i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
> spin_unlock_irq(&i915->irq_lock);
> - queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
> + queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
> }
>
> static const struct drm_connector_funcs intel_dp_connector_funcs = {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 0952a707358c..06859fb6f30e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -1081,7 +1081,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
> }
>
> /* Schedule a Hotplug Uevent to userspace to start modeset */
> - schedule_work(&intel_connector->modeset_retry_work);
> + queue_work(i915_wq, &intel_connector->modeset_retry_work);
> }
>
> /* Perform the link training on all LTTPRs and the DPRX on a link. */
> diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
> index 760e63cdc0c8..8bacb734ad78 100644
> --- a/drivers/gpu/drm/i915/display/intel_drrs.c
> +++ b/drivers/gpu/drm/i915/display/intel_drrs.c
> @@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
>
> static void intel_drrs_schedule_work(struct intel_crtc *crtc)
> {
> - mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
> + mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
> }
>
> static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 11bb8cf9c9d0..ba2c5b5c6e14 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1600,7 +1600,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
> if (READ_ONCE(fbc->underrun_detected))
> return;
>
> - schedule_work(&fbc->underrun_work);
> + queue_work(i915_wq, &fbc->underrun_work);
> }
>
> /**
> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
> index aab1ae74a8f7..e093270b6a4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
> @@ -689,7 +689,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
> /* Don't block our own workqueue as this can
> * be run in parallel with other i915.ko tasks.
> */
> - schedule_work(&dev_priv->display.fbdev.suspend_work);
> + queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
> return;
> }
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index dd539106ee5a..d981defc8b0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -1001,7 +1001,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
> hdcp->value = value;
> if (update_property) {
> drm_connector_get(&connector->base);
> - schedule_work(&hdcp->prop_work);
> + queue_work(i915_wq, &hdcp->prop_work);
> }
> }
>
> @@ -2095,11 +2095,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
> return;
>
> if (!intel_hdcp2_check_link(connector))
> - schedule_delayed_work(&hdcp->check_work,
> - DRM_HDCP2_CHECK_PERIOD_MS);
> + queue_delayed_work(i915_wq, &hdcp->check_work,
> + DRM_HDCP2_CHECK_PERIOD_MS);
> else if (!intel_hdcp_check_link(connector))
> - schedule_delayed_work(&hdcp->check_work,
> - DRM_HDCP_CHECK_PERIOD_MS);
> + queue_delayed_work(i915_wq, &hdcp->check_work,
> + DRM_HDCP_CHECK_PERIOD_MS);
> }
>
> static int i915_hdcp_component_bind(struct device *i915_kdev,
> @@ -2398,7 +2398,7 @@ int intel_hdcp_enable(struct intel_atomic_state *state,
> }
>
> if (!ret) {
> - schedule_delayed_work(&hdcp->check_work, check_link_interval);
> + queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
> intel_hdcp_update_value(connector,
> DRM_MODE_CONTENT_PROTECTION_ENABLED,
> true);
> @@ -2473,7 +2473,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
> mutex_lock(&hdcp->mutex);
> hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
> drm_connector_get(&connector->base);
> - schedule_work(&hdcp->prop_work);
> + queue_work(i915_wq, &hdcp->prop_work);
> mutex_unlock(&hdcp->mutex);
> }
>
> @@ -2490,7 +2490,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
> */
> if (!desired_and_not_enabled && !content_protection_type_changed) {
> drm_connector_get(&connector->base);
> - schedule_work(&hdcp->prop_work);
> + queue_work(i915_wq, &hdcp->prop_work);
> }
> }
>
> @@ -2609,5 +2609,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
> atomic_inc(&connector->hdcp.cp_irq_count);
> wake_up_all(&connector->hdcp.cp_irq_queue);
>
> - schedule_delayed_work(&hdcp->check_work, 0);
> + queue_delayed_work(i915_wq, &hdcp->check_work, 0);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
> index 23a5e1a875f1..8247b3e02968 100644
> --- a/drivers/gpu/drm/i915/display/intel_hotplug.c
> +++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
> @@ -212,7 +212,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
> /* Enable polling and queue hotplug re-enabling. */
> if (hpd_disabled) {
> drm_kms_helper_poll_enable(&dev_priv->drm);
> - mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
> + mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
> msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
> }
> }
> @@ -339,7 +339,7 @@ static void i915_digport_work_func(struct work_struct *work)
> spin_lock_irq(&dev_priv->irq_lock);
> dev_priv->display.hotplug.event_bits |= old_bits;
> spin_unlock_irq(&dev_priv->irq_lock);
> - queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
> + queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
> }
> }
>
> @@ -446,7 +446,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
> dev_priv->display.hotplug.retry_bits |= retry;
> spin_unlock_irq(&dev_priv->irq_lock);
>
> - mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
> + mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
> msecs_to_jiffies(HPD_RETRY_DELAY));
> }
> }
> @@ -577,7 +577,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
> if (queue_dig)
> queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
> if (queue_hp)
> - queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
> + queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
> }
>
> /**
> @@ -687,7 +687,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
> * As well, there's no issue if we race here since we always reschedule
> * this worker anyway
> */
> - schedule_work(&dev_priv->display.hotplug.poll_init_work);
> + queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
> }
>
> /**
> @@ -715,7 +715,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
> return;
>
> WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
> - schedule_work(&dev_priv->display.hotplug.poll_init_work);
> + queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
> }
>
> void intel_hpd_init_early(struct drm_i915_private *i915)
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
> index b7973a05d022..24c0a4abcc4d 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.c
> @@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
> void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
> {
> if (dev_priv->display.opregion.asle)
> - schedule_work(&dev_priv->display.opregion.asle_work);
> + queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
> }
>
> #define ACPI_EV_DISPLAY_SWITCH (1<<0)
> diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
> index 5e7ba594e7e7..805bd0442d19 100644
> --- a/drivers/gpu/drm/i915/display/intel_pps.c
> +++ b/drivers/gpu/drm/i915/display/intel_pps.c
> @@ -882,7 +882,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
> * operations.
> */
> delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
> - schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
> + queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
> }
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index ea0389c5f656..346ec839ab6c 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -341,7 +341,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
> */
> intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
>
> - schedule_work(&intel_dp->psr.work);
> + queue_work(i915_wq, &intel_dp->psr.work);
> }
> }
>
> @@ -2453,7 +2453,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
> return;
>
> tgl_psr2_enable_dc3co(intel_dp);
> - mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
> + mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
> intel_dp->psr.dc3co_exit_delay);
> }
>
> @@ -2493,7 +2493,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
> psr_force_hw_tracking_exit(intel_dp);
>
> if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
> - schedule_work(&intel_dp->psr.work);
> + queue_work(i915_wq, &intel_dp->psr.work);
> }
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> index 750326434677..e10d285ddb2c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
> @@ -2375,7 +2375,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
> goto err_rq;
>
> INIT_WORK(&cap->work, execlists_capture_work);
> - schedule_work(&cap->work);
> + queue_work(i915_wq, &cap->work);
> return;
>
> err_rq:
> @@ -3680,7 +3680,7 @@ static void virtual_context_destroy(struct kref *kref)
> * lock, we can delegate the free of the engine to an RCU worker.
> */
> INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
> - queue_rcu_work(system_wq, &ve->rcu);
> + queue_rcu_work(i915_wq, &ve->rcu);
> }
>
> static void virtual_engine_initial_hint(struct virtual_engine *ve)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
> index cadfd85785b1..54aa90dff33f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
> @@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
> container_of(wrk, typeof(*pool), work.work);
>
> if (pool_free_older_than(pool, HZ))
> - schedule_delayed_work(&pool->work,
> - round_jiffies_up_relative(HZ));
> + queue_delayed_work(i915_wq, &pool->work,
> + round_jiffies_up_relative(HZ));
> }
>
> static void pool_retire(struct i915_active *ref)
> @@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
> WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
> spin_unlock_irqrestore(&pool->lock, flags);
>
> - schedule_delayed_work(&pool->work,
> - round_jiffies_up_relative(HZ));
> + queue_delayed_work(i915_wq, &pool->work,
> + round_jiffies_up_relative(HZ));
> }
>
> void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> index 8f888d36f16d..5b38e9d53e8d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
> @@ -376,7 +376,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
> if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
> gt->i915->l3_parity.which_slice |= 1 << 0;
>
> - schedule_work(>->i915->l3_parity.error_work);
> + queue_work(i915_wq, >->i915->l3_parity.error_work);
> }
>
> void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
> index 1dfd01668c79..683dc55d9191 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
> @@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
> GEM_BUG_ON(intel_engine_is_virtual(engine));
>
> if (add_retire(engine, tl))
> - schedule_work(&engine->retire_work);
> + queue_work(i915_wq, &engine->retire_work);
> }
>
> void intel_engine_init_retire(struct intel_engine_cs *engine)
> @@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
> struct intel_gt *gt =
> container_of(work, typeof(*gt), requests.retire_work.work);
>
> - schedule_delayed_work(>->requests.retire_work,
> - round_jiffies_up_relative(HZ));
> + queue_delayed_work(i915_wq, >->requests.retire_work,
> + round_jiffies_up_relative(HZ));
> intel_gt_retire_requests(gt);
> }
>
> @@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
>
> void intel_gt_unpark_requests(struct intel_gt *gt)
> {
> - schedule_delayed_work(>->requests.retire_work,
> - round_jiffies_up_relative(HZ));
> + queue_delayed_work(i915_wq, >->requests.retire_work,
> + round_jiffies_up_relative(HZ));
> }
>
> void intel_gt_fini_requests(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index 195ff72d7a14..f4e986f4c7c9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -1625,7 +1625,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
> w->name = name;
>
> INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
> - schedule_delayed_work(&w->work, timeout);
> + queue_delayed_work(i915_wq, &w->work, timeout);
> }
>
> void __intel_fini_wedge(struct intel_wedge_me *w)
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index e68a99205599..9221d88118e2 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -133,12 +133,12 @@ static void rps_timer(struct timer_list *t)
> rps->cur_freq < rps->max_freq_softlimit) {
> rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
> rps->pm_interval = 1;
> - schedule_work(&rps->work);
> + queue_work(i915_wq, &rps->work);
> } else if (100 * busy < rps->power.down_threshold * dt &&
> rps->cur_freq > rps->min_freq_softlimit) {
> rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
> rps->pm_interval = 1;
> - schedule_work(&rps->work);
> + queue_work(i915_wq, &rps->work);
> } else {
> rps->last_adj = 0;
> }
> @@ -973,7 +973,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
> }
> mutex_unlock(&rps->lock);
> if (boost)
> - schedule_work(&rps->work);
> + queue_work(i915_wq, &rps->work);
>
> return 0;
> }
> @@ -1025,7 +1025,7 @@ void intel_rps_boost(struct i915_request *rq)
> if (!atomic_fetch_inc(&slpc->num_waiters)) {
> GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
> rq->fence.context, rq->fence.seqno);
> - schedule_work(&slpc->boost_work);
> + queue_work(i915_wq, &slpc->boost_work);
> }
>
> return;
> @@ -1041,7 +1041,7 @@ void intel_rps_boost(struct i915_request *rq)
> rq->fence.context, rq->fence.seqno);
>
> if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
> - schedule_work(&rps->work);
> + queue_work(i915_wq, &rps->work);
>
> WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
> }
> @@ -1900,7 +1900,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> gen6_gt_pm_mask_irq(gt, events);
>
> rps->pm_iir |= events;
> - schedule_work(&rps->work);
> + queue_work(i915_wq, &rps->work);
> }
>
> void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> @@ -1917,7 +1917,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
> gen6_gt_pm_mask_irq(gt, events);
> rps->pm_iir |= events;
>
> - schedule_work(&rps->work);
> + queue_work(i915_wq, &rps->work);
> spin_unlock(gt->irq_lock);
> }
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
> index 542ce6d2de19..6938b5661f72 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
> @@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
>
> /* Boost gpufreq to max [waitboost] and keep it fixed */
> atomic_inc(>->rps.num_waiters);
> - schedule_work(>->rps.work);
> + queue_work(i915_wq, >->rps.work);
> flush_work(>->rps.work);
> }
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 14c5338c96a6..18bafa694c35 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -931,4 +931,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
> GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
>
> +extern struct workqueue_struct *i915_wq;
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
> index 65acd7bf75d0..cf54373c33ba 100644
> --- a/drivers/gpu/drm/i915/i915_module.c
> +++ b/drivers/gpu/drm/i915/i915_module.c
> @@ -19,6 +19,8 @@
> #include "i915_vma.h"
> #include "i915_vma_resource.h"
>
> +struct workqueue_struct *i915_wq;
> +
> static int i915_check_nomodeset(void)
> {
> bool use_kms = true;
> @@ -79,6 +81,9 @@ static int __init i915_init(void)
> {
> int err, i;
>
> + i915_wq = alloc_workqueue("i915", 0, 0);
> + if (!i915_wq)
> + return -ENOMEM;
> for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
> err = init_funcs[i].init();
> if (err < 0) {
> @@ -86,6 +91,7 @@ static int __init i915_init(void)
> if (init_funcs[i].exit)
> init_funcs[i].exit();
> }
> + destroy_workqueue(i915_wq);
> return err;
> } else if (err > 0) {
> /*
> @@ -113,6 +119,7 @@ static void __exit i915_exit(void)
> if (init_funcs[i].exit)
> init_funcs[i].exit();
> }
> + destroy_workqueue(i915_wq);
> }
>
> module_init(i915_init);
> diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
> index 630a732aaecc..c4fc7b6f740c 100644
> --- a/drivers/gpu/drm/i915/i915_request.c
> +++ b/drivers/gpu/drm/i915/i915_request.c
> @@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
>
> if (!i915_request_completed(rq)) {
> if (llist_add(&rq->watchdog.link, >->watchdog.list))
> - schedule_work(>->watchdog.work);
> + queue_work(i915_wq, >->watchdog.work);
> } else {
> i915_request_put(rq);
> }
> diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
> index dfd87d082218..46bce57c2feb 100644
> --- a/drivers/gpu/drm/i915/intel_wakeref.c
> +++ b/drivers/gpu/drm/i915/intel_wakeref.c
> @@ -9,6 +9,8 @@
> #include "intel_runtime_pm.h"
> #include "intel_wakeref.h"
>
> +extern struct workqueue_struct *i915_wq;
> +
> static void rpm_get(struct intel_wakeref *wf)
> {
> wf->wakeref = intel_runtime_pm_get(wf->rpm);
> @@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
>
> /* Assume we are not in process context and so cannot sleep. */
> if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
> - mod_delayed_work(system_wq, &wf->work,
> + mod_delayed_work(i915_wq, &wf->work,
> FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
> return;
> }
> diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
> index daa985e5a19b..0d3396751ac5 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
> @@ -28,6 +28,8 @@
>
> #include "../i915_selftest.h"
>
> +extern struct workqueue_struct *i915_wq;
> +
> static int
> fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
> {
> @@ -540,7 +542,7 @@ static int test_ipc(void *arg)
>
> ipc.value = 0;
> INIT_WORK_ONSTACK(&ipc.work, task_ipc);
> - schedule_work(&ipc.work);
> + queue_work(i915_wq, &ipc.work);
>
> wait_for_completion(&ipc.started);
>
^ permalink raw reply [flat|nested] 43+ messages in thread
* [PATCH v5] drm/i915: avoid flush_scheduled_work() usage
2023-05-18 14:44 ` [Intel-gfx] " Tetsuo Handa
@ 2023-05-22 10:59 ` Tetsuo Handa
-1 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-05-22 10:59 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
i915 became the last flush_scheduled_work() user, but developers cannot
find time for auditing which work items does this flush_scheduled_work()
need to wait.
Therefore, for now let's start with blind/mechanical conversion within
the whole drivers/gpu/drm/i915/ directory, based on an assumption that
i915 does not need to wait for work items outside of this directory.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Changes in v5:
Renamed the module global workqueue from "i915" to "i915-global",
suggested by Tvrtko Ursulin.
Changes in v4:
Refreshed using drm-tip.git.
Changes in v3:
Refreshed using drm-tip.git, for commit 40053823baad ("drm/i915/display:
move modeset probe/remove functions to intel_display_driver.c") moved
flush_scheduled_work() from intel_display.c to intel_display_driver.c .
Please check the comment from Daniel Vetter at
https://lkml.kernel.org/r/ZDuntOkUeh0Eve8a@phenom.ffwll.local .
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
25 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 09320e14d75c..5f1ba9c908cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7145,7 +7145,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 60ce10fc7205..a20a9cfaab0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -435,7 +435,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4bec8cd7979f..4782bdfc7c61 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5251,7 +5251,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 0952a707358c..06859fb6f30e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1081,7 +1081,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 11bb8cf9c9d0..ba2c5b5c6e14 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1600,7 +1600,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index aab1ae74a8f7..e093270b6a4c 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -689,7 +689,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index dd539106ee5a..d981defc8b0a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1001,7 +1001,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2095,11 +2095,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2398,7 +2398,7 @@ int intel_hdcp_enable(struct intel_atomic_state *state,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2473,7 +2473,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2490,7 +2490,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2609,5 +2609,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 23a5e1a875f1..8247b3e02968 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -212,7 +212,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -339,7 +339,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -446,7 +446,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -577,7 +577,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -687,7 +687,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -715,7 +715,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 5e7ba594e7e7..805bd0442d19 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -882,7 +882,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ea0389c5f656..346ec839ab6c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -341,7 +341,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2453,7 +2453,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2493,7 +2493,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 750326434677..e10d285ddb2c 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2375,7 +2375,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3680,7 +3680,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 8f888d36f16d..5b38e9d53e8d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -376,7 +376,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 195ff72d7a14..f4e986f4c7c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1625,7 +1625,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index e68a99205599..9221d88118e2 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -133,12 +133,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -973,7 +973,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1025,7 +1025,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1041,7 +1041,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1900,7 +1900,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1917,7 +1917,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 14c5338c96a6..18bafa694c35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -931,4 +931,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..f70963540703 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915-global", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] [PATCH v5] drm/i915: avoid flush_scheduled_work() usage
@ 2023-05-22 10:59 ` Tetsuo Handa
0 siblings, 0 replies; 43+ messages in thread
From: Tetsuo Handa @ 2023-05-22 10:59 UTC (permalink / raw)
To: Tvrtko Ursulin, Jani Nikula, Ville Syrjälä
Cc: Intel Graphics Development, DRI
Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
macro") says, flush_scheduled_work() is dangerous and will be forbidden.
i915 became the last flush_scheduled_work() user, but developers cannot
find time for auditing which work items does this flush_scheduled_work()
need to wait.
Therefore, for now let's start with blind/mechanical conversion within
the whole drivers/gpu/drm/i915/ directory, based on an assumption that
i915 does not need to wait for work items outside of this directory.
Link: https://lkml.kernel.org/r/87sfeita1p.fsf@intel.com
Signed-off-by: Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Changes in v5:
Renamed the module global workqueue from "i915" to "i915-global",
suggested by Tvrtko Ursulin.
Changes in v4:
Refreshed using drm-tip.git.
Changes in v3:
Refreshed using drm-tip.git, for commit 40053823baad ("drm/i915/display:
move modeset probe/remove functions to intel_display_driver.c") moved
flush_scheduled_work() from intel_display.c to intel_display_driver.c .
Please check the comment from Daniel Vetter at
https://lkml.kernel.org/r/ZDuntOkUeh0Eve8a@phenom.ffwll.local .
Changes in v2:
Add missing alloc_workqueue() failure check.
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
.../drm/i915/display/intel_dp_link_training.c | 2 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_fbdev.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 18 +++++++++---------
drivers/gpu/drm/i915/display/intel_hotplug.c | 12 ++++++------
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/display/intel_pps.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
.../drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c | 8 ++++----
drivers/gpu/drm/i915/gt/intel_gt_irq.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt_requests.c | 10 +++++-----
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 14 +++++++-------
drivers/gpu/drm/i915/gt/selftest_engine_cs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_module.c | 7 +++++++
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/intel_wakeref.c | 4 +++-
drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 4 +++-
25 files changed, 64 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 09320e14d75c..5f1ba9c908cb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7145,7 +7145,7 @@ intel_atomic_commit_ready(struct i915_sw_fence *fence,
&to_i915(state->base.dev)->display.atomic_helper;
if (llist_add(&state->freed, &helper->free_list))
- schedule_work(&helper->free_work);
+ queue_work(i915_wq, &helper->free_work);
break;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 60ce10fc7205..a20a9cfaab0e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -435,7 +435,7 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
intel_unregister_dsm_handler();
/* flush any delayed tasks or pending work */
- flush_scheduled_work();
+ flush_workqueue(i915_wq);
intel_hdcp_component_fini(i915);
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 8a88de67ff0a..57d015006784 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1057,7 +1057,7 @@ void intel_dmc_init(struct drm_i915_private *i915)
i915->display.dmc.dmc = dmc;
drm_dbg_kms(&i915->drm, "Loading %s\n", dmc->fw_path);
- schedule_work(&dmc->work);
+ queue_work(i915_wq, &dmc->work);
return;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4bec8cd7979f..4782bdfc7c61 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5251,7 +5251,7 @@ static void intel_dp_oob_hotplug_event(struct drm_connector *connector)
spin_lock_irq(&i915->irq_lock);
i915->display.hotplug.event_bits |= BIT(encoder->hpd_pin);
spin_unlock_irq(&i915->irq_lock);
- queue_delayed_work(system_wq, &i915->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &i915->display.hotplug.hotplug_work, 0);
}
static const struct drm_connector_funcs intel_dp_connector_funcs = {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 0952a707358c..06859fb6f30e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -1081,7 +1081,7 @@ static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
}
/* Schedule a Hotplug Uevent to userspace to start modeset */
- schedule_work(&intel_connector->modeset_retry_work);
+ queue_work(i915_wq, &intel_connector->modeset_retry_work);
}
/* Perform the link training on all LTTPRs and the DPRX on a link. */
diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c
index 760e63cdc0c8..8bacb734ad78 100644
--- a/drivers/gpu/drm/i915/display/intel_drrs.c
+++ b/drivers/gpu/drm/i915/display/intel_drrs.c
@@ -111,7 +111,7 @@ static void intel_drrs_set_state(struct intel_crtc *crtc,
static void intel_drrs_schedule_work(struct intel_crtc *crtc)
{
- mod_delayed_work(system_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
+ mod_delayed_work(i915_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
}
static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 11bb8cf9c9d0..ba2c5b5c6e14 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1600,7 +1600,7 @@ static void __intel_fbc_handle_fifo_underrun_irq(struct intel_fbc *fbc)
if (READ_ONCE(fbc->underrun_detected))
return;
- schedule_work(&fbc->underrun_work);
+ queue_work(i915_wq, &fbc->underrun_work);
}
/**
diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c
index aab1ae74a8f7..e093270b6a4c 100644
--- a/drivers/gpu/drm/i915/display/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
@@ -689,7 +689,7 @@ void intel_fbdev_set_suspend(struct drm_device *dev, int state, bool synchronous
/* Don't block our own workqueue as this can
* be run in parallel with other i915.ko tasks.
*/
- schedule_work(&dev_priv->display.fbdev.suspend_work);
+ queue_work(i915_wq, &dev_priv->display.fbdev.suspend_work);
return;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index dd539106ee5a..d981defc8b0a 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1001,7 +1001,7 @@ static void intel_hdcp_update_value(struct intel_connector *connector,
hdcp->value = value;
if (update_property) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2095,11 +2095,11 @@ static void intel_hdcp_check_work(struct work_struct *work)
return;
if (!intel_hdcp2_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP2_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP2_CHECK_PERIOD_MS);
else if (!intel_hdcp_check_link(connector))
- schedule_delayed_work(&hdcp->check_work,
- DRM_HDCP_CHECK_PERIOD_MS);
+ queue_delayed_work(i915_wq, &hdcp->check_work,
+ DRM_HDCP_CHECK_PERIOD_MS);
}
static int i915_hdcp_component_bind(struct device *i915_kdev,
@@ -2398,7 +2398,7 @@ int intel_hdcp_enable(struct intel_atomic_state *state,
}
if (!ret) {
- schedule_delayed_work(&hdcp->check_work, check_link_interval);
+ queue_delayed_work(i915_wq, &hdcp->check_work, check_link_interval);
intel_hdcp_update_value(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED,
true);
@@ -2473,7 +2473,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
mutex_lock(&hdcp->mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
mutex_unlock(&hdcp->mutex);
}
@@ -2490,7 +2490,7 @@ void intel_hdcp_update_pipe(struct intel_atomic_state *state,
*/
if (!desired_and_not_enabled && !content_protection_type_changed) {
drm_connector_get(&connector->base);
- schedule_work(&hdcp->prop_work);
+ queue_work(i915_wq, &hdcp->prop_work);
}
}
@@ -2609,5 +2609,5 @@ void intel_hdcp_handle_cp_irq(struct intel_connector *connector)
atomic_inc(&connector->hdcp.cp_irq_count);
wake_up_all(&connector->hdcp.cp_irq_queue);
- schedule_delayed_work(&hdcp->check_work, 0);
+ queue_delayed_work(i915_wq, &hdcp->check_work, 0);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hotplug.c b/drivers/gpu/drm/i915/display/intel_hotplug.c
index 23a5e1a875f1..8247b3e02968 100644
--- a/drivers/gpu/drm/i915/display/intel_hotplug.c
+++ b/drivers/gpu/drm/i915/display/intel_hotplug.c
@@ -212,7 +212,7 @@ intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
/* Enable polling and queue hotplug re-enabling. */
if (hpd_disabled) {
drm_kms_helper_poll_enable(&dev_priv->drm);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.reenable_work,
msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
}
}
@@ -339,7 +339,7 @@ static void i915_digport_work_func(struct work_struct *work)
spin_lock_irq(&dev_priv->irq_lock);
dev_priv->display.hotplug.event_bits |= old_bits;
spin_unlock_irq(&dev_priv->irq_lock);
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
}
@@ -446,7 +446,7 @@ static void i915_hotplug_work_func(struct work_struct *work)
dev_priv->display.hotplug.retry_bits |= retry;
spin_unlock_irq(&dev_priv->irq_lock);
- mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
+ mod_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work,
msecs_to_jiffies(HPD_RETRY_DELAY));
}
}
@@ -577,7 +577,7 @@ void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
if (queue_dig)
queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
if (queue_hp)
- queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
+ queue_delayed_work(i915_wq, &dev_priv->display.hotplug.hotplug_work, 0);
}
/**
@@ -687,7 +687,7 @@ void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
* As well, there's no issue if we race here since we always reschedule
* this worker anyway
*/
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
/**
@@ -715,7 +715,7 @@ void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
return;
WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
- schedule_work(&dev_priv->display.hotplug.poll_init_work);
+ queue_work(i915_wq, &dev_priv->display.hotplug.poll_init_work);
}
void intel_hpd_init_early(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index b7973a05d022..24c0a4abcc4d 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -635,7 +635,7 @@ static void asle_work(struct work_struct *work)
void intel_opregion_asle_intr(struct drm_i915_private *dev_priv)
{
if (dev_priv->display.opregion.asle)
- schedule_work(&dev_priv->display.opregion.asle_work);
+ queue_work(i915_wq, &dev_priv->display.opregion.asle_work);
}
#define ACPI_EV_DISPLAY_SWITCH (1<<0)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c
index 5e7ba594e7e7..805bd0442d19 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -882,7 +882,7 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)
* operations.
*/
delay = msecs_to_jiffies(intel_dp->pps.panel_power_cycle_delay * 5);
- schedule_delayed_work(&intel_dp->pps.panel_vdd_work, delay);
+ queue_delayed_work(i915_wq, &intel_dp->pps.panel_vdd_work, delay);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index ea0389c5f656..346ec839ab6c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -341,7 +341,7 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir)
*/
intel_de_rmw(dev_priv, imr_reg, 0, psr_irq_psr_error_bit_get(intel_dp));
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
@@ -2453,7 +2453,7 @@ tgl_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits,
return;
tgl_psr2_enable_dc3co(intel_dp);
- mod_delayed_work(system_wq, &intel_dp->psr.dc3co_work,
+ mod_delayed_work(i915_wq, &intel_dp->psr.dc3co_work,
intel_dp->psr.dc3co_exit_delay);
}
@@ -2493,7 +2493,7 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
psr_force_hw_tracking_exit(intel_dp);
if (!intel_dp->psr.active && !intel_dp->psr.busy_frontbuffer_bits)
- schedule_work(&intel_dp->psr.work);
+ queue_work(i915_wq, &intel_dp->psr.work);
}
}
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 750326434677..e10d285ddb2c 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2375,7 +2375,7 @@ static void execlists_capture(struct intel_engine_cs *engine)
goto err_rq;
INIT_WORK(&cap->work, execlists_capture_work);
- schedule_work(&cap->work);
+ queue_work(i915_wq, &cap->work);
return;
err_rq:
@@ -3680,7 +3680,7 @@ static void virtual_context_destroy(struct kref *kref)
* lock, we can delegate the free of the engine to an RCU worker.
*/
INIT_RCU_WORK(&ve->rcu, rcu_virtual_context_destroy);
- queue_rcu_work(system_wq, &ve->rcu);
+ queue_rcu_work(i915_wq, &ve->rcu);
}
static void virtual_engine_initial_hint(struct virtual_engine *ve)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
index cadfd85785b1..54aa90dff33f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.c
@@ -90,8 +90,8 @@ static void pool_free_work(struct work_struct *wrk)
container_of(wrk, typeof(*pool), work.work);
if (pool_free_older_than(pool, HZ))
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
static void pool_retire(struct i915_active *ref)
@@ -116,8 +116,8 @@ static void pool_retire(struct i915_active *ref)
WRITE_ONCE(node->age, jiffies ?: 1); /* 0 reserved for active nodes */
spin_unlock_irqrestore(&pool->lock, flags);
- schedule_delayed_work(&pool->work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, &pool->work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_buffer_pool_mark_used(struct intel_gt_buffer_pool_node *node)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
index 8f888d36f16d..5b38e9d53e8d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
@@ -376,7 +376,7 @@ static void gen7_parity_error_irq_handler(struct intel_gt *gt, u32 iir)
if (iir & GT_RENDER_L3_PARITY_ERROR_INTERRUPT)
gt->i915->l3_parity.which_slice |= 1 << 0;
- schedule_work(>->i915->l3_parity.error_work);
+ queue_work(i915_wq, >->i915->l3_parity.error_work);
}
void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
index 1dfd01668c79..683dc55d9191 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c
@@ -116,7 +116,7 @@ void intel_engine_add_retire(struct intel_engine_cs *engine,
GEM_BUG_ON(intel_engine_is_virtual(engine));
if (add_retire(engine, tl))
- schedule_work(&engine->retire_work);
+ queue_work(i915_wq, &engine->retire_work);
}
void intel_engine_init_retire(struct intel_engine_cs *engine)
@@ -207,8 +207,8 @@ static void retire_work_handler(struct work_struct *work)
struct intel_gt *gt =
container_of(work, typeof(*gt), requests.retire_work.work);
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
intel_gt_retire_requests(gt);
}
@@ -224,8 +224,8 @@ void intel_gt_park_requests(struct intel_gt *gt)
void intel_gt_unpark_requests(struct intel_gt *gt)
{
- schedule_delayed_work(>->requests.retire_work,
- round_jiffies_up_relative(HZ));
+ queue_delayed_work(i915_wq, >->requests.retire_work,
+ round_jiffies_up_relative(HZ));
}
void intel_gt_fini_requests(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 195ff72d7a14..f4e986f4c7c9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1625,7 +1625,7 @@ void __intel_init_wedge(struct intel_wedge_me *w,
w->name = name;
INIT_DELAYED_WORK_ONSTACK(&w->work, intel_wedge_me);
- schedule_delayed_work(&w->work, timeout);
+ queue_delayed_work(i915_wq, &w->work, timeout);
}
void __intel_fini_wedge(struct intel_wedge_me *w)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index e68a99205599..9221d88118e2 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -133,12 +133,12 @@ static void rps_timer(struct timer_list *t)
rps->cur_freq < rps->max_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_UP_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else if (100 * busy < rps->power.down_threshold * dt &&
rps->cur_freq > rps->min_freq_softlimit) {
rps->pm_iir |= GEN6_PM_RP_DOWN_THRESHOLD;
rps->pm_interval = 1;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
} else {
rps->last_adj = 0;
}
@@ -973,7 +973,7 @@ static int rps_set_boost_freq(struct intel_rps *rps, u32 val)
}
mutex_unlock(&rps->lock);
if (boost)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
return 0;
}
@@ -1025,7 +1025,7 @@ void intel_rps_boost(struct i915_request *rq)
if (!atomic_fetch_inc(&slpc->num_waiters)) {
GT_TRACE(rps_to_gt(rps), "boost fence:%llx:%llx\n",
rq->fence.context, rq->fence.seqno);
- schedule_work(&slpc->boost_work);
+ queue_work(i915_wq, &slpc->boost_work);
}
return;
@@ -1041,7 +1041,7 @@ void intel_rps_boost(struct i915_request *rq)
rq->fence.context, rq->fence.seqno);
if (READ_ONCE(rps->cur_freq) < rps->boost_freq)
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
WRITE_ONCE(rps->boosts, rps->boosts + 1); /* debug only */
}
@@ -1900,7 +1900,7 @@ void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
}
void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
@@ -1917,7 +1917,7 @@ void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir)
gen6_gt_pm_mask_irq(gt, events);
rps->pm_iir |= events;
- schedule_work(&rps->work);
+ queue_work(i915_wq, &rps->work);
spin_unlock(gt->irq_lock);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
index 542ce6d2de19..6938b5661f72 100644
--- a/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/selftest_engine_cs.c
@@ -27,7 +27,7 @@ static void perf_begin(struct intel_gt *gt)
/* Boost gpufreq to max [waitboost] and keep it fixed */
atomic_inc(>->rps.num_waiters);
- schedule_work(>->rps.work);
+ queue_work(i915_wq, >->rps.work);
flush_work(>->rps.work);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 14c5338c96a6..18bafa694c35 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -931,4 +931,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
+extern struct workqueue_struct *i915_wq;
#endif
diff --git a/drivers/gpu/drm/i915/i915_module.c b/drivers/gpu/drm/i915/i915_module.c
index 65acd7bf75d0..f70963540703 100644
--- a/drivers/gpu/drm/i915/i915_module.c
+++ b/drivers/gpu/drm/i915/i915_module.c
@@ -19,6 +19,8 @@
#include "i915_vma.h"
#include "i915_vma_resource.h"
+struct workqueue_struct *i915_wq;
+
static int i915_check_nomodeset(void)
{
bool use_kms = true;
@@ -79,6 +81,9 @@ static int __init i915_init(void)
{
int err, i;
+ i915_wq = alloc_workqueue("i915-global", 0, 0);
+ if (!i915_wq)
+ return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(init_funcs); i++) {
err = init_funcs[i].init();
if (err < 0) {
@@ -86,6 +91,7 @@ static int __init i915_init(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
return err;
} else if (err > 0) {
/*
@@ -113,6 +119,7 @@ static void __exit i915_exit(void)
if (init_funcs[i].exit)
init_funcs[i].exit();
}
+ destroy_workqueue(i915_wq);
}
module_init(i915_init);
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 630a732aaecc..c4fc7b6f740c 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -290,7 +290,7 @@ static enum hrtimer_restart __rq_watchdog_expired(struct hrtimer *hrtimer)
if (!i915_request_completed(rq)) {
if (llist_add(&rq->watchdog.link, >->watchdog.list))
- schedule_work(>->watchdog.work);
+ queue_work(i915_wq, >->watchdog.work);
} else {
i915_request_put(rq);
}
diff --git a/drivers/gpu/drm/i915/intel_wakeref.c b/drivers/gpu/drm/i915/intel_wakeref.c
index dfd87d082218..46bce57c2feb 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.c
+++ b/drivers/gpu/drm/i915/intel_wakeref.c
@@ -9,6 +9,8 @@
#include "intel_runtime_pm.h"
#include "intel_wakeref.h"
+extern struct workqueue_struct *i915_wq;
+
static void rpm_get(struct intel_wakeref *wf)
{
wf->wakeref = intel_runtime_pm_get(wf->rpm);
@@ -74,7 +76,7 @@ void __intel_wakeref_put_last(struct intel_wakeref *wf, unsigned long flags)
/* Assume we are not in process context and so cannot sleep. */
if (flags & INTEL_WAKEREF_PUT_ASYNC || !mutex_trylock(&wf->mutex)) {
- mod_delayed_work(system_wq, &wf->work,
+ mod_delayed_work(i915_wq, &wf->work,
FIELD_GET(INTEL_WAKEREF_PUT_DELAY, flags));
return;
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
index daa985e5a19b..0d3396751ac5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
+++ b/drivers/gpu/drm/i915/selftests/i915_sw_fence.c
@@ -28,6 +28,8 @@
#include "../i915_selftest.h"
+extern struct workqueue_struct *i915_wq;
+
static int
fence_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
{
@@ -540,7 +542,7 @@ static int test_ipc(void *arg)
ipc.value = 0;
INIT_WORK_ONSTACK(&ipc.work, task_ipc);
- schedule_work(&ipc.work);
+ queue_work(i915_wq, &ipc.work);
wait_for_completion(&ipc.started);
--
2.18.4
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: avoid flush_scheduled_work() usage (rev6)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (12 preceding siblings ...)
(?)
@ 2023-05-22 13:54 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-22 13:54 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev6)
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: git fetch origin failed
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: avoid flush_scheduled_work() usage (rev6)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (13 preceding siblings ...)
(?)
@ 2023-05-22 13:55 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-22 13:55 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev6)
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: git fetch origin failed
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid flush_scheduled_work() usage (rev6)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (14 preceding siblings ...)
(?)
@ 2023-05-22 13:55 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-22 13:55 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev6)
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: avoid flush_scheduled_work() usage (rev6)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (15 preceding siblings ...)
(?)
@ 2023-05-22 13:55 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-22 13:55 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev6)
URL : https://patchwork.freedesktop.org/series/114608/
State : warning
== Summary ==
Error: git fetch origin failed
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: avoid flush_scheduled_work() usage (rev6)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (16 preceding siblings ...)
(?)
@ 2023-05-22 14:18 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-22 14:18 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3968 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev6)
URL : https://patchwork.freedesktop.org/series/114608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13173 -> Patchwork_114608v6
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/index.html
Participating hosts (38 -> 37)
------------------------------
Additional (1): bat-adlp-11
Missing (2): fi-snb-2520m bat-mtlp-6
Known issues
------------
Here are the changes found in Patchwork_114608v6 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@migrate:
- bat-dg2-11: [PASS][1] -> [DMESG-WARN][2] ([i915#7699])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/bat-dg2-11/igt@i915_selftest@live@migrate.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/bat-dg2-11/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@requests:
- bat-rpls-1: [PASS][3] -> [ABORT][4] ([i915#4983] / [i915#7911] / [i915#7920])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/bat-rpls-1/igt@i915_selftest@live@requests.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/bat-rpls-1/igt@i915_selftest@live@requests.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][5] ([i915#1845] / [i915#5354]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_pm:
- bat-rpls-2: [DMESG-FAIL][6] ([i915#4258] / [i915#7913]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
* igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1:
- bat-dg2-8: [FAIL][8] ([i915#7932]) -> [PASS][9] +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/bat-dg2-8/igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
[i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
[i915#8189]: https://gitlab.freedesktop.org/drm/intel/issues/8189
Build changes
-------------
* Linux: CI_DRM_13173 -> Patchwork_114608v6
CI-20190529: 20190529
CI_DRM_13173: ec24952f0cdb991b5a210ade43a479d293c054d6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7299: 3effd4be7f6c867d942532b3fe18d6c54fffbd7a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v6: ec24952f0cdb991b5a210ade43a479d293c054d6 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
39c73e5f19ed drm/i915: avoid flush_scheduled_work() usage
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/index.html
[-- Attachment #2: Type: text/html, Size: 4561 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: avoid flush_scheduled_work() usage (rev6)
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
` (17 preceding siblings ...)
(?)
@ 2023-05-22 20:19 ` Patchwork
-1 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2023-05-22 20:19 UTC (permalink / raw)
To: Tetsuo Handa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 19228 bytes --]
== Series Details ==
Series: drm/i915: avoid flush_scheduled_work() usage (rev6)
URL : https://patchwork.freedesktop.org/series/114608/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13173_full -> Patchwork_114608v6_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (7 -> 7)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_114608v6_full:
### IGT changes ###
#### Possible regressions ####
* {igt@kms_display_modes@extended-mode-basic@pipe-a-hdmi-a-1-pipe-b-vga-1} (NEW):
- shard-snb: NOTRUN -> [FAIL][1] +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-snb1/igt@kms_display_modes@extended-mode-basic@pipe-a-hdmi-a-1-pipe-b-vga-1.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_mmap_offset@clear@smem0:
- {shard-dg1}: [PASS][2] -> [DMESG-FAIL][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-dg1-14/igt@gem_mmap_offset@clear@smem0.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-dg1-14/igt@gem_mmap_offset@clear@smem0.html
New tests
---------
New tests have been introduced between CI_DRM_13173_full and Patchwork_114608v6_full:
### New IGT tests (4) ###
* igt@kms_display_modes@extended-mode-basic@pipe-a-hdmi-a-1-pipe-b-vga-1:
- Statuses : 1 fail(s)
- Exec time: [0.0] s
* igt@kms_display_modes@extended-mode-basic@pipe-a-vga-1-pipe-b-hdmi-a-1:
- Statuses : 1 fail(s)
- Exec time: [0.0] s
* igt@kms_display_modes@extended-mode-basic@pipe-b-hdmi-a-1-pipe-a-vga-1:
- Statuses : 1 fail(s)
- Exec time: [0.0] s
* igt@kms_display_modes@extended-mode-basic@pipe-b-vga-1-pipe-a-hdmi-a-1:
- Statuses : 1 fail(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_114608v6_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_close_race@multigpu-basic-process:
- shard-apl: NOTRUN -> [SKIP][4] ([fdo#109271]) +61 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_exec_capture@capture-invisible@smem0:
- shard-apl: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4579] / [i915#6334])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl7/igt@gem_exec_capture@capture-invisible@smem0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [PASS][6] -> [FAIL][7] ([i915#2842])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-apl: NOTRUN -> [FAIL][8] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_lmem_evict@dontneed-evict-race:
- shard-glk: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#4613])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk3/igt@gem_lmem_evict@dontneed-evict-race.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-apl: NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#4613]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_pread@exhaustion:
- shard-glk: NOTRUN -> [WARN][11] ([i915#2658])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk3/igt@gem_pread@exhaustion.html
* igt@gem_userptr_blits@vma-merge:
- shard-apl: NOTRUN -> [FAIL][12] ([i915#3318])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@gem_userptr_blits@vma-merge.html
* igt@i915_pm_rps@engine-order:
- shard-apl: NOTRUN -> [FAIL][13] ([i915#6537])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@i915_pm_rps@engine-order.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#3886])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium_hpd@vga-hpd:
- shard-glk: NOTRUN -> [SKIP][15] ([fdo#109271]) +16 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk3/igt@kms_chamelium_hpd@vga-hpd.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-glk: [PASS][16] -> [FAIL][17] ([i915#2346])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][18] ([i915#4573]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk3/igt@kms_plane_alpha_blend@alpha-transparent-fb@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-c-dp-1:
- shard-apl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4579]) +5 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-25@pipe-c-dp-1.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-vga-1:
- shard-snb: NOTRUN -> [SKIP][20] ([fdo#109271]) +13 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-snb6/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-a-vga-1.html
* igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-b-vga-1:
- shard-snb: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4579]) +10 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-snb6/igt@kms_plane_scaling@plane-upscale-with-modifiers-factor-0-25@pipe-b-vga-1.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#658])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl7/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_setmode@basic@pipe-a-vga-1:
- shard-snb: NOTRUN -> [FAIL][23] ([i915#5465]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-snb6/igt@kms_setmode@basic@pipe-a-vga-1.html
#### Possible fixes ####
* igt@gem_ctx_exec@basic-nohangcheck:
- {shard-rkl}: [FAIL][24] ([i915#6268]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-rkl-2/igt@gem_ctx_exec@basic-nohangcheck.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-rkl-6/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_eio@hibernate:
- {shard-tglu}: [ABORT][26] ([i915#7975] / [i915#8213] / [i915#8398]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-tglu-10/igt@gem_eio@hibernate.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-tglu-6/igt@gem_eio@hibernate.html
* igt@gem_eio@unwedge-stress:
- {shard-dg1}: [FAIL][28] ([i915#5784]) -> [PASS][29] +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-dg1-16/igt@gem_eio@unwedge-stress.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-dg1-15/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_endless@dispatch@vcs0:
- {shard-tglu}: [TIMEOUT][30] ([i915#3778] / [i915#7941]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-tglu-7/igt@gem_exec_endless@dispatch@vcs0.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-tglu-6/igt@gem_exec_endless@dispatch@vcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- {shard-rkl}: [FAIL][32] ([i915#2842]) -> [PASS][33] +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-rkl-3/igt@gem_exec_fair@basic-none@vecs0.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-rkl-7/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_whisper@basic-fds-priority-all:
- {shard-tglu}: [INCOMPLETE][34] ([i915#6755] / [i915#7392] / [i915#7967]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-tglu-10/igt@gem_exec_whisper@basic-fds-priority-all.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-tglu-2/igt@gem_exec_whisper@basic-fds-priority-all.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- {shard-dg1}: [TIMEOUT][36] ([i915#5493]) -> [PASS][37]
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-dg1-16/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@i915_pm_dc@dc9-dpms:
- {shard-tglu}: [SKIP][38] ([i915#4281]) -> [PASS][39]
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-tglu-3/igt@i915_pm_dc@dc9-dpms.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-tglu-10/igt@i915_pm_dc@dc9-dpms.html
* igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
- {shard-rkl}: [SKIP][40] ([i915#1397]) -> [PASS][41]
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-rkl-3/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-rkl-7/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-snb: [SKIP][42] ([fdo#109271]) -> [PASS][43]
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-snb1/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-snb1/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [FAIL][44] ([i915#2346]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][46] ([i915#2122]) -> [PASS][47] +1 similar issue
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][48] ([i915#79]) -> [PASS][49] +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
- {shard-dg1}: [DMESG-WARN][50] -> [PASS][51]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-dg1-17/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
* igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1:
- shard-apl: [ABORT][52] ([i915#180]) -> [PASS][53] +1 similar issue
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-apl2/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-apl4/igt@kms_hdr@bpc-switch-suspend@pipe-a-dp-1.html
* {igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2}:
- {shard-rkl}: [FAIL][54] ([i915#8292]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-rkl-1/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-rkl-4/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-2.html
* igt@perf@stress-open-close@0-rcs0:
- shard-glk: [ABORT][56] ([i915#5213] / [i915#7941]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13173/shard-glk1/igt@perf@stress-open-close@0-rcs0.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/shard-glk3/igt@perf@stress-open-close@0-rcs0.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3778]: https://gitlab.freedesktop.org/drm/intel/issues/3778
[i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
[i915#4573]: https://gitlab.freedesktop.org/drm/intel/issues/4573
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6755]: https://gitlab.freedesktop.org/drm/intel/issues/6755
[i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#7941]: https://gitlab.freedesktop.org/drm/intel/issues/7941
[i915#7967]: https://gitlab.freedesktop.org/drm/intel/issues/7967
[i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
[i915#8011]: https://gitlab.freedesktop.org/drm/intel/issues/8011
[i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8398]: https://gitlab.freedesktop.org/drm/intel/issues/8398
[i915#8502]: https://gitlab.freedesktop.org/drm/intel/issues/8502
Build changes
-------------
* Linux: CI_DRM_13173 -> Patchwork_114608v6
CI-20190529: 20190529
CI_DRM_13173: ec24952f0cdb991b5a210ade43a479d293c054d6 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7299: 3effd4be7f6c867d942532b3fe18d6c54fffbd7a @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_114608v6: ec24952f0cdb991b5a210ade43a479d293c054d6 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_114608v6/index.html
[-- Attachment #2: Type: text/html, Size: 19359 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [PATCH v5] drm/i915: avoid flush_scheduled_work() usage
2023-05-22 10:59 ` [Intel-gfx] " Tetsuo Handa
@ 2023-06-10 7:01 ` Jani Nikula
-1 siblings, 0 replies; 43+ messages in thread
From: Jani Nikula @ 2023-06-10 7:01 UTC (permalink / raw)
To: Tetsuo Handa, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, Luca Coelho, DRI
On Mon, 22 May 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>
> i915 became the last flush_scheduled_work() user, but developers cannot
> find time for auditing which work items does this flush_scheduled_work()
> need to wait.
>
> Therefore, for now let's start with blind/mechanical conversion within
> the whole drivers/gpu/drm/i915/ directory, based on an assumption that
> i915 does not need to wait for work items outside of this directory.
I'll note also here that I've just pushed Luca's series [1] to switch
i915 to internal device specific workqueues, for the same effect as this
one.
Thanks,
Jani.
[1] https://patchwork.freedesktop.org/series/118947/
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [Intel-gfx] [PATCH v5] drm/i915: avoid flush_scheduled_work() usage
@ 2023-06-10 7:01 ` Jani Nikula
0 siblings, 0 replies; 43+ messages in thread
From: Jani Nikula @ 2023-06-10 7:01 UTC (permalink / raw)
To: Tetsuo Handa, Tvrtko Ursulin, Ville Syrjälä
Cc: Intel Graphics Development, Luca Coelho, DRI
On Mon, 22 May 2023, Tetsuo Handa <penguin-kernel@I-love.SAKURA.ne.jp> wrote:
> Like commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a
> macro") says, flush_scheduled_work() is dangerous and will be forbidden.
>
> i915 became the last flush_scheduled_work() user, but developers cannot
> find time for auditing which work items does this flush_scheduled_work()
> need to wait.
>
> Therefore, for now let's start with blind/mechanical conversion within
> the whole drivers/gpu/drm/i915/ directory, based on an assumption that
> i915 does not need to wait for work items outside of this directory.
I'll note also here that I've just pushed Luca's series [1] to switch
i915 to internal device specific workqueues, for the same effect as this
one.
Thanks,
Jani.
[1] https://patchwork.freedesktop.org/series/118947/
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 43+ messages in thread
end of thread, other threads:[~2023-06-10 7:01 UTC | newest]
Thread overview: 43+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-03 10:11 [PATCH] drm/i915: avoid flush_scheduled_work() usage Tetsuo Handa
2023-03-03 10:11 ` [Intel-gfx] " Tetsuo Handa
2023-03-03 10:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2023-03-03 11:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-03 12:49 ` [PATCH] " Tetsuo Handa
2023-03-03 12:49 ` [Intel-gfx] " Tetsuo Handa
2023-03-06 11:05 ` Jani Nikula
2023-03-06 11:05 ` [Intel-gfx] " Jani Nikula
2023-03-06 11:17 ` Tetsuo Handa
2023-03-06 11:17 ` [Intel-gfx] " Tetsuo Handa
2023-03-06 18:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
2023-03-14 11:21 ` [PATCH v2] " Tetsuo Handa
2023-03-14 11:21 ` [Intel-gfx] " Tetsuo Handa
2023-03-15 10:47 ` Luca Coelho
2023-04-14 10:01 ` Tetsuo Handa
2023-04-14 10:13 ` Jani Nikula
2023-04-14 10:52 ` Tetsuo Handa
2023-04-16 7:45 ` Daniel Vetter
2023-04-16 7:45 ` Daniel Vetter
2023-05-03 10:06 ` Jani Nikula
2023-05-03 10:06 ` Jani Nikula
2023-05-03 14:00 ` [PATCH v3] " Tetsuo Handa
2023-05-03 14:00 ` [Intel-gfx] " Tetsuo Handa
2023-05-18 14:44 ` [PATCH v4] " Tetsuo Handa
2023-05-18 14:44 ` [Intel-gfx] " Tetsuo Handa
2023-05-19 8:02 ` Tvrtko Ursulin
2023-05-22 10:59 ` [PATCH v5] " Tetsuo Handa
2023-05-22 10:59 ` [Intel-gfx] " Tetsuo Handa
2023-06-10 7:01 ` Jani Nikula
2023-06-10 7:01 ` [Intel-gfx] " Jani Nikula
2023-05-03 14:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid flush_scheduled_work() usage (rev3) Patchwork
2023-05-03 14:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-05-04 19:49 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid flush_scheduled_work() usage (rev4) Patchwork
2023-05-04 20:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-05 6:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-05-18 15:22 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: avoid flush_scheduled_work() usage (rev5) Patchwork
2023-05-18 15:39 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-05-22 13:54 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning for drm/i915: avoid flush_scheduled_work() usage (rev6) Patchwork
2023-05-22 13:55 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: " Patchwork
2023-05-22 13:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-05-22 13:55 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-05-22 14:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-05-22 20:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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