[PATCH igt 1/5] igt/perf_pmu: Tighten busy measurement

[PATCH igt 1/5] igt/perf_pmu: Tighten busy measurement

[Chris Wilson]

Sleep for a known duration. In particular, CI once saw a measurement for
busyness greater than the intended batch_duration!

v2: Go back to starting pmu sampling outside of spinner; the GPU should
be idle.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104241
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index db7696115..38fd05dc9 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -103,7 +103,7 @@ static void pmu_read_multi(int fd, unsigned int num, uint64_t *val)
 	igt_assert_f((double)(x) <= (1.0 + (tolerance)) * (double)(ref) && \
 		     (double)(x) >= (1.0 - (tolerance)) * (double)(ref), \
 		     "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
-		     #x, #ref, (double)(x), (tolerance) * 100.0, (double)ref)
+		     #x, #ref, (double)(x), (tolerance) * 100.0, (double)(ref))
 
 /*
  * Helper for cases where we assert on time spent sleeping (directly or
@@ -133,30 +133,28 @@ static unsigned int e2ring(int gem_fd, const struct intel_execution_engine2 *e)
 static void
 single(int gem_fd, const struct intel_execution_engine2 *e, bool busy)
 {
-	double ref = busy ? batch_duration_ns : 0.0f;
+	unsigned long slept;
 	igt_spin_t *spin;
 	uint64_t val;
 	int fd;
 
 	fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
 
-	if (busy) {
+	if (busy)
 		spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
-		igt_spin_batch_set_timeout(spin, batch_duration_ns);
-	} else {
-		usleep(batch_duration_ns / 1000);
-	}
+	else
+		spin = NULL;
 
-	if (busy)
-		gem_sync(gem_fd, spin->handle);
+	slept = measured_usleep(batch_duration_ns / 1000);
+	igt_spin_batch_end(spin);
 
 	val = pmu_read_single(fd);
 
-	if (busy)
-		igt_spin_batch_free(gem_fd, spin);
+	igt_spin_batch_free(gem_fd, spin);
 	close(fd);
 
-	assert_within_epsilon(val, ref, tolerance);
+	assert_within_epsilon(val, busy ? slept : 0.f, tolerance);
+	gem_quiescent_gpu(gem_fd);
 }
 
 static void log_busy(int fd, unsigned int num_engines, uint64_t *val)
-- 
2.15.1

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[PATCH igt 2/5] igt/perf_pmu: Tighten measurements for most-busy

[Chris Wilson]

Create all the spinners before starting the sampler and then measure how
long we sleep.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104160
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 45 +++++++++++++++++++++++++--------------------
 1 file changed, 25 insertions(+), 20 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 38fd05dc9..96091b853 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -228,53 +228,58 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
 	const struct intel_execution_engine2 *e_;
 	uint64_t val[num_engines];
 	int fd[num_engines];
-	igt_spin_t *spin[num_engines];
+	unsigned long slept;
+	igt_spin_t *spin = NULL;
 	unsigned int idle_idx, i;
 
 	gem_require_engine(gem_fd, e->class, e->instance);
 
 	i = 0;
-	fd[0] = -1;
 	for_each_engine_class_instance(fd, e_) {
 		if (!gem_has_engine(gem_fd, e_->class, e_->instance))
 			continue;
 
-		fd[i] = open_group(I915_PMU_ENGINE_BUSY(e_->class,
-							e_->instance),
-				   fd[0]);
-
 		if (e == e_) {
 			idle_idx = i;
+		} else if (spin) {
+			struct drm_i915_gem_exec_object2 obj = {
+				.handle = spin->handle
+			};
+			struct drm_i915_gem_execbuffer2 eb = {
+				.buffer_count = 1,
+				.buffers_ptr = to_user_pointer(&obj),
+				.flags = e2ring(gem_fd, e_),
+			};
+			gem_execbuf(gem_fd, &eb);
 		} else {
-			spin[i] = igt_spin_batch_new(gem_fd, 0,
-						     e2ring(gem_fd, e_), 0);
-			igt_spin_batch_set_timeout(spin[i], batch_duration_ns);
+			spin = igt_spin_batch_new(gem_fd, 0,
+						  e2ring(gem_fd, e_), 0);
 		}
 
-		i++;
+		val[i++] = I915_PMU_ENGINE_BUSY(e_->class, e_->instance);
 	}
+	igt_assert(i == num_engines);
 
-	for (i = 0; i < num_engines; i++) {
-		if (i != idle_idx)
-			gem_sync(gem_fd, spin[i]->handle);
-	}
+	fd[0] = -1;
+	for (i = 0; i < num_engines; i++)
+		fd[i] = open_group(val[i], fd[0]);
+
+	slept = measured_usleep(batch_duration_ns / 1000);
+	igt_spin_batch_end(spin);
 
 	pmu_read_multi(fd[0], num_engines, val);
 	log_busy(fd[0], num_engines, val);
 
-	for (i = 0; i < num_engines; i++) {
-		if (i != idle_idx)
-			igt_spin_batch_free(gem_fd, spin[i]);
-	}
+	igt_spin_batch_free(gem_fd, spin);
 	close(fd[0]);
 
 	for (i = 0; i < num_engines; i++) {
 		if (i == idle_idx)
 			assert_within_epsilon(val[i], 0.0f, tolerance);
 		else
-			assert_within_epsilon(val[i], batch_duration_ns,
-					      tolerance);
+			assert_within_epsilon(val[i], slept, tolerance);
 	}
+	gem_quiescent_gpu(gem_fd);
 }
 
 static void
-- 
2.15.1

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Re: [PATCH igt 2/5] igt/perf_pmu: Tighten measurements for most-busy

[Tvrtko Ursulin]

On 22/12/2017 11:03, Chris Wilson wrote:
> Create all the spinners before starting the sampler and then measure how
> long we sleep.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104160
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   tests/perf_pmu.c | 45 +++++++++++++++++++++++++--------------------
>   1 file changed, 25 insertions(+), 20 deletions(-)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index 38fd05dc9..96091b853 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -228,53 +228,58 @@ most_busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>   	const struct intel_execution_engine2 *e_;
>   	uint64_t val[num_engines];
>   	int fd[num_engines];
> -	igt_spin_t *spin[num_engines];
> +	unsigned long slept;
> +	igt_spin_t *spin = NULL;
>   	unsigned int idle_idx, i;
>   
>   	gem_require_engine(gem_fd, e->class, e->instance);
>   
>   	i = 0;
> -	fd[0] = -1;
>   	for_each_engine_class_instance(fd, e_) {
>   		if (!gem_has_engine(gem_fd, e_->class, e_->instance))
>   			continue;
>   
> -		fd[i] = open_group(I915_PMU_ENGINE_BUSY(e_->class,
> -							e_->instance),
> -				   fd[0]);
> -
>   		if (e == e_) {
>   			idle_idx = i;
> +		} else if (spin) {
> +			struct drm_i915_gem_exec_object2 obj = {
> +				.handle = spin->handle
> +			};
> +			struct drm_i915_gem_execbuffer2 eb = {
> +				.buffer_count = 1,
> +				.buffers_ptr = to_user_pointer(&obj),
> +				.flags = e2ring(gem_fd, e_),
> +			};
> +			gem_execbuf(gem_fd, &eb);

Evil.

>   		} else {
> -			spin[i] = igt_spin_batch_new(gem_fd, 0,
> -						     e2ring(gem_fd, e_), 0);
> -			igt_spin_batch_set_timeout(spin[i], batch_duration_ns);
> +			spin = igt_spin_batch_new(gem_fd, 0,
> +						  e2ring(gem_fd, e_), 0);
>   		}
>   
> -		i++;
> +		val[i++] = I915_PMU_ENGINE_BUSY(e_->class, e_->instance);
>   	}
> +	igt_assert(i == num_engines);
>   
> -	for (i = 0; i < num_engines; i++) {
> -		if (i != idle_idx)
> -			gem_sync(gem_fd, spin[i]->handle);
> -	}
> +	fd[0] = -1;
> +	for (i = 0; i < num_engines; i++)
> +		fd[i] = open_group(val[i], fd[0]);
> +
> +	slept = measured_usleep(batch_duration_ns / 1000);
> +	igt_spin_batch_end(spin);
>   
>   	pmu_read_multi(fd[0], num_engines, val);
>   	log_busy(fd[0], num_engines, val);
>   
> -	for (i = 0; i < num_engines; i++) {
> -		if (i != idle_idx)
> -			igt_spin_batch_free(gem_fd, spin[i]);
> -	}
> +	igt_spin_batch_free(gem_fd, spin);
>   	close(fd[0]);
>   
>   	for (i = 0; i < num_engines; i++) {
>   		if (i == idle_idx)
>   			assert_within_epsilon(val[i], 0.0f, tolerance);
>   		else
> -			assert_within_epsilon(val[i], batch_duration_ns,
> -					      tolerance);
> +			assert_within_epsilon(val[i], slept, tolerance);
>   	}
> +	gem_quiescent_gpu(gem_fd);
>   }
>   
>   static void
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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[PATCH igt 3/5] igt/perf_pmu: Measure the reference batch for busy-check-all

[Chris Wilson]

Don't rely on the timer being precise when we can sleep for a known
duration.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index 96091b853..b3b289656 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -183,6 +183,7 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
 	const struct intel_execution_engine2 *e_;
 	uint64_t val[num_engines];
 	int fd[num_engines];
+	unsigned long slept;
 	igt_spin_t *spin;
 	unsigned int busy_idx, i;
 
@@ -202,9 +203,8 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
 	igt_assert_eq(i, num_engines);
 
 	spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
-	igt_spin_batch_set_timeout(spin, batch_duration_ns);
-
-	gem_sync(gem_fd, spin->handle);
+	slept = measured_usleep(batch_duration_ns / 1000);
+	igt_spin_batch_end(spin);
 
 	pmu_read_multi(fd[0], num_engines, val);
 	log_busy(fd[0], num_engines, val);
@@ -212,13 +212,13 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
 	igt_spin_batch_free(gem_fd, spin);
 	close(fd[0]);
 
-	assert_within_epsilon(val[busy_idx], batch_duration_ns, tolerance);
+	assert_within_epsilon(val[busy_idx], slept, tolerance);
 	for (i = 0; i < num_engines; i++) {
 		if (i == busy_idx)
 			continue;
 		assert_within_epsilon(val[i], 0.0f, tolerance);
 	}
-
+	gem_quiescent_gpu(gem_fd);
 }
 
 static void
-- 
2.15.1

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Re: [PATCH igt 3/5] igt/perf_pmu: Measure the reference batch for busy-check-all

[Tvrtko Ursulin]

On 22/12/2017 11:03, Chris Wilson wrote:
> Don't rely on the timer being precise when we can sleep for a known
> duration.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   tests/perf_pmu.c | 10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index 96091b853..b3b289656 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -183,6 +183,7 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>   	const struct intel_execution_engine2 *e_;
>   	uint64_t val[num_engines];
>   	int fd[num_engines];
> +	unsigned long slept;
>   	igt_spin_t *spin;
>   	unsigned int busy_idx, i;
>   
> @@ -202,9 +203,8 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>   	igt_assert_eq(i, num_engines);
>   
>   	spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
> -	igt_spin_batch_set_timeout(spin, batch_duration_ns);
> -
> -	gem_sync(gem_fd, spin->handle);
> +	slept = measured_usleep(batch_duration_ns / 1000);
> +	igt_spin_batch_end(spin);
>   
>   	pmu_read_multi(fd[0], num_engines, val);
>   	log_busy(fd[0], num_engines, val);
> @@ -212,13 +212,13 @@ busy_check_all(int gem_fd, const struct intel_execution_engine2 *e,
>   	igt_spin_batch_free(gem_fd, spin);
>   	close(fd[0]);
>   
> -	assert_within_epsilon(val[busy_idx], batch_duration_ns, tolerance);
> +	assert_within_epsilon(val[busy_idx], slept, tolerance);
>   	for (i = 0; i < num_engines; i++) {
>   		if (i == busy_idx)
>   			continue;
>   		assert_within_epsilon(val[i], 0.0f, tolerance);
>   	}
> -
> +	gem_quiescent_gpu(gem_fd);
>   }
>   
>   static void
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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[PATCH igt 4/5] igt/perf_pmu: Measure the reference batch for all-busy-check-all

[Chris Wilson]

Don't rely on the timer being precise when we can sleep for a known
duration.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 38 ++++++++++++++++++++++++++------------
 1 file changed, 26 insertions(+), 12 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index b3b289656..d88287c17 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -288,36 +288,50 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines)
 	const struct intel_execution_engine2 *e;
 	uint64_t val[num_engines];
 	int fd[num_engines];
-	igt_spin_t *spin[num_engines];
+	unsigned long slept;
+	igt_spin_t *spin = NULL;
 	unsigned int i;
 
 	i = 0;
-	fd[0] = -1;
 	for_each_engine_class_instance(fd, e) {
 		if (!gem_has_engine(gem_fd, e->class, e->instance))
 			continue;
 
-		fd[i] = open_group(I915_PMU_ENGINE_BUSY(e->class, e->instance),
-				   fd[0]);
-
-		spin[i] = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
-		igt_spin_batch_set_timeout(spin[i], batch_duration_ns);
+		if (spin) {
+			struct drm_i915_gem_exec_object2 obj = {
+				.handle = spin->handle
+			};
+			struct drm_i915_gem_execbuffer2 eb = {
+				.buffer_count = 1,
+				.buffers_ptr = to_user_pointer(&obj),
+				.flags = e2ring(gem_fd, e),
+			};
+			gem_execbuf(gem_fd, &eb);
+		} else {
+			spin = igt_spin_batch_new(gem_fd, 0,
+						  e2ring(gem_fd, e), 0);
+		}
 
-		i++;
+		val[i++] = I915_PMU_ENGINE_BUSY(e->class, e->instance);
 	}
+	igt_assert(i == num_engines);
 
+	fd[0] = -1;
 	for (i = 0; i < num_engines; i++)
-		gem_sync(gem_fd, spin[i]->handle);
+		fd[i] = open_group(val[i], fd[0]);
+
+	slept = measured_usleep(batch_duration_ns / 1000);
+	igt_spin_batch_end(spin);
 
 	pmu_read_multi(fd[0], num_engines, val);
 	log_busy(fd[0], num_engines, val);
 
-	for (i = 0; i < num_engines; i++)
-		igt_spin_batch_free(gem_fd, spin[i]);
+	igt_spin_batch_free(gem_fd, spin);
 	close(fd[0]);
 
 	for (i = 0; i < num_engines; i++)
-		assert_within_epsilon(val[i], batch_duration_ns, tolerance);
+		assert_within_epsilon(val[i], slept, tolerance);
+	gem_quiescent_gpu(gem_fd);
 }
 
 static void
-- 
2.15.1

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Re: [PATCH igt 4/5] igt/perf_pmu: Measure the reference batch for all-busy-check-all

[Tvrtko Ursulin]

On 22/12/2017 11:03, Chris Wilson wrote:
> Don't rely on the timer being precise when we can sleep for a known
> duration.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   tests/perf_pmu.c | 38 ++++++++++++++++++++++++++------------
>   1 file changed, 26 insertions(+), 12 deletions(-)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index b3b289656..d88287c17 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -288,36 +288,50 @@ all_busy_check_all(int gem_fd, const unsigned int num_engines)
>   	const struct intel_execution_engine2 *e;
>   	uint64_t val[num_engines];
>   	int fd[num_engines];
> -	igt_spin_t *spin[num_engines];
> +	unsigned long slept;
> +	igt_spin_t *spin = NULL;
>   	unsigned int i;
>   
>   	i = 0;
> -	fd[0] = -1;
>   	for_each_engine_class_instance(fd, e) {
>   		if (!gem_has_engine(gem_fd, e->class, e->instance))
>   			continue;
>   
> -		fd[i] = open_group(I915_PMU_ENGINE_BUSY(e->class, e->instance),
> -				   fd[0]);
> -
> -		spin[i] = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
> -		igt_spin_batch_set_timeout(spin[i], batch_duration_ns);
> +		if (spin) {
> +			struct drm_i915_gem_exec_object2 obj = {
> +				.handle = spin->handle
> +			};
> +			struct drm_i915_gem_execbuffer2 eb = {
> +				.buffer_count = 1,
> +				.buffers_ptr = to_user_pointer(&obj),
> +				.flags = e2ring(gem_fd, e),
> +			};
> +			gem_execbuf(gem_fd, &eb);
> +		} else {
> +			spin = igt_spin_batch_new(gem_fd, 0,
> +						  e2ring(gem_fd, e), 0);
> +		}
>   
> -		i++;
> +		val[i++] = I915_PMU_ENGINE_BUSY(e->class, e->instance);
>   	}
> +	igt_assert(i == num_engines);
>   
> +	fd[0] = -1;
>   	for (i = 0; i < num_engines; i++)
> -		gem_sync(gem_fd, spin[i]->handle);
> +		fd[i] = open_group(val[i], fd[0]);
> +
> +	slept = measured_usleep(batch_duration_ns / 1000);
> +	igt_spin_batch_end(spin);
>   
>   	pmu_read_multi(fd[0], num_engines, val);
>   	log_busy(fd[0], num_engines, val);
>   
> -	for (i = 0; i < num_engines; i++)
> -		igt_spin_batch_free(gem_fd, spin[i]);
> +	igt_spin_batch_free(gem_fd, spin);
>   	close(fd[0]);
>   
>   	for (i = 0; i < num_engines; i++)
> -		assert_within_epsilon(val[i], batch_duration_ns, tolerance);
> +		assert_within_epsilon(val[i], slept, tolerance);
> +	gem_quiescent_gpu(gem_fd);
>   }
>   
>   static void
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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[PATCH igt 5/5] igt/perf_pmu: Speed up frequency measurement

[Chris Wilson]

Use the normal batch_duration_ns and display the sampled frequency:

	Frequency: min=100, max=750, boost=750 MHz
	Min frequency: requested 100.0, actual 100.0
	Max frequency: requested 755.6, actual 755.6

v2: Remove the early spin_batch_end and assert the measured frequencies
are within tolerance of our target.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/perf_pmu.c | 39 +++++++++++++++++++++++----------------
 1 file changed, 23 insertions(+), 16 deletions(-)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index d88287c17..eb8791cd4 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -931,9 +931,10 @@ test_interrupts(int gem_fd)
 static void
 test_frequency(int gem_fd)
 {
-	const uint64_t duration_ns = 2e9;
 	uint32_t min_freq, max_freq, boost_freq;
-	uint64_t min[2], max[2], start[2];
+	uint64_t val[2], start[2];
+	double min[2], max[2];
+	unsigned long slept;
 	igt_spin_t *spin;
 	int fd, sysfs;
 
@@ -962,17 +963,18 @@ test_frequency(int gem_fd)
 	igt_require(igt_sysfs_set_u32(sysfs, "gt_boost_freq_mhz", min_freq));
 	igt_require(igt_sysfs_get_u32(sysfs, "gt_boost_freq_mhz") == min_freq);
 
+	gem_quiescent_gpu(gem_fd); /* Idle to be sure the change takes effect */
+	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
 	pmu_read_multi(fd, 2, start);
 
-	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
-	igt_spin_batch_set_timeout(spin, duration_ns);
-	gem_sync(gem_fd, spin->handle);
+	slept = measured_usleep(batch_duration_ns / 1000);
 
-	pmu_read_multi(fd, 2, min);
-	min[0] -= start[0];
-	min[1] -= start[1];
+	pmu_read_multi(fd, 2, val);
+	min[0] = 1e9*(val[0] - start[0]) / slept;
+	min[1] = 1e9*(val[1] - start[1]) / slept;
 
 	igt_spin_batch_free(gem_fd, spin);
+	gem_quiescent_gpu(gem_fd); /* Don't leak busy bo into the next phase */
 
 	usleep(1e6);
 
@@ -987,17 +989,18 @@ test_frequency(int gem_fd)
 	igt_require(igt_sysfs_set_u32(sysfs, "gt_min_freq_mhz", max_freq));
 	igt_require(igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz") == max_freq);
 
+	gem_quiescent_gpu(gem_fd);
+	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
 	pmu_read_multi(fd, 2, start);
 
-	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
-	igt_spin_batch_set_timeout(spin, duration_ns);
-	gem_sync(gem_fd, spin->handle);
+	slept = measured_usleep(batch_duration_ns / 1000);
 
-	pmu_read_multi(fd, 2, max);
-	max[0] -= start[0];
-	max[1] -= start[1];
+	pmu_read_multi(fd, 2, val);
+	max[0] = 1e9*(val[0] - start[0]) / slept;
+	max[1] = 1e9*(val[1] - start[1]) / slept;
 
 	igt_spin_batch_free(gem_fd, spin);
+	gem_quiescent_gpu(gem_fd);
 
 	/*
 	 * Restore min/max.
@@ -1008,8 +1011,12 @@ test_frequency(int gem_fd)
 			 min_freq, igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz"));
 	close(fd);
 
-	igt_assert(min[0] < max[0]);
-	igt_assert(min[1] < max[1]);
+	igt_info("Min frequency: requested %.1f, actual %.1f\n",
+		 min[0], min[1]);
+	igt_info("Max frequency: requested %.1f, actual %.1f\n",
+		 max[0], max[1]);
+	assert_within_epsilon(min[0], min_freq, tolerance);
+	assert_within_epsilon(max[0], max_freq, tolerance);
 }
 
 static bool wait_for_rc6(int fd)
-- 
2.15.1

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Re: [PATCH igt 5/5] igt/perf_pmu: Speed up frequency measurement

[Tvrtko Ursulin]

On 22/12/2017 11:03, Chris Wilson wrote:
> Use the normal batch_duration_ns and display the sampled frequency:
> 
> 	Frequency: min=100, max=750, boost=750 MHz
> 	Min frequency: requested 100.0, actual 100.0
> 	Max frequency: requested 755.6, actual 755.6
> 
> v2: Remove the early spin_batch_end and assert the measured frequencies
> are within tolerance of our target.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   tests/perf_pmu.c | 39 +++++++++++++++++++++++----------------
>   1 file changed, 23 insertions(+), 16 deletions(-)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index d88287c17..eb8791cd4 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -931,9 +931,10 @@ test_interrupts(int gem_fd)
>   static void
>   test_frequency(int gem_fd)
>   {
> -	const uint64_t duration_ns = 2e9;
>   	uint32_t min_freq, max_freq, boost_freq;
> -	uint64_t min[2], max[2], start[2];
> +	uint64_t val[2], start[2];
> +	double min[2], max[2];
> +	unsigned long slept;
>   	igt_spin_t *spin;
>   	int fd, sysfs;
>   
> @@ -962,17 +963,18 @@ test_frequency(int gem_fd)
>   	igt_require(igt_sysfs_set_u32(sysfs, "gt_boost_freq_mhz", min_freq));
>   	igt_require(igt_sysfs_get_u32(sysfs, "gt_boost_freq_mhz") == min_freq);
>   
> +	gem_quiescent_gpu(gem_fd); /* Idle to be sure the change takes effect */
> +	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
>   	pmu_read_multi(fd, 2, start);
>   
> -	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
> -	igt_spin_batch_set_timeout(spin, duration_ns);
> -	gem_sync(gem_fd, spin->handle);
> +	slept = measured_usleep(batch_duration_ns / 1000);
>   
> -	pmu_read_multi(fd, 2, min);
> -	min[0] -= start[0];
> -	min[1] -= start[1];
> +	pmu_read_multi(fd, 2, val);
> +	min[0] = 1e9*(val[0] - start[0]) / slept;
> +	min[1] = 1e9*(val[1] - start[1]) / slept;
>   
>   	igt_spin_batch_free(gem_fd, spin);
> +	gem_quiescent_gpu(gem_fd); /* Don't leak busy bo into the next phase */
>   
>   	usleep(1e6);
>   
> @@ -987,17 +989,18 @@ test_frequency(int gem_fd)
>   	igt_require(igt_sysfs_set_u32(sysfs, "gt_min_freq_mhz", max_freq));
>   	igt_require(igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz") == max_freq);
>   
> +	gem_quiescent_gpu(gem_fd);
> +	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
>   	pmu_read_multi(fd, 2, start);
>   
> -	spin = igt_spin_batch_new(gem_fd, 0, I915_EXEC_RENDER, 0);
> -	igt_spin_batch_set_timeout(spin, duration_ns);
> -	gem_sync(gem_fd, spin->handle);
> +	slept = measured_usleep(batch_duration_ns / 1000);
>   
> -	pmu_read_multi(fd, 2, max);
> -	max[0] -= start[0];
> -	max[1] -= start[1];
> +	pmu_read_multi(fd, 2, val);
> +	max[0] = 1e9*(val[0] - start[0]) / slept;
> +	max[1] = 1e9*(val[1] - start[1]) / slept;
>   
>   	igt_spin_batch_free(gem_fd, spin);
> +	gem_quiescent_gpu(gem_fd);
>   
>   	/*
>   	 * Restore min/max.
> @@ -1008,8 +1011,12 @@ test_frequency(int gem_fd)
>   			 min_freq, igt_sysfs_get_u32(sysfs, "gt_min_freq_mhz"));
>   	close(fd);
>   
> -	igt_assert(min[0] < max[0]);
> -	igt_assert(min[1] < max[1]);
> +	igt_info("Min frequency: requested %.1f, actual %.1f\n",
> +		 min[0], min[1]);
> +	igt_info("Max frequency: requested %.1f, actual %.1f\n",
> +		 max[0], max[1]);
> +	assert_within_epsilon(min[0], min_freq, tolerance);
> +	assert_within_epsilon(max[0], max_freq, tolerance);
>   }
>   
>   static bool wait_for_rc6(int fd)
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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✓ Fi.CI.BAT: success for series starting with [1/5] igt/perf_pmu: Tighten busy measurement

[Patchwork]

== Series Details ==

Series: series starting with [1/5] igt/perf_pmu: Tighten busy measurement
URL   : https://patchwork.freedesktop.org/series/35715/
State : success

== Summary ==

IGT patchset tested on top of latest successful build
865a47ca2b93b208ba016f3c4fc00831ec7bfec6 overlay: parse tracepoints from sysfs to figure out fields' location

with latest DRM-Tip kernel build CI_DRM_3568
e9f603bfd61b drm-tip: 2017y-12m-22d-11h-13m-33s UTC integration manifest

No testlist changes.

Test debugfs_test:
        Subgroup read_all_entries:
                dmesg-fail -> DMESG-WARN (fi-elk-e7500) fdo#103989
                incomplete -> PASS       (fi-snb-2520m) fdo#103713
Test gem_ringfill:
        Subgroup basic-default-hang:
                pass       -> DMESG-WARN (fi-pnv-d510) fdo#101600

fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#101600 https://bugs.freedesktop.org/show_bug.cgi?id=101600

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:436s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:440s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:382s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:505s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:276s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:497s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:496s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:484s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:482s
fi-elk-e7500     total:224  pass:163  dwarn:15  dfail:0   fail:0   skip:45 
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:265s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:532s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:406s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:415s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:426s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:482s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:428s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:483s
fi-kbl-7560u     total:288  pass:268  dwarn:1   dfail:0   fail:0   skip:19  time:520s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:466s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:523s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:580s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:447s
fi-skl-6600u     total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:533s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:554s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:510s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:512s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:443s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:552s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:419s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:599s
fi-cnl-y         total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:631s
fi-glk-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:484s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_725/issues.html
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Re: [PATCH igt 1/5] igt/perf_pmu: Tighten busy measurement

[Tvrtko Ursulin]

On 22/12/2017 11:03, Chris Wilson wrote:
> Sleep for a known duration. In particular, CI once saw a measurement for
> busyness greater than the intended batch_duration!
> 
> v2: Go back to starting pmu sampling outside of spinner; the GPU should
> be idle.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104241
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   tests/perf_pmu.c | 22 ++++++++++------------
>   1 file changed, 10 insertions(+), 12 deletions(-)
> 
> diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
> index db7696115..38fd05dc9 100644
> --- a/tests/perf_pmu.c
> +++ b/tests/perf_pmu.c
> @@ -103,7 +103,7 @@ static void pmu_read_multi(int fd, unsigned int num, uint64_t *val)
>   	igt_assert_f((double)(x) <= (1.0 + (tolerance)) * (double)(ref) && \
>   		     (double)(x) >= (1.0 - (tolerance)) * (double)(ref), \
>   		     "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
> -		     #x, #ref, (double)(x), (tolerance) * 100.0, (double)ref)
> +		     #x, #ref, (double)(x), (tolerance) * 100.0, (double)(ref))
>   
>   /*
>    * Helper for cases where we assert on time spent sleeping (directly or
> @@ -133,30 +133,28 @@ static unsigned int e2ring(int gem_fd, const struct intel_execution_engine2 *e)
>   static void
>   single(int gem_fd, const struct intel_execution_engine2 *e, bool busy)
>   {
> -	double ref = busy ? batch_duration_ns : 0.0f;
> +	unsigned long slept;
>   	igt_spin_t *spin;
>   	uint64_t val;
>   	int fd;
>   
>   	fd = open_pmu(I915_PMU_ENGINE_BUSY(e->class, e->instance));
>   
> -	if (busy) {
> +	if (busy)
>   		spin = igt_spin_batch_new(gem_fd, 0, e2ring(gem_fd, e), 0);
> -		igt_spin_batch_set_timeout(spin, batch_duration_ns);
> -	} else {
> -		usleep(batch_duration_ns / 1000);
> -	}
> +	else
> +		spin = NULL;
>   
> -	if (busy)
> -		gem_sync(gem_fd, spin->handle);
> +	slept = measured_usleep(batch_duration_ns / 1000);
> +	igt_spin_batch_end(spin);
>   
>   	val = pmu_read_single(fd);
>   
> -	if (busy)
> -		igt_spin_batch_free(gem_fd, spin);
> +	igt_spin_batch_free(gem_fd, spin);
>   	close(fd);
>   
> -	assert_within_epsilon(val, ref, tolerance);
> +	assert_within_epsilon(val, busy ? slept : 0.f, tolerance);
> +	gem_quiescent_gpu(gem_fd);
>   }
>   
>   static void log_busy(int fd, unsigned int num_engines, uint64_t *val)
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

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✓ Fi.CI.IGT: success for series starting with [1/5] igt/perf_pmu: Tighten busy measurement

[Patchwork]

== Series Details ==

Series: series starting with [1/5] igt/perf_pmu: Tighten busy measurement
URL   : https://patchwork.freedesktop.org/series/35715/
State : success

== Summary ==

Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
                fail       -> PASS       (shard-snb) fdo#101623 +1
        Subgroup fbc-rgb565-draw-render:
                skip       -> FAIL       (shard-snb) fdo#103167
Test kms_flip:
        Subgroup flip-vs-panning-vs-hang-interruptible:
                pass       -> DMESG-WARN (shard-snb) fdo#103821
        Subgroup modeset-vs-vblank-race-interruptible:
                pass       -> DMESG-FAIL (shard-hsw) fdo#103060
Test kms_draw_crc:
        Subgroup draw-method-xrgb2101010-mmap-gtt-untiled:
                incomplete -> PASS       (shard-hsw)
Test perf:
        Subgroup blocking:
                fail       -> PASS       (shard-hsw) fdo#102252
Test kms_setmode:
        Subgroup basic:
                fail       -> PASS       (shard-hsw) fdo#99912

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hsw        total:2712 pass:1537 dwarn:1   dfail:1   fail:9   skip:1164 time:9411s
shard-snb        total:2712 pass:1309 dwarn:2   dfail:0   fail:11  skip:1390 time:8128s
Blacklisted hosts:
shard-apl        total:2712 pass:1683 dwarn:1   dfail:0   fail:27  skip:1001 time:13724s
shard-kbl        total:2712 pass:1802 dwarn:1   dfail:0   fail:28  skip:881 time:11050s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_725/shards.html
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