From: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>, xen-devel@lists.xen.org
Cc: andrew.cooper3@citrix.com, sherry.hurwitz@amd.com, jbeulich@suse.com
Subject: Re: [PATCH v2 06/10] x86/SVM: Add AVIC vmexit handlers
Date: Thu, 5 Jan 2017 13:41:33 +0700 [thread overview]
Message-ID: <5f94bc22-52ec-c4d5-16cf-3c97fb37ffc5@amd.com> (raw)
In-Reply-To: <12c0832e-8177-ec19-463d-c74a5e993490@oracle.com>
Hi Boris,
On 1/3/17 22:34, Boris Ostrovsky wrote:
>> +static int avic_handle_dfr_update(struct vcpu *v)
>> +{
>> + u32 mod;
>> + struct svm_domain *d = &v->domain->arch.hvm_domain.svm;
>> + u32 *dfr = avic_get_bk_page_entry(v, APIC_DFR);
>> +
>> + if ( !dfr )
>> + return -EINVAL;
>> +
>> + mod = (*dfr >> 28) & 0xFu;
>> +
>> + spin_lock(&d->avic_ldr_mode_lock);
>> + if ( d->avic_ldr_mode != mod )
>> + {
>> + /*
>> + * We assume that all local APICs are using the same type.
>> + * If LDR mode changes, we need to flush the domain AVIC logical
>> + * APIC id table.
>> + */
>> + clear_domain_page(_mfn(d->avic_log_apic_id_table_mfn));
>> + smp_wmb();
> Is this needed? I think clear_page() guarantees visibility/ordering (we
> have SFENCE in clear_page_sse2() for this reason).
>
> -boris
>
Ah... Okay. Thanks for pointing out.
Suravee
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next prev parent reply other threads:[~2017-01-05 6:41 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-31 5:45 [PATCH v2 00/10] Introduce AMD SVM AVIC Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 01/10] x86/HVM: Introduce struct hvm_pi_ops Suravee Suthikulpanit
2017-01-05 2:54 ` Tian, Kevin
2017-01-05 7:57 ` Jan Beulich
2017-01-05 15:51 ` Jan Beulich
2017-01-10 6:51 ` Suravee Suthikulpanit
2017-01-10 8:24 ` Jan Beulich
2017-01-10 9:45 ` Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 02/10] x86/vLAPIC: Declare vlapic_read_aligned() and vlapic_reg_write() as non-static Suravee Suthikulpanit
2017-01-05 15:53 ` Jan Beulich
2017-01-10 6:57 ` Suravee Suthikulpanit
2017-01-10 8:25 ` Jan Beulich
2016-12-31 5:45 ` [PATCH v2 03/10] x86/HVM: Call vlapic_destroy after vcpu_destroy Suravee Suthikulpanit
2017-01-05 2:56 ` Tian, Kevin
2017-01-05 15:56 ` Jan Beulich
2017-01-10 8:18 ` Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 04/10] x86/SVM: Modify VMCB fields to add AVIC support Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 05/10] x86/HVM/SVM: Add AVIC initialization code Suravee Suthikulpanit
2017-01-02 16:37 ` Andrew Cooper
2017-01-04 17:24 ` Suravee Suthikulpanit
2017-01-04 17:59 ` Andrew Cooper
2017-01-10 3:06 ` Suravee Suthikulpanit
2017-01-03 14:54 ` Boris Ostrovsky
2016-12-31 5:45 ` [PATCH v2 06/10] x86/SVM: Add AVIC vmexit handlers Suravee Suthikulpanit
2017-01-02 17:28 ` Andrew Cooper
2017-01-05 4:07 ` Suravee Suthikulpanit
2017-01-03 15:34 ` Boris Ostrovsky
2017-01-05 6:41 ` Suravee Suthikulpanit [this message]
2016-12-31 5:45 ` [PATCH v2 07/10] x86/SVM: Add vcpu scheduling support for AVIC Suravee Suthikulpanit
2017-01-02 17:35 ` Andrew Cooper
2017-01-03 15:43 ` Boris Ostrovsky
2016-12-31 5:45 ` [PATCH v2 08/10] x86/SVM: Add interrupt management code via AVIC Suravee Suthikulpanit
2017-01-02 17:45 ` Andrew Cooper
2017-02-28 12:01 ` George Dunlap
2017-01-05 16:01 ` Jan Beulich
2016-12-31 5:46 ` [PATCH v2 09/10] x86/SVM: Hook up miscellaneous AVIC functions Suravee Suthikulpanit
2017-01-02 17:49 ` Andrew Cooper
2017-01-05 16:05 ` Jan Beulich
2017-01-10 8:35 ` Suravee Suthikulpanit
2017-01-10 9:00 ` Jan Beulich
2017-01-10 10:28 ` Suravee Suthikulpanit
2016-12-31 5:46 ` [PATCH v2 10/10] x86/SVM: Add AMD AVIC key handler Suravee Suthikulpanit
2017-01-03 16:01 ` Boris Ostrovsky
2017-01-03 16:04 ` Andrew Cooper
2017-01-05 8:00 ` Suravee Suthikulpanit
2017-01-05 16:07 ` Jan Beulich
2017-01-10 11:14 ` Suravee Suthikulpanit
2017-01-10 12:55 ` Jan Beulich
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