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From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
	xen-devel@lists.xen.org
Cc: andrew.cooper3@citrix.com, sherry.hurwitz@amd.com, jbeulich@suse.com
Subject: Re: [PATCH v2 07/10] x86/SVM: Add vcpu scheduling support for AVIC
Date: Tue, 3 Jan 2017 10:43:09 -0500	[thread overview]
Message-ID: <ea10f943-bd19-6764-d632-f80df4259acf@oracle.com> (raw)
In-Reply-To: <1483163161-2402-8-git-send-email-suravee.suthikulpanit@amd.com>

On 12/31/2016 12:45 AM, Suravee Suthikulpanit wrote:
> Add hooks to manage AVIC data structure during vcpu scheduling.
>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> Cc: Jan Beulich <JBeulich@suse.com>
> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
> ---
>  xen/arch/x86/hvm/svm/avic.c | 78 +++++++++++++++++++++++++++++++++++++++++++++
>  xen/arch/x86/hvm/svm/svm.c  | 10 ++++++
>  2 files changed, 88 insertions(+)
>
> diff --git a/xen/arch/x86/hvm/svm/avic.c b/xen/arch/x86/hvm/svm/avic.c
> index c0b7151..6351c8e 100644
> --- a/xen/arch/x86/hvm/svm/avic.c
> +++ b/xen/arch/x86/hvm/svm/avic.c
> @@ -73,6 +73,79 @@ avic_get_phy_apic_id_ent(const struct vcpu *v, unsigned int index)
>      return &avic_phy_apic_id_table[index];
>  }
>  
> +static void avic_vcpu_load(struct vcpu *v)
> +{
> +    struct arch_svm_struct *s = &v->arch.hvm_svm;
> +    int h_phy_apic_id;
> +    struct avic_phy_apic_id_ent entry;
> +
> +    if ( !s->avic_last_phy_id )
> +        return;
> +
> +    if ( test_bit(_VPF_blocked, &v->pause_flags) )
> +        return;
> +
> +    /*
> +     * Note: APIC ID = 0xff is used for broadcast.
> +     *       APIC ID > 0xff is reserved.
> +     */
> +    h_phy_apic_id = cpu_data[v->processor].apicid;
> +    ASSERT(h_phy_apic_id < AVIC_PHY_APIC_ID_MAX);
> +
> +    entry = *(s->avic_last_phy_id);
> +    smp_rmb();
> +    entry.host_phy_apic_id = h_phy_apic_id;
> +    entry.is_running = 1;
> +    *(s->avic_last_phy_id) = entry;
> +    smp_wmb();
> +}
> +
> +static void avic_vcpu_unload(struct vcpu *v)
> +{
> +    struct arch_svm_struct *s = &v->arch.hvm_svm;
> +    struct avic_phy_apic_id_ent entry;
> +
> +    if ( !svm_avic || !s->avic_last_phy_id )
> +        return;
> +
> +    entry = *(s->avic_last_phy_id);
> +    smp_rmb();
> +    entry.is_running = 0;
> +    *(s->avic_last_phy_id) = entry;
> +    smp_wmb();
> +}
> +
> +static void avic_vcpu_resume(struct vcpu *v)
> +{
> +    struct avic_phy_apic_id_ent entry;
> +    struct arch_svm_struct *s = &v->arch.hvm_svm;
> +
> +    ASSERT(svm_avic_vcpu_enabled(v));
> +    ASSERT(s->avic_last_phy_id);
> +    ASSERT(!test_bit(_VPF_blocked, &v->pause_flags));
> +
> +    entry = *(s->avic_last_phy_id);
> +    smp_rmb();
> +    entry.is_running = 1;
> +    *(s->avic_last_phy_id) = entry;
> +    smp_wmb();
> +}
> +
> +static void avic_vcpu_block(struct vcpu *v)
> +{
> +    struct avic_phy_apic_id_ent entry;
> +    struct arch_svm_struct *s = &v->arch.hvm_svm;
> +
> +    ASSERT(svm_avic_vcpu_enabled(v));
> +    ASSERT(s->avic_last_phy_id);
> +
> +    entry = *(s->avic_last_phy_id);
> +    smp_rmb();
> +    entry.is_running = 0;
> +    *(s->avic_last_phy_id) = entry;
> +    smp_wmb();
> +}

I don't understand use of r/w barriers here (and I think Andrew had
similar comment) but in any case the last 5 lines can be factored out.

>  int svm_avic_dom_init(struct domain *d)
>  {
>      int ret = 0;
> @@ -127,6 +200,11 @@ int svm_avic_dom_init(struct domain *d)
>  
>      spin_lock_init(&d->arch.hvm_domain.svm.avic_ldr_mode_lock);
>  
> +    d->arch.hvm_domain.pi_ops.pi_switch_to = avic_vcpu_unload;
> +    d->arch.hvm_domain.pi_ops.pi_switch_from = avic_vcpu_load;
> +    d->arch.hvm_domain.pi_ops.vcpu_block = avic_vcpu_block;
> +    d->arch.hvm_domain.pi_ops.pi_do_resume = avic_vcpu_resume;
> +

I wonder whether it might be better to declare a (static) svm_pi_ops
structure and assign is here to d->arch.hvm_domain.pi_ops. And make a
similar change in patch 1 for VMX.

-boris


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  parent reply	other threads:[~2017-01-03 15:43 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-31  5:45 [PATCH v2 00/10] Introduce AMD SVM AVIC Suravee Suthikulpanit
2016-12-31  5:45 ` [PATCH v2 01/10] x86/HVM: Introduce struct hvm_pi_ops Suravee Suthikulpanit
2017-01-05  2:54   ` Tian, Kevin
2017-01-05  7:57     ` Jan Beulich
2017-01-05 15:51   ` Jan Beulich
2017-01-10  6:51     ` Suravee Suthikulpanit
2017-01-10  8:24       ` Jan Beulich
2017-01-10  9:45         ` Suravee Suthikulpanit
2016-12-31  5:45 ` [PATCH v2 02/10] x86/vLAPIC: Declare vlapic_read_aligned() and vlapic_reg_write() as non-static Suravee Suthikulpanit
2017-01-05 15:53   ` Jan Beulich
2017-01-10  6:57     ` Suravee Suthikulpanit
2017-01-10  8:25       ` Jan Beulich
2016-12-31  5:45 ` [PATCH v2 03/10] x86/HVM: Call vlapic_destroy after vcpu_destroy Suravee Suthikulpanit
2017-01-05  2:56   ` Tian, Kevin
2017-01-05 15:56   ` Jan Beulich
2017-01-10  8:18     ` Suravee Suthikulpanit
2016-12-31  5:45 ` [PATCH v2 04/10] x86/SVM: Modify VMCB fields to add AVIC support Suravee Suthikulpanit
2016-12-31  5:45 ` [PATCH v2 05/10] x86/HVM/SVM: Add AVIC initialization code Suravee Suthikulpanit
2017-01-02 16:37   ` Andrew Cooper
2017-01-04 17:24     ` Suravee Suthikulpanit
2017-01-04 17:59       ` Andrew Cooper
2017-01-10  3:06     ` Suravee Suthikulpanit
2017-01-03 14:54   ` Boris Ostrovsky
2016-12-31  5:45 ` [PATCH v2 06/10] x86/SVM: Add AVIC vmexit handlers Suravee Suthikulpanit
2017-01-02 17:28   ` Andrew Cooper
2017-01-05  4:07     ` Suravee Suthikulpanit
2017-01-03 15:34   ` Boris Ostrovsky
2017-01-05  6:41     ` Suravee Suthikulpanit
2016-12-31  5:45 ` [PATCH v2 07/10] x86/SVM: Add vcpu scheduling support for AVIC Suravee Suthikulpanit
2017-01-02 17:35   ` Andrew Cooper
2017-01-03 15:43   ` Boris Ostrovsky [this message]
2016-12-31  5:45 ` [PATCH v2 08/10] x86/SVM: Add interrupt management code via AVIC Suravee Suthikulpanit
2017-01-02 17:45   ` Andrew Cooper
2017-02-28 12:01     ` George Dunlap
2017-01-05 16:01   ` Jan Beulich
2016-12-31  5:46 ` [PATCH v2 09/10] x86/SVM: Hook up miscellaneous AVIC functions Suravee Suthikulpanit
2017-01-02 17:49   ` Andrew Cooper
2017-01-05 16:05   ` Jan Beulich
2017-01-10  8:35     ` Suravee Suthikulpanit
2017-01-10  9:00       ` Jan Beulich
2017-01-10 10:28         ` Suravee Suthikulpanit
2016-12-31  5:46 ` [PATCH v2 10/10] x86/SVM: Add AMD AVIC key handler Suravee Suthikulpanit
2017-01-03 16:01   ` Boris Ostrovsky
2017-01-03 16:04     ` Andrew Cooper
2017-01-05  8:00       ` Suravee Suthikulpanit
2017-01-05 16:07   ` Jan Beulich
2017-01-10 11:14     ` Suravee Suthikulpanit
2017-01-10 12:55       ` Jan Beulich

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