From: Philipp Zabel <p.zabel@pengutronix.de>
To: Tomer Maimon <tmaimon77@gmail.com>,
robh+dt@kernel.org, mark.rutland@arm.com, yuenn@google.com,
venture@google.com, benjaminfair@google.com,
avifishman70@gmail.com, joel@jms.id.au
Cc: openbmc@lists.ozlabs.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v2 2/3] dt-bindings: reset: Add binding constants for NPCM7xx reset controller
Date: Tue, 29 Oct 2019 16:15:08 +0100 [thread overview]
Message-ID: <60b17249f57313f1dd6acdf43dbcca5640641ca1.camel@pengutronix.de> (raw)
In-Reply-To: <20191028155403.134126-3-tmaimon77@gmail.com>
On Mon, 2019-10-28 at 17:54 +0200, Tomer Maimon wrote:
> Add device tree binding constants for Nuvoton BMC NPCM7xx
> reset controller.
>
> Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
> ---
> .../dt-bindings/reset/nuvoton,npcm7xx-reset.h | 82 +++++++++++++++++++
> 1 file changed, 82 insertions(+)
> create mode 100644 include/dt-bindings/reset/nuvoton,npcm7xx-reset.h
>
> diff --git a/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h b/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h
> new file mode 100644
> index 000000000000..7b7e870eac35
> --- /dev/null
> +++ b/include/dt-bindings/reset/nuvoton,npcm7xx-reset.h
> @@ -0,0 +1,82 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +// Copyright (c) 2019 Nuvoton Technology corporation.
> +
> +#ifndef _DT_BINDINGS_NPCM7XX_RESET_H
> +#define _DT_BINDINGS_NPCM7XX_RESET_H
> +
> +#define NPCM7XX_RESET_FIU3 1
> +#define NPCM7XX_RESET_UDC1 5
> +#define NPCM7XX_RESET_EMC1 6
> +#define NPCM7XX_RESET_UART_2_3 7
> +#define NPCM7XX_RESET_UDC2 8
> +#define NPCM7XX_RESET_PECI 9
> +#define NPCM7XX_RESET_AES 10
> +#define NPCM7XX_RESET_UART_0_1 11
> +#define NPCM7XX_RESET_MC 12
> +#define NPCM7XX_RESET_SMB2 13
> +#define NPCM7XX_RESET_SMB3 14
> +#define NPCM7XX_RESET_SMB4 15
> +#define NPCM7XX_RESET_SMB5 16
> +#define NPCM7XX_RESET_PWM_M0 18
> +#define NPCM7XX_RESET_TIMER_0_4 19
> +#define NPCM7XX_RESET_TIMER_5_9 20
> +#define NPCM7XX_RESET_EMC2 21
> +#define NPCM7XX_RESET_UDC4 22
> +#define NPCM7XX_RESET_UDC5 23
> +#define NPCM7XX_RESET_UDC6 24
> +#define NPCM7XX_RESET_UDC3 25
> +#define NPCM7XX_RESET_ADC 27
> +#define NPCM7XX_RESET_SMB6 28
> +#define NPCM7XX_RESET_SMB7 29
> +#define NPCM7XX_RESET_SMB0 30
> +#define NPCM7XX_RESET_SMB1 31
> +#define NPCM7XX_RESET_MFT0 32
> +#define NPCM7XX_RESET_MFT1 33
> +#define NPCM7XX_RESET_MFT2 34
> +#define NPCM7XX_RESET_MFT3 35
> +#define NPCM7XX_RESET_MFT4 36
> +#define NPCM7XX_RESET_MFT5 37
> +#define NPCM7XX_RESET_MFT6 38
> +#define NPCM7XX_RESET_MFT7 39
> +#define NPCM7XX_RESET_MMC 40
> +#define NPCM7XX_RESET_SDHC 41
> +#define NPCM7XX_RESET_GFX_SYS 42
> +#define NPCM7XX_RESET_AHB_PCIBRG 43
> +#define NPCM7XX_RESET_VDMA 44
> +#define NPCM7XX_RESET_ECE 45
> +#define NPCM7XX_RESET_VCD 46
> +#define NPCM7XX_RESET_OTP 48
> +#define NPCM7XX_RESET_SIOX1 50
> +#define NPCM7XX_RESET_SIOX2 51
> +#define NPCM7XX_RESET_3DES 53
> +#define NPCM7XX_RESET_PSPI1 54
> +#define NPCM7XX_RESET_PSPI2 55
> +#define NPCM7XX_RESET_GMAC2 57
> +#define NPCM7XX_RESET_USB_HOST 58
> +#define NPCM7XX_RESET_GMAC1 60
> +#define NPCM7XX_RESET_CP 63
What's in the gap between IPSRST2 and IPSRST3? Are you sure you don't
want the following IPSRST3 resets to just start at 64? That could be
achieved with a custom of_xlate callback in the driver.
> +#define NPCM7XX_RESET_PWM_M1 160
> +#define NPCM7XX_RESET_SMB12 161
> +#define NPCM7XX_RESET_SPIX 162
> +#define NPCM7XX_RESET_SMB13 163
> +#define NPCM7XX_RESET_UDC0 164
> +#define NPCM7XX_RESET_UDC7 165
> +#define NPCM7XX_RESET_UDC8 166
> +#define NPCM7XX_RESET_UDC9 167
> +#define NPCM7XX_RESET_PCI_MAILBOX 169
> +#define NPCM7XX_RESET_SMB14 172
> +#define NPCM7XX_RESET_SHA 173
> +#define NPCM7XX_RESET_SEC_ECC 174
> +#define NPCM7XX_RESET_PCIE_RC 175
> +#define NPCM7XX_RESET_TIMER_10_14 176
> +#define NPCM7XX_RESET_RNG 177
> +#define NPCM7XX_RESET_SMB15 178
> +#define NPCM7XX_RESET_SMB8 179
> +#define NPCM7XX_RESET_SMB9 180
> +#define NPCM7XX_RESET_SMB10 181
> +#define NPCM7XX_RESET_SMB11 182
> +#define NPCM7XX_RESET_ESPI 183
> +#define NPCM7XX_RESET_USB_PHY_1 184
> +#define NPCM7XX_RESET_USB_PHY_2 185
> +
> +#endif
regards
Philipp
next prev parent reply other threads:[~2019-10-29 15:15 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-28 15:54 [PATCH v2 0/3] reset: npcm: add NPCM reset driver support Tomer Maimon
2019-10-28 15:54 ` [PATCH v2 1/3] dt-binding: reset: add NPCM reset controller documentation Tomer Maimon
2019-10-29 15:14 ` Philipp Zabel
2019-10-29 15:14 ` Philipp Zabel
2019-10-31 14:18 ` Tomer Maimon
2019-10-28 15:54 ` [PATCH v2 2/3] dt-bindings: reset: Add binding constants for NPCM7xx reset controller Tomer Maimon
2019-10-29 15:15 ` Philipp Zabel [this message]
2019-10-29 15:15 ` Philipp Zabel
2019-10-28 15:54 ` [PATCH v2 3/3] reset: npcm: add NPCM reset controller driver Tomer Maimon
2019-10-29 15:34 ` Philipp Zabel
2019-10-29 15:34 ` Philipp Zabel
2019-10-31 14:14 ` Tomer Maimon
2019-10-30 5:11 ` kbuild test robot
2019-10-30 5:11 ` kbuild test robot
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