[Qemu-devel] [TCG SIMD] 128 bit SIMD support in the TCG backend

[Qemu-devel] [TCG SIMD] 128 bit SIMD support in the TCG backend

[Ancuta, Cristian]

Hi,

Hope this is the right place for this question.

I was wondering whether the TCG i386 backend is currently able to generate SIMD code ( vector loads/store, moves, vector arithmetic, etc ).

Looking around on patchwork I found these patches:

https://patchwork.kernel.org/project/qemu-devel/list/?submitter=172151

They seem to implement the vector support that I'd be interested in (including support for tcg_gen_qemu_<ld/st>_v128 ) but I guess the patches didn't make it into any stable version?

Any info would be appreciated.

Thanks.

Re: [Qemu-devel] [TCG SIMD] 128 bit SIMD support in the TCG backend

[Richard Henderson]

On 12/10/18 8:37 AM, Ancuta, Cristian wrote:
> Hi,
> 
> Hope this is the right place for this question.
> 
> I was wondering whether the TCG i386 backend is currently able to generate SIMD code ( vector loads/store, moves, vector arithmetic, etc ).

Yes, it is.

> Looking around on patchwork I found these patches:
> 
> https://patchwork.kernel.org/project/qemu-devel/list/?submitter=172151
> 
> They seem to implement the vector support that I'd be interested in (including support for tcg_gen_qemu_<ld/st>_v128 ) but I guess the patches didn't make it into any stable version?

They made it in with a different form.

See tcg/tcg-op-gvec.[ch] and how those are used within target/arm/.

We do not yet use the infrastructure for targets other than ARM, though Mark
Cave-Ayland has just posted a patch set that begins conversion of target/ppc/.


r~