* [PATCH v2 0/2] meson8b-odroidc1: ethernet support
@ 2018-01-19 1:47 Emiliano Ingrassia
2018-01-19 1:48 ` [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description Emiliano Ingrassia
` (2 more replies)
0 siblings, 3 replies; 9+ messages in thread
From: Emiliano Ingrassia @ 2018-01-19 1:47 UTC (permalink / raw)
To: linus-amlogic
This patchset, tested on an Odroid-C1+ board, enables ethernet support
on Odroid-C1/C1+ boards, improving and extending the ethernet description
in the relative device tree.
In particular:
- enables the Meson8b ethernet controller pin multiplexing;
- fixes and extends the Meson8b ethernet controller description;
- adds the Odroid-C1+ ethernet PHY description and enables the
ethernet controller.
This patchset depends on patchset "dwmac-meson8b: clock fixes for Meson8b".
Emiliano Ingrassia (2):
ARM: dts: meson8b: extend ethernet controller description
ARM: dts: meson8b-odroidc1: ethernet support
arch/arm/boot/dts/meson8b-odroidc1.dts | 30 +++++++++++++++++++++++++++++
arch/arm/boot/dts/meson8b.dtsi | 35 ++++++++++++++++++++++++++++++++--
2 files changed, 63 insertions(+), 2 deletions(-)
--
2.15.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description
2018-01-19 1:47 [PATCH v2 0/2] meson8b-odroidc1: ethernet support Emiliano Ingrassia
@ 2018-01-19 1:48 ` Emiliano Ingrassia
2018-01-25 2:18 ` Linus Lüssing
2018-01-28 20:27 ` Martin Blumenstingl
2018-01-19 1:49 ` [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support Emiliano Ingrassia
2018-01-31 0:38 ` [PATCH v2 0/2] " Kevin Hilman
2 siblings, 2 replies; 9+ messages in thread
From: Emiliano Ingrassia @ 2018-01-19 1:48 UTC (permalink / raw)
To: linus-amlogic
Enable S805 (aka Meson8b) ethernet pin multiplexing and
extend the controller description.
The programmable ethernet (PRG_ETHERNET) register address
value (0xc1108108), contained in meson.dtsi, is overridden
according to the value found in S805 SoC manual.
This also required to switch to "amlogic,meson8b-dwmac" compatible
to correctly configure that register.
The two clock sources "clkin0" and "clkin1" are both equals
to MPLL2 because, as reported in bit 9-7 register description,
that is the only Meson8b ethernet clock source.
Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
---
arch/arm/boot/dts/meson8b.dtsi | 35 +++++++++++++++++++++++++++++++++--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index d75e0ceda8bb..fa5274aa370b 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -185,6 +185,27 @@
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_cbus 0 0 130>;
};
+
+ eth_rgmii_pins: eth-rgmii {
+ mux {
+ groups = "eth_tx_clk",
+ "eth_tx_en",
+ "eth_txd1_0",
+ "eth_txd1_1",
+ "eth_txd0_0",
+ "eth_txd0_1",
+ "eth_rx_clk",
+ "eth_rx_dv",
+ "eth_rxd1",
+ "eth_rxd0",
+ "eth_mdio_en",
+ "eth_mdc",
+ "eth_ref_clk",
+ "eth_txd2",
+ "eth_txd3";
+ function = "ethernet";
+ };
+ };
};
};
@@ -203,8 +224,18 @@
};
ðmac {
- clocks = <&clkc CLKID_ETH>;
- clock-names = "stmmaceth";
+ compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
+
+ reg = <0xc9410000 0x10000
+ 0xc1108140 0x4>;
+
+ clocks = <&clkc CLKID_ETH>,
+ <&clkc CLKID_MPLL2>,
+ <&clkc CLKID_MPLL2>;
+ clock-names = "stmmaceth", "clkin0", "clkin1";
+
+ resets = <&reset RESET_ETHERNET>;
+ reset-names = "stmmaceth";
};
&gpio_intc {
--
2.15.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support
2018-01-19 1:47 [PATCH v2 0/2] meson8b-odroidc1: ethernet support Emiliano Ingrassia
2018-01-19 1:48 ` [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description Emiliano Ingrassia
@ 2018-01-19 1:49 ` Emiliano Ingrassia
2018-01-25 2:18 ` Linus Lüssing
2018-01-28 20:26 ` Martin Blumenstingl
2018-01-31 0:38 ` [PATCH v2 0/2] " Kevin Hilman
2 siblings, 2 replies; 9+ messages in thread
From: Emiliano Ingrassia @ 2018-01-19 1:49 UTC (permalink / raw)
To: linus-amlogic
The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
which supports 10/100/1000 Mbps ethernet.
The PHY reset and interrupt lines are controlled by the SoC via
two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
The PHY energy efficient ethernet (eee) mode is marked as broken
using "eee-broken-1000t" because, during tests, high packet losses
were experienced without it.
Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
---
arch/arm/boot/dts/meson8b-odroidc1.dts | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 9ff6ca4e20d0..d5e83051bb54 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -99,3 +99,33 @@
&usb1 {
status = "okay";
};
+
+ðmac {
+ status = "okay";
+
+ snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
+ snps,reset-active-low;
+ snps,reset-delays-us = <0 10000 30000>;
+
+ pinctrl-0 = <ð_rgmii_pins>;
+ pinctrl-names = "default";
+
+ phy-mode = "rgmii";
+ phy-handle = <ð_phy>;
+ amlogic,tx-delay-ns = <4>;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Realtek RTL8211F (0x001cc916) */
+ eth_phy: ethernet-phy at 0 {
+ reg = <0>;
+ eee-broken-1000t;
+ interrupt-parent = <&gpio_intc>;
+ /* GPIOH_3 */
+ interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
+ };
+ };
+};
--
2.15.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support
2018-01-19 1:49 ` [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support Emiliano Ingrassia
@ 2018-01-25 2:18 ` Linus Lüssing
2018-01-28 16:28 ` Emiliano Ingrassia
2018-01-28 20:26 ` Martin Blumenstingl
1 sibling, 1 reply; 9+ messages in thread
From: Linus Lüssing @ 2018-01-25 2:18 UTC (permalink / raw)
To: linus-amlogic
Hi Emiliano,
On Fri, Jan 19, 2018 at 02:49:17AM +0100, Emiliano Ingrassia wrote:
> The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
> which supports 10/100/1000 Mbps ethernet.
> The PHY reset and interrupt lines are controlled by the SoC via
> two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
> The PHY energy efficient ethernet (eee) mode is marked as broken
> using "eee-broken-1000t" because, during tests, high packet losses
> were experienced without it.
>
> Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
I tested your patches on a 4.15-rc8 kernel with the following
patches on top:
f120580deba4 ARM: dts: meson8b-odroidc1: ethernet support
22a6d87b9ee2 ARM: dts: meson8b: extend ethernet controller description
6d053e5f1f3b net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock
8a5f3df5bcfa net: stmmac: dwmac-meson8b: fix setting the RGMII TX clock on Meson8b
c045d6785ec7 net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration
6b63adce0b60 net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode
9e8946eda815 clk: meson: mpll: use 64-bit maths in params_from_rate
And config file created via multiv7_defconfig.
I tested against a laptop with an Intel Core2Duo and an Intel
82567LM Gigabit network card.
These are the results I get with iperf3, running for 120s for each
test:
# Direct Gigabit connection between Odroid C1+ and the laptop:
Odroid C1+ -> Laptop: 646MBit/s
Laptop -> Odroid C1+: 239MBit/s
# 100Mbit forced via 'ethtool advertise 0x008' on laptop:
Odroid C1+ -> Laptop: 84.6MBit/s
Laptop -> Odroid C1+: 52.7MBit/s
# Connection with a Gigabit switch in between:
Odroid C1+ -> GBit-SW -> Laptop: 626MBit/s
Laptop -> GBit-SW -> Odroid C1+: 248MBit/s
# Connection with a 100MBit switch in between:
Odroid C1+ -> 100MBit-SW -> Laptop: 91.7MBit/s
Laptop -> 100MBit-SW -> Odroid C1+: 43.7MBit/s
Not quite sure why RX is somehow slower than TX on the C1+.
But other than that looks great :-). Many thanks to
everyone who had contributed!
Tested-by: Linus L?ssing <linus.luessing@c0d3.blue>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description
2018-01-19 1:48 ` [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description Emiliano Ingrassia
@ 2018-01-25 2:18 ` Linus Lüssing
2018-01-28 20:27 ` Martin Blumenstingl
1 sibling, 0 replies; 9+ messages in thread
From: Linus Lüssing @ 2018-01-25 2:18 UTC (permalink / raw)
To: linus-amlogic
On Fri, Jan 19, 2018 at 02:48:00AM +0100, Emiliano Ingrassia wrote:
> Enable S805 (aka Meson8b) ethernet pin multiplexing and
> extend the controller description.
> The programmable ethernet (PRG_ETHERNET) register address
> value (0xc1108108), contained in meson.dtsi, is overridden
> according to the value found in S805 SoC manual.
> This also required to switch to "amlogic,meson8b-dwmac" compatible
> to correctly configure that register.
> The two clock sources "clkin0" and "clkin1" are both equals
> to MPLL2 because, as reported in bit 9-7 register description,
> that is the only Meson8b ethernet clock source.
>
> Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Tested-by: Linus L?ssing <linus.luessing@c0d3.blue>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support
2018-01-25 2:18 ` Linus Lüssing
@ 2018-01-28 16:28 ` Emiliano Ingrassia
0 siblings, 0 replies; 9+ messages in thread
From: Emiliano Ingrassia @ 2018-01-28 16:28 UTC (permalink / raw)
To: linus-amlogic
Hi Linus,
thanks for testing!
On Thu, Jan 25, 2018 at 03:18:12AM +0100, Linus L?ssing wrote:
> Hi Emiliano,
>
> On Fri, Jan 19, 2018 at 02:49:17AM +0100, Emiliano Ingrassia wrote:
> > The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
> > which supports 10/100/1000 Mbps ethernet.
> > The PHY reset and interrupt lines are controlled by the SoC via
> > two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
> > The PHY energy efficient ethernet (eee) mode is marked as broken
> > using "eee-broken-1000t" because, during tests, high packet losses
> > were experienced without it.
> >
> > Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
>
> I tested your patches on a 4.15-rc8 kernel with the following
> patches on top:
>
> f120580deba4 ARM: dts: meson8b-odroidc1: ethernet support
> 22a6d87b9ee2 ARM: dts: meson8b: extend ethernet controller description
> 6d053e5f1f3b net: stmmac: dwmac-meson8b: propagate rate changes to the parent clock
> 8a5f3df5bcfa net: stmmac: dwmac-meson8b: fix setting the RGMII TX clock on Meson8b
> c045d6785ec7 net: stmmac: dwmac-meson8b: fix internal RGMII clock configuration
> 6b63adce0b60 net: stmmac: dwmac-meson8b: only configure the clocks in RGMII mode
> 9e8946eda815 clk: meson: mpll: use 64-bit maths in params_from_rate
>
> And config file created via multiv7_defconfig.
>
> I tested against a laptop with an Intel Core2Duo and an Intel
> 82567LM Gigabit network card.
>
> These are the results I get with iperf3, running for 120s for each
> test:
>
> # Direct Gigabit connection between Odroid C1+ and the laptop:
>
> Odroid C1+ -> Laptop: 646MBit/s
> Laptop -> Odroid C1+: 239MBit/s
>
> # 100Mbit forced via 'ethtool advertise 0x008' on laptop:
>
> Odroid C1+ -> Laptop: 84.6MBit/s
> Laptop -> Odroid C1+: 52.7MBit/s
>
> # Connection with a Gigabit switch in between:
>
> Odroid C1+ -> GBit-SW -> Laptop: 626MBit/s
> Laptop -> GBit-SW -> Odroid C1+: 248MBit/s
>
> # Connection with a 100MBit switch in between:
>
> Odroid C1+ -> 100MBit-SW -> Laptop: 91.7MBit/s
> Laptop -> 100MBit-SW -> Odroid C1+: 43.7MBit/s
>
>
> Not quite sure why RX is somehow slower than TX on the C1+.
> But other than that looks great :-). Many thanks to
> everyone who had contributed!
>
> Tested-by: Linus L?ssing <linus.luessing@c0d3.blue>
I tested ethernet performance, with the same patches applied
on top of 4.15-rc8 kernel, using the kernel packet generator
configured as follow:
# echo "add_device eth0" > /proc/net/pktgen/kpktgend_0
# echo "dst_min 1.0.0.1" > /proc/net/pktgen/eth0
# echo "dst_max 254.255.255.254" > /proc/net/pktgen/eth0
# echo "src_max 254.255.255.254" > /proc/net/pktgen/eth0
# echo "src_min 1.0.0.1" > /proc/net/pktgen/eth0
# echo "count 1000000000" > /proc/net/pktgen/eth0
# echo "min_pkt_size 1500" > /proc/net/pktgen/eth0
# echo "max_pkt_size 1500" > /proc/net/pktgen/eth0
# echo "udp_src_min 1" > /proc/net/pktgen/eth0
# echo "udp_src_max 65534" > /proc/net/pktgen/eth0
# echo "src_mac <mac_src>" > /proc/net/pktgen/eth0
# echo "dst_mac <mac_dst>" > /proc/net/pktgen/eth0
# echo "flag TXSIZE_RND" > /proc/net/pktgen/eth0
# echo "flag IPSRC_RND" > /proc/net/pktgen/eth0
# echo "flag IPDST_RND" > /proc/net/pktgen/eth0
# echo "flag UDPDST_RND" > /proc/net/pktgen/eth0
# echo "flag UDPSRC_RND" > /proc/net/pktgen/eth0
# echo start > /proc/net/pktgen/pgctrl
on a direct Gigabit connection between the board and a laptop
with gigabit ethernet interface.
The results were measured with the tool "nload".
Running the rx/tx tests separately I got:
Odroid C1+ -> Laptop: 941MBit/s
Laptop -> Odroid C1+: 934MBit/s
Testing in parallel (generator used on both sides):
Odroid C1+ -> Laptop: 245MBit/s (outgoing)
Laptop -> Odroid C1+: 455MBit/s (incoming)
with just one CPU fully loaded (for the packet generator) and about
67 MB of RAM in use (on the C1+).
On my board "ethtool eth0" reports:
Settings for eth0:
Supported ports: [ TP MII ]
Supported link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Advertised pause frame use: No
Advertised auto-negotiation: Yes
Link partner advertised link modes: 10baseT/Half 10baseT/Full
100baseT/Half 100baseT/Full
1000baseT/Full
Link partner advertised pause frame use: Symmetric
Link partner advertised auto-negotiation: Yes
Speed: 1000Mb/s
Duplex: Full
Port: MII
PHYAD: 0
Transceiver: internal
Auto-negotiation: on
Supports Wake-on: ug
Wake-on: d
Current message level: 0x0000003f (63)
drv probe link timer ifdown ifup
Link detected: yes
Also, "mii-tool eth0" reports:
eth0: negotiated 1000baseT-FD flow-control, link ok
So, apparently, we have a 1Gbit full-duplex connection while, from
the tests, it seems we have less than a half-duplex connection.
I can't explain why.
About the fact that Rx speed is about half the Tx speed,
I think this is due to the different length of the FIFO queue inside
the MAC. The SoC S805 manual reports an Rx FIFO of 4KB and a Tx FIFO
of 2KB, with the latter half the former.
Regards,
Emiliano
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support
2018-01-19 1:49 ` [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support Emiliano Ingrassia
2018-01-25 2:18 ` Linus Lüssing
@ 2018-01-28 20:26 ` Martin Blumenstingl
1 sibling, 0 replies; 9+ messages in thread
From: Martin Blumenstingl @ 2018-01-28 20:26 UTC (permalink / raw)
To: linus-amlogic
On Fri, Jan 19, 2018 at 2:49 AM, Emiliano Ingrassia
<ingrassia@epigenesys.com> wrote:
> The Odroid-C1+ board is equipped with an RTL8211F ethernet PHY
> which supports 10/100/1000 Mbps ethernet.
> The PHY reset and interrupt lines are controlled by the SoC via
> two GPIO lines (GPIOH_4 and GPIOH_3 respectively).
> The PHY energy efficient ethernet (eee) mode is marked as broken
> using "eee-broken-1000t" because, during tests, high packet losses
> were experienced without it.
>
> Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> arch/arm/boot/dts/meson8b-odroidc1.dts | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts b/arch/arm/boot/dts/meson8b-odroidc1.dts
> index 9ff6ca4e20d0..d5e83051bb54 100644
> --- a/arch/arm/boot/dts/meson8b-odroidc1.dts
> +++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
> @@ -99,3 +99,33 @@
> &usb1 {
> status = "okay";
> };
> +
> +ðmac {
> + status = "okay";
> +
> + snps,reset-gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
> + snps,reset-active-low;
> + snps,reset-delays-us = <0 10000 30000>;
> +
> + pinctrl-0 = <ð_rgmii_pins>;
> + pinctrl-names = "default";
> +
> + phy-mode = "rgmii";
> + phy-handle = <ð_phy>;
> + amlogic,tx-delay-ns = <4>;
> +
> + mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* Realtek RTL8211F (0x001cc916) */
> + eth_phy: ethernet-phy at 0 {
> + reg = <0>;
> + eee-broken-1000t;
> + interrupt-parent = <&gpio_intc>;
> + /* GPIOH_3 */
> + interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
> + };
> + };
> +};
> --
> 2.15.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description
2018-01-19 1:48 ` [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description Emiliano Ingrassia
2018-01-25 2:18 ` Linus Lüssing
@ 2018-01-28 20:27 ` Martin Blumenstingl
1 sibling, 0 replies; 9+ messages in thread
From: Martin Blumenstingl @ 2018-01-28 20:27 UTC (permalink / raw)
To: linus-amlogic
On Fri, Jan 19, 2018 at 2:48 AM, Emiliano Ingrassia
<ingrassia@epigenesys.com> wrote:
> Enable S805 (aka Meson8b) ethernet pin multiplexing and
> extend the controller description.
> The programmable ethernet (PRG_ETHERNET) register address
> value (0xc1108108), contained in meson.dtsi, is overridden
> according to the value found in S805 SoC manual.
> This also required to switch to "amlogic,meson8b-dwmac" compatible
> to correctly configure that register.
> The two clock sources "clkin0" and "clkin1" are both equals
> to MPLL2 because, as reported in bit 9-7 register description,
> that is the only Meson8b ethernet clock source.
>
> Signed-off-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
> arch/arm/boot/dts/meson8b.dtsi | 35 +++++++++++++++++++++++++++++++++--
> 1 file changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
> index d75e0ceda8bb..fa5274aa370b 100644
> --- a/arch/arm/boot/dts/meson8b.dtsi
> +++ b/arch/arm/boot/dts/meson8b.dtsi
> @@ -185,6 +185,27 @@
> #gpio-cells = <2>;
> gpio-ranges = <&pinctrl_cbus 0 0 130>;
> };
> +
> + eth_rgmii_pins: eth-rgmii {
> + mux {
> + groups = "eth_tx_clk",
> + "eth_tx_en",
> + "eth_txd1_0",
> + "eth_txd1_1",
> + "eth_txd0_0",
> + "eth_txd0_1",
> + "eth_rx_clk",
> + "eth_rx_dv",
> + "eth_rxd1",
> + "eth_rxd0",
> + "eth_mdio_en",
> + "eth_mdc",
> + "eth_ref_clk",
> + "eth_txd2",
> + "eth_txd3";
> + function = "ethernet";
> + };
> + };
> };
> };
>
> @@ -203,8 +224,18 @@
> };
>
> ðmac {
> - clocks = <&clkc CLKID_ETH>;
> - clock-names = "stmmaceth";
> + compatible = "amlogic,meson8b-dwmac", "snps,dwmac-3.70a", "snps,dwmac";
> +
> + reg = <0xc9410000 0x10000
> + 0xc1108140 0x4>;
> +
> + clocks = <&clkc CLKID_ETH>,
> + <&clkc CLKID_MPLL2>,
> + <&clkc CLKID_MPLL2>;
> + clock-names = "stmmaceth", "clkin0", "clkin1";
> +
> + resets = <&reset RESET_ETHERNET>;
> + reset-names = "stmmaceth";
> };
>
> &gpio_intc {
> --
> 2.15.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v2 0/2] meson8b-odroidc1: ethernet support
2018-01-19 1:47 [PATCH v2 0/2] meson8b-odroidc1: ethernet support Emiliano Ingrassia
2018-01-19 1:48 ` [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description Emiliano Ingrassia
2018-01-19 1:49 ` [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support Emiliano Ingrassia
@ 2018-01-31 0:38 ` Kevin Hilman
2 siblings, 0 replies; 9+ messages in thread
From: Kevin Hilman @ 2018-01-31 0:38 UTC (permalink / raw)
To: linus-amlogic
Emiliano Ingrassia <ingrassia@epigenesys.com> writes:
> This patchset, tested on an Odroid-C1+ board, enables ethernet support
> on Odroid-C1/C1+ boards, improving and extending the ethernet description
> in the relative device tree.
>
> In particular:
> - enables the Meson8b ethernet controller pin multiplexing;
> - fixes and extends the Meson8b ethernet controller description;
> - adds the Odroid-C1+ ethernet PHY description and enables the
> ethernet controller.
>
> This patchset depends on patchset "dwmac-meson8b: clock fixes for Meson8b".
Series applied to v4.17/dt64, with tags from Martin and Linus,
Thanks,
Kevin
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2018-01-31 0:38 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-01-19 1:47 [PATCH v2 0/2] meson8b-odroidc1: ethernet support Emiliano Ingrassia
2018-01-19 1:48 ` [PATCH v2 1/2] ARM: dts: meson8b: extend ethernet controller description Emiliano Ingrassia
2018-01-25 2:18 ` Linus Lüssing
2018-01-28 20:27 ` Martin Blumenstingl
2018-01-19 1:49 ` [PATCH v2 2/2] ARM: dts: meson8b-odroidc1: ethernet support Emiliano Ingrassia
2018-01-25 2:18 ` Linus Lüssing
2018-01-28 16:28 ` Emiliano Ingrassia
2018-01-28 20:26 ` Martin Blumenstingl
2018-01-31 0:38 ` [PATCH v2 0/2] " Kevin Hilman
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