* [PATCH 0/3] powerpc: update for the Keymile QorIQ boards
@ 2016-12-15 13:22 Valentin Longchamp
2016-12-15 13:22 ` [PATCH 1/3] powerpc/corenet: explicitly disable the SDHC controller on kmcoge4 Valentin Longchamp
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Valentin Longchamp @ 2016-12-15 13:22 UTC (permalink / raw)
To: oss, linuxppc-dev; +Cc: Valentin Longchamp
This series contains some updates for the Keymile QorIQ boards.
There is a small fix for the kmcoge4 board DTS, the removal of the
kmp204x_defconfig file which is unmaintained (corenet32_smp_defconfig
can be used instead) and the addition of the kmcent2 board.
Valentin Longchamp (3):
powerpc/corenet: explicitly disable the SDHC controller on kmcoge4
powerpc/85xx: remove the kmp204x_defconfig
powerpc/corenet: add support for the kmcent2 board
arch/powerpc/boot/dts/fsl/kmcent2.dts | 303 ++++++++++++++++++++++++++
arch/powerpc/boot/dts/fsl/kmcoge4.dts | 4 +
arch/powerpc/configs/85xx/kmp204x_defconfig | 220 -------------------
arch/powerpc/platforms/85xx/corenet_generic.c | 1 +
4 files changed, 308 insertions(+), 220 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/kmcent2.dts
delete mode 100644 arch/powerpc/configs/85xx/kmp204x_defconfig
--
1.8.3.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/3] powerpc/corenet: explicitly disable the SDHC controller on kmcoge4
2016-12-15 13:22 [PATCH 0/3] powerpc: update for the Keymile QorIQ boards Valentin Longchamp
@ 2016-12-15 13:22 ` Valentin Longchamp
2016-12-15 13:22 ` [PATCH 2/3] powerpc/85xx: remove the kmp204x_defconfig Valentin Longchamp
2016-12-15 13:22 ` [PATCH 3/3] powerpc/corenet: add support for the kmcent2 board Valentin Longchamp
2 siblings, 0 replies; 6+ messages in thread
From: Valentin Longchamp @ 2016-12-15 13:22 UTC (permalink / raw)
To: oss, linuxppc-dev; +Cc: Valentin Longchamp
It is not implemented on the kmcoge4 hardware and if not disabled it
leads to error messages with the corenet32_smp_defconfig.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
---
arch/powerpc/boot/dts/fsl/kmcoge4.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/kmcoge4.dts b/arch/powerpc/boot/dts/fsl/kmcoge4.dts
index ae70a24..e103c0f 100644
--- a/arch/powerpc/boot/dts/fsl/kmcoge4.dts
+++ b/arch/powerpc/boot/dts/fsl/kmcoge4.dts
@@ -83,6 +83,10 @@
};
};
+ sdhc@114000 {
+ status = "disabled";
+ };
+
i2c@119000 {
status = "disabled";
};
--
1.8.3.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/3] powerpc/85xx: remove the kmp204x_defconfig
2016-12-15 13:22 [PATCH 0/3] powerpc: update for the Keymile QorIQ boards Valentin Longchamp
2016-12-15 13:22 ` [PATCH 1/3] powerpc/corenet: explicitly disable the SDHC controller on kmcoge4 Valentin Longchamp
@ 2016-12-15 13:22 ` Valentin Longchamp
2016-12-15 13:22 ` [PATCH 3/3] powerpc/corenet: add support for the kmcent2 board Valentin Longchamp
2 siblings, 0 replies; 6+ messages in thread
From: Valentin Longchamp @ 2016-12-15 13:22 UTC (permalink / raw)
To: oss, linuxppc-dev; +Cc: Valentin Longchamp
It is not maintained and thus obsolete. corenet32_smp_defconfig can be
used as reference for the kmcoge4/kmp204x boards.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
---
arch/powerpc/configs/85xx/kmp204x_defconfig | 220 ----------------------------
1 file changed, 220 deletions(-)
delete mode 100644 arch/powerpc/configs/85xx/kmp204x_defconfig
diff --git a/arch/powerpc/configs/85xx/kmp204x_defconfig b/arch/powerpc/configs/85xx/kmp204x_defconfig
deleted file mode 100644
index aaaaa60..0000000
--- a/arch/powerpc/configs/85xx/kmp204x_defconfig
+++ /dev/null
@@ -1,220 +0,0 @@
-CONFIG_PPC_85xx=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=8
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_AUDIT=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_CGROUPS=y
-CONFIG_CGROUP_SCHED=y
-CONFIG_RELAY=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_EMBEDDED=y
-CONFIG_PERF_EVENTS=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
-CONFIG_CORENET_GENERIC=y
-CONFIG_MPIC_MSGR=y
-CONFIG_HIGHMEM=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
-CONFIG_BINFMT_MISC=m
-CONFIG_KEXEC=y
-CONFIG_FORCE_MAX_ZONEORDER=13
-CONFIG_PCI=y
-CONFIG_PCIEPORTBUS=y
-# CONFIG_PCIEASPM is not set
-CONFIG_PCI_MSI=y
-CONFIG_ADVANCED_OPTIONS=y
-CONFIG_LOWMEM_SIZE_BOOL=y
-CONFIG_LOWMEM_SIZE=0x20000000
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_XFRM_SUB_POLICY=y
-CONFIG_XFRM_STATISTICS=y
-CONFIG_NET_KEY=y
-CONFIG_NET_KEY_MIGRATE=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_ADVANCED_ROUTER=y
-CONFIG_IP_MULTIPLE_TABLES=y
-CONFIG_IP_ROUTE_MULTIPATH=y
-CONFIG_IP_ROUTE_VERBOSE=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_IP_PNP_RARP=y
-CONFIG_NET_IPIP=y
-CONFIG_IP_MROUTE=y
-CONFIG_IP_PIMSM_V1=y
-CONFIG_IP_PIMSM_V2=y
-CONFIG_INET_AH=y
-CONFIG_INET_ESP=y
-CONFIG_INET_IPCOMP=y
-CONFIG_IPV6=y
-CONFIG_IP_SCTP=m
-CONFIG_TIPC=y
-CONFIG_NET_SCHED=y
-CONFIG_NET_SCH_CBQ=y
-CONFIG_NET_SCH_HTB=y
-CONFIG_NET_SCH_HFSC=y
-CONFIG_NET_SCH_PRIO=y
-CONFIG_NET_SCH_MULTIQ=y
-CONFIG_NET_SCH_RED=y
-CONFIG_NET_SCH_SFQ=y
-CONFIG_NET_SCH_TEQL=y
-CONFIG_NET_SCH_TBF=y
-CONFIG_NET_SCH_GRED=y
-CONFIG_NET_CLS_BASIC=y
-CONFIG_NET_CLS_TCINDEX=y
-CONFIG_NET_CLS_U32=y
-CONFIG_CLS_U32_PERF=y
-CONFIG_CLS_U32_MARK=y
-CONFIG_NET_CLS_FLOW=y
-CONFIG_NET_CLS_CGROUP=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/mdev"
-CONFIG_DEVTMPFS=y
-CONFIG_MTD=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_PHRAM=y
-CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC_BCH=y
-CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_MTD_UBI=y
-CONFIG_MTD_UBI_GLUEBI=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_COUNT=2
-CONFIG_BLK_DEV_RAM_SIZE=2048
-CONFIG_EEPROM_AT24=y
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_LOGGING=y
-CONFIG_SCSI_SYM53C8XX_2=y
-CONFIG_NETDEVICES=y
-# CONFIG_NET_VENDOR_3COM is not set
-# CONFIG_NET_VENDOR_ADAPTEC is not set
-# CONFIG_NET_VENDOR_ALTEON is not set
-# CONFIG_NET_VENDOR_AMD is not set
-# CONFIG_NET_VENDOR_ATHEROS is not set
-# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_BROCADE is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
-# CONFIG_NET_VENDOR_CISCO is not set
-# CONFIG_NET_VENDOR_DEC is not set
-# CONFIG_NET_VENDOR_DLINK is not set
-# CONFIG_NET_VENDOR_EMULEX is not set
-# CONFIG_NET_VENDOR_EXAR is not set
-CONFIG_FSL_PQ_MDIO=y
-CONFIG_FSL_XGMAC_MDIO=y
-# CONFIG_NET_VENDOR_HP is not set
-# CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_MARVELL is not set
-# CONFIG_NET_VENDOR_MELLANOX is not set
-# CONFIG_NET_VENDOR_MICREL is not set
-# CONFIG_NET_VENDOR_MICROCHIP is not set
-# CONFIG_NET_VENDOR_MYRI is not set
-# CONFIG_NET_VENDOR_NATSEMI is not set
-# CONFIG_NET_VENDOR_NVIDIA is not set
-# CONFIG_NET_VENDOR_OKI is not set
-# CONFIG_NET_PACKET_ENGINE is not set
-# CONFIG_NET_VENDOR_QLOGIC is not set
-# CONFIG_NET_VENDOR_REALTEK is not set
-# CONFIG_NET_VENDOR_RDC is not set
-# CONFIG_NET_VENDOR_SEEQ is not set
-# CONFIG_NET_VENDOR_SILAN is not set
-# CONFIG_NET_VENDOR_SIS is not set
-# CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
-# CONFIG_NET_VENDOR_SUN is not set
-# CONFIG_NET_VENDOR_TEHUTI is not set
-# CONFIG_NET_VENDOR_TI is not set
-# CONFIG_NET_VENDOR_VIA is not set
-# CONFIG_NET_VENDOR_WIZNET is not set
-# CONFIG_NET_VENDOR_XILINX is not set
-CONFIG_MARVELL_PHY=y
-CONFIG_VITESSE_PHY=y
-CONFIG_FIXED_PHY=y
-# CONFIG_WLAN is not set
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-CONFIG_SERIO_LIBPS2=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_PPC_EPAPR_HV_BYTECHAN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_MANY_PORTS=y
-CONFIG_SERIAL_8250_DETECT_IRQ=y
-CONFIG_SERIAL_8250_RSA=y
-CONFIG_NVRAM=y
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_MUX=y
-CONFIG_I2C_MUX_PCA954x=y
-CONFIG_I2C_MPC=y
-CONFIG_SPI=y
-CONFIG_SPI_FSL_SPI=y
-CONFIG_SPI_FSL_ESPI=y
-CONFIG_SPI_SPIDEV=m
-CONFIG_PTP_1588_CLOCK=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=y
-CONFIG_EDAC_MPC85XX=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS3232=y
-CONFIG_RTC_DRV_CMOS=y
-CONFIG_UIO=y
-CONFIG_STAGING=y
-CONFIG_CLK_QORIQ=y
-CONFIG_EXT2_FS=y
-CONFIG_NTFS_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_UBIFS_FS=y
-CONFIG_CRAMFS=y
-CONFIG_SQUASHFS=y
-CONFIG_SQUASHFS_XZ=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=m
-CONFIG_CRC_ITU_T=m
-CONFIG_DEBUG_INFO=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_SHIRQ=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_SCHEDSTATS=y
-CONFIG_RCU_TRACE=y
-CONFIG_UPROBE_EVENT=y
-CONFIG_CRYPTO_NULL=y
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_MD4=y
-CONFIG_CRYPTO_SHA256=y
-CONFIG_CRYPTO_SHA512=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRYPTO_DEV_FSL_CAAM=y
--
1.8.3.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/3] powerpc/corenet: add support for the kmcent2 board
2016-12-15 13:22 [PATCH 0/3] powerpc: update for the Keymile QorIQ boards Valentin Longchamp
2016-12-15 13:22 ` [PATCH 1/3] powerpc/corenet: explicitly disable the SDHC controller on kmcoge4 Valentin Longchamp
2016-12-15 13:22 ` [PATCH 2/3] powerpc/85xx: remove the kmp204x_defconfig Valentin Longchamp
@ 2016-12-15 13:22 ` Valentin Longchamp
2016-12-15 14:00 ` Joakim Tjernlund
2 siblings, 1 reply; 6+ messages in thread
From: Valentin Longchamp @ 2016-12-15 13:22 UTC (permalink / raw)
To: oss, linuxppc-dev; +Cc: Valentin Longchamp
This board is built around Freescale's T1040 SoC.
The peripherals used by this design are:
- DDR3 RAM with SPD support
- parallel NOR Flash as boot medium
- 1 PCIe bus (PCIe1 x1)
- 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
- 4 IFC bus devices:
- NOR flash
- NAND flash
- QRIO reset/power mgmt CPLD
- BFTIC chassis management CPLD
- 2 I2C buses
- 1 SPI bus
- HDLC bus with the QE's UCC1
- last but not least, the mandatory serial port
The board can be used with the corenet32_smp_defconfig.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
---
arch/powerpc/boot/dts/fsl/kmcent2.dts | 303 ++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/corenet_generic.c | 1 +
2 files changed, 304 insertions(+)
create mode 100644 arch/powerpc/boot/dts/fsl/kmcent2.dts
diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts b/arch/powerpc/boot/dts/fsl/kmcent2.dts
new file mode 100644
index 0000000..47afa43
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts
@@ -0,0 +1,303 @@
+/*
+ * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
+ *
+ * (C) Copyright 2016
+ * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
+ *
+ * Copyright 2014 - 2015 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "t104xsi-pre.dtsi"
+
+/ {
+ model = "keymile,kmcent2";
+ compatible = "keymile,kmcent2";
+
+ aliases {
+ front_phy = &front_phy;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ bman_fbpr: bman-fbpr {
+ size = <0 0x1000000>;
+ alignment = <0 0x1000000>;
+ };
+ qman_fqd: qman-fqd {
+ size = <0 0x400000>;
+ alignment = <0 0x400000>;
+ };
+ qman_pfdr: qman-pfdr {
+ size = <0 0x2000000>;
+ alignment = <0 0x2000000>;
+ };
+ };
+
+ ifc: localbus@ffe124000 {
+ reg = <0xf 0xfe124000 0 0x2000>;
+ ranges = <0 0 0xf 0xe8000000 0x04000000
+ 1 0 0xf 0xfa000000 0x00010000
+ 2 0 0xf 0xfb000000 0x00010000
+ 4 0 0xf 0xc0000000 0x08000000
+ 6 0 0xf 0xd0000000 0x08000000
+ 7 0 0xf 0xd8000000 0x08000000>;
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x04000000>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x1 0x0 0x10000>;
+ };
+
+ board-control@2,0 {
+ compatible = "keymile,qriox";
+ reg = <0x2 0x0 0x80>;
+ };
+
+ chassis-mgmt@6,0 {
+ compatible = "keymile,bfticu";
+ reg = <6 0 0x100>;
+ interrupt-controller;
+ interrupt-parent = <&mpic>;
+ interrupts = <11 1 0 0>;
+ #interrupt-cells = <1>;
+ };
+
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ dcsr: dcsr@f00000000 {
+ ranges = <0x00000000 0xf 0x00000000 0x01072000>;
+ };
+
+ bportals: bman-portals@ff4000000 {
+ ranges = <0x0 0xf 0xf4000000 0x2000000>;
+ };
+
+ qportals: qman-portals@ff6000000 {
+ ranges = <0x0 0xf 0xf6000000 0x2000000>;
+ };
+
+ soc: soc@ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+
+ spi@110000 {
+ network-clock@1 {
+ compatible = "zarlink,zl30364";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+
+ sdhc@114000 {
+ status = "disabled";
+ };
+
+ i2c@118000 {
+ clock-frequency = <100000>;
+
+ mux@70 {
+ compatible = "nxp,pca9547";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect;
+
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ eeprom@54 {
+ compatible = "24c02";
+ reg = <0x54>;
+ pagesize = <2>;
+ read-only;
+ label = "ddr3-spd";
+ };
+ };
+
+ i2c@7 {
+ reg = <7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ temp-sensor@48 {
+ compatible = "national,lm75";
+ reg = <0x48>;
+ label = "SENSOR_0";
+ };
+ temp-sensor@4a {
+ compatible = "national,lm75";
+ reg = <0x4a>;
+ label = "SENSOR_2";
+ };
+ temp-sensor@4b {
+ compatible = "national,lm75";
+ reg = <0x4b>;
+ label = "SENSOR_3";
+ };
+ };
+ };
+ };
+
+ i2c@118100 {
+ clock-frequency = <100000>;
+
+ eeprom@50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c08";
+ reg = <0x54>;
+ pagesize = <16>;
+ };
+ };
+
+ i2c@119000 {
+ status = "disabled";
+ };
+
+ i2c@119100 {
+ status = "disabled";
+ };
+
+ serial2: serial@11d500 {
+ status = "disabled";
+ };
+
+ serial3: serial@11d600 {
+ status = "disabled";
+ };
+
+ usb0: usb@210000 {
+ status = "disabled";
+ };
+ usb1: usb@211000 {
+ status = "disabled";
+ };
+
+ display@180000 {
+ status = "disabled";
+ };
+
+ sata@220000 {
+ status = "disabled";
+ };
+ sata@221000 {
+ status = "disabled";
+ };
+
+ fman@400000 {
+ ethernet@e0000 {
+ fixed-link = <0 1 1000 0 0>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@e2000 {
+ fixed-link = <1 1 1000 0 0>;
+ phy-connection-type = "sgmii";
+ };
+
+ ethernet@e4000 {
+ status = "disabled";
+ };
+
+ ethernet@e6000 {
+ status = "disabled";
+ };
+
+ ethernet@e8000 {
+ phy-handle = <&front_phy>;
+ phy-connection-type = "rgmii";
+ };
+
+ mdio0: mdio@fc000 {
+ front_phy: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ };
+ };
+ };
+
+
+ pci0: pcie@ffe240000 {
+ reg = <0xf 0xfe240000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci1: pcie@ffe250000 {
+ status = "disabled";
+ };
+
+ pci2: pcie@ffe260000 {
+ status = "disabled";
+ };
+
+ pci3: pcie@ffe270000 {
+ status = "disabled";
+ };
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ compatible = "fsl,t1040-qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ compatible = "fsl,t1040-qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ ucc_hdlc: ucc@2000 {
+ device_type = "hdlc";
+ compatible = "fsl,ucc-hdlc";
+ rx-clock-name = "clk9";
+ tx-clock-name = "clk9";
+ fsl,tx-timeslot-mask = <0xfffffffe>;
+ fsl,rx-timeslot-mask = <0xfffffffe>;
+ fsl,siram-entry-id = <0>;
+ };
+ };
+};
+
+#include "t1040si-post.dtsi"
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c
index 1179115..2d28907 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -160,6 +160,7 @@ int __init corenet_gen_publish_devices(void)
"fsl,T1040RDB",
"fsl,T1042RDB",
"fsl,T1042RDB_PI",
+ "keymile,kmcent2",
"keymile,kmcoge4",
"varisys,CYRUS",
NULL
--
1.8.3.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 3/3] powerpc/corenet: add support for the kmcent2 board
2016-12-15 13:22 ` [PATCH 3/3] powerpc/corenet: add support for the kmcent2 board Valentin Longchamp
@ 2016-12-15 14:00 ` Joakim Tjernlund
2016-12-16 12:49 ` Valentin Longchamp
0 siblings, 1 reply; 6+ messages in thread
From: Joakim Tjernlund @ 2016-12-15 14:00 UTC (permalink / raw)
To: linuxppc-dev, oss, valentin.longchamp
On Thu, 2016-12-15 at 14:22 +0100, Valentin Longchamp wrote:
> This board is built around Freescale's T1040 SoC.
>=20
> The peripherals used by this design are:
> - DDR3 RAM with SPD support
> - parallel NOR Flash as boot medium
> - 1 PCIe bus (PCIe1 x1)
> - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
> - 4 IFC bus devices:
> =A0 - NOR flash
> =A0 - NAND flash
> =A0 - QRIO reset/power mgmt CPLD
> =A0 - BFTIC chassis management CPLD
> - 2 I2C buses
> - 1 SPI bus
> - HDLC bus with the QE's UCC1
> - last but not least, the mandatory serial port
>=20
> The board can be used with the corenet32_smp_defconfig.
>=20
> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
> ---
> =A0arch/powerpc/boot/dts/fsl/kmcent2.dts=A0=A0=A0=A0=A0=A0=A0=A0=A0| 303 =
++++++++++++++++++++++++++
> =A0arch/powerpc/platforms/85xx/corenet_generic.c |=A0=A0=A01 +
> =A02 files changed, 304 insertions(+)
> =A0create mode 100644 arch/powerpc/boot/dts/fsl/kmcent2.dts
>=20
> diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts b/arch/powerpc/boot/dt=
s/fsl/kmcent2.dts
> new file mode 100644
> index 0000000..47afa43
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts
> @@ -0,0 +1,303 @@
> +/*
> + * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
> + *
> + * (C) Copyright 2016
> + * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
> + *
> + * Copyright 2014 - 2015 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute=A0=A0it and/or mo=
dify it
> + * under=A0=A0the terms of=A0=A0the GNU General=A0=A0Public License as p=
ublished by the
> + * Free Software Foundation;=A0=A0either version 2 of the=A0=A0License, =
or (at your
> + * option) any later version.
> + */
> +
[SNIP]
> +
> + ucc_hdlc: ucc@2000 {
> + device_type =3D "hdlc";
> + compatible =3D "fsl,ucc-hdlc";
> + rx-clock-name =3D "clk9";
> + tx-clock-name =3D "clk9";
Should it be clk9 on both tx and rx clock?
Jocke=
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 3/3] powerpc/corenet: add support for the kmcent2 board
2016-12-15 14:00 ` Joakim Tjernlund
@ 2016-12-16 12:49 ` Valentin Longchamp
0 siblings, 0 replies; 6+ messages in thread
From: Valentin Longchamp @ 2016-12-16 12:49 UTC (permalink / raw)
To: Joakim Tjernlund, linuxppc-dev, oss
On 15/12/16 15:00, Joakim Tjernlund wrote:
> On Thu, 2016-12-15 at 14:22 +0100, Valentin Longchamp wrote:
>> This board is built around Freescale's T1040 SoC.
>>
>> The peripherals used by this design are:
>> - DDR3 RAM with SPD support
>> - parallel NOR Flash as boot medium
>> - 1 PCIe bus (PCIe1 x1)
>> - 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
>> - 4 IFC bus devices:
>> - NOR flash
>> - NAND flash
>> - QRIO reset/power mgmt CPLD
>> - BFTIC chassis management CPLD
>> - 2 I2C buses
>> - 1 SPI bus
>> - HDLC bus with the QE's UCC1
>> - last but not least, the mandatory serial port
>>
>> The board can be used with the corenet32_smp_defconfig.
>>
>> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
>> ---
>> arch/powerpc/boot/dts/fsl/kmcent2.dts | 303 ++++++++++++++++++++++++++
>> arch/powerpc/platforms/85xx/corenet_generic.c | 1 +
>> 2 files changed, 304 insertions(+)
>> create mode 100644 arch/powerpc/boot/dts/fsl/kmcent2.dts
>>
>> diff --git a/arch/powerpc/boot/dts/fsl/kmcent2.dts b/arch/powerpc/boot/dts/fsl/kmcent2.dts
>> new file mode 100644
>> index 0000000..47afa43
>> --- /dev/null
>> +++ b/arch/powerpc/boot/dts/fsl/kmcent2.dts
>> @@ -0,0 +1,303 @@
>> +/*
>> + * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
>> + *
>> + * (C) Copyright 2016
>> + * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
>> + *
>> + * Copyright 2014 - 2015 Freescale Semiconductor Inc.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + */
>> +
>
> [SNIP]
>
>> +
>> + ucc_hdlc: ucc@2000 {
>> + device_type = "hdlc";
>> + compatible = "fsl,ucc-hdlc";
>> + rx-clock-name = "clk9";
>> + tx-clock-name = "clk9";
>
> Should it be clk9 on both tx and rx clock?
>
Yeah, why not ? The bus clock is generated somewhere else and is connected to
the clk9 input. Or maybe have I not understood your question ?
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2016-12-16 12:49 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-12-15 13:22 [PATCH 0/3] powerpc: update for the Keymile QorIQ boards Valentin Longchamp
2016-12-15 13:22 ` [PATCH 1/3] powerpc/corenet: explicitly disable the SDHC controller on kmcoge4 Valentin Longchamp
2016-12-15 13:22 ` [PATCH 2/3] powerpc/85xx: remove the kmp204x_defconfig Valentin Longchamp
2016-12-15 13:22 ` [PATCH 3/3] powerpc/corenet: add support for the kmcent2 board Valentin Longchamp
2016-12-15 14:00 ` Joakim Tjernlund
2016-12-16 12:49 ` Valentin Longchamp
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