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From: Dave Hansen <dave.hansen@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-mm <linux-mm@kvack.org>,
	"Andrew Lutomirski" <luto@kernel.org>,
	"Kees Cook" <keescook@google.com>,
	"Hugh Dickins" <hughd@google.com>,
	"Jürgen Groß" <jgross@suse.com>,
	"the arch/x86 maintainers" <x86@kernel.org>
Subject: Re: [PATCH 0/3] Use global pages with PTI
Date: Thu, 15 Feb 2018 10:13:05 -0800	[thread overview]
Message-ID: <648e1bf1-c03e-2f1a-8a08-3763e6211ad3@linux.intel.com> (raw)
In-Reply-To: <CA+55aFy8k_zSJ_ASyzkA9C-jLV4mZsHpv1sOxJ9qpvfS_P6eMg@mail.gmail.com>

On 02/15/2018 09:47 AM, Linus Torvalds wrote:
> On Thu, Feb 15, 2018 at 5:20 AM, Dave Hansen
> <dave.hansen@linux.intel.com> wrote:
>>
>> During the switch over to PTI, we seem to have lost our ability to have
>> GLOBAL mappings.
> 
> Oops. Odd, I have this distinct memory of somebody even _testing_ the
> global bit performance when I pointed out that we shouldn't just make
> the bit go away entirely.
> 
> [ goes back and looks at archives ]
> 
> Oh, that was in fact you who did that performance test.
...
> Did you perhaps re-run any benchmark numbers just to verify? Because
> it's always good to back up patches that should improve performance
> with actual numbers..

Nope, haven't done it yet, but I will.

I wanted to double-check that there was not a reason for doing the
global disabling other than the K8 TLB mismatch issues that Thomas fixed
a few weeks ago:

> commit 52994c256df36fda9a715697431cba9daecb6b11
> Author: Thomas Gleixner <tglx@linutronix.de>
> Date:   Wed Jan 3 15:57:59 2018 +0100
> 
>     x86/pti: Make sure the user/kernel PTEs match
>     
>     Meelis reported that his K8 Athlon64 emits MCE warnings when PTI is
>     enabled:
>     
>     [Hardware Error]: Error Addr: 0x0000ffff81e000e0
>     [Hardware Error]: MC1 Error: L1 TLB multimatch.
>     [Hardware Error]: cache level: L1, tx: INSN

WARNING: multiple messages have this Message-ID (diff)
From: Dave Hansen <dave.hansen@linux.intel.com>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	linux-mm <linux-mm@kvack.org>,
	"Andrew Lutomirski" <luto@kernel.org>,
	"Kees Cook" <keescook@google.com>,
	"Hugh Dickins" <hughd@google.com>,
	"Jürgen Groß" <jgross@suse.com>,
	"the arch/x86 maintainers" <x86@kernel.org>
Subject: Re: [PATCH 0/3] Use global pages with PTI
Date: Thu, 15 Feb 2018 10:13:05 -0800	[thread overview]
Message-ID: <648e1bf1-c03e-2f1a-8a08-3763e6211ad3@linux.intel.com> (raw)
In-Reply-To: <CA+55aFy8k_zSJ_ASyzkA9C-jLV4mZsHpv1sOxJ9qpvfS_P6eMg@mail.gmail.com>

On 02/15/2018 09:47 AM, Linus Torvalds wrote:
> On Thu, Feb 15, 2018 at 5:20 AM, Dave Hansen
> <dave.hansen@linux.intel.com> wrote:
>>
>> During the switch over to PTI, we seem to have lost our ability to have
>> GLOBAL mappings.
> 
> Oops. Odd, I have this distinct memory of somebody even _testing_ the
> global bit performance when I pointed out that we shouldn't just make
> the bit go away entirely.
> 
> [ goes back and looks at archives ]
> 
> Oh, that was in fact you who did that performance test.
...
> Did you perhaps re-run any benchmark numbers just to verify? Because
> it's always good to back up patches that should improve performance
> with actual numbers..

Nope, haven't done it yet, but I will.

I wanted to double-check that there was not a reason for doing the
global disabling other than the K8 TLB mismatch issues that Thomas fixed
a few weeks ago:

> commit 52994c256df36fda9a715697431cba9daecb6b11
> Author: Thomas Gleixner <tglx@linutronix.de>
> Date:   Wed Jan 3 15:57:59 2018 +0100
> 
>     x86/pti: Make sure the user/kernel PTEs match
>     
>     Meelis reported that his K8 Athlon64 emits MCE warnings when PTI is
>     enabled:
>     
>     [Hardware Error]: Error Addr: 0x0000ffff81e000e0
>     [Hardware Error]: MC1 Error: L1 TLB multimatch.
>     [Hardware Error]: cache level: L1, tx: INSN

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  reply	other threads:[~2018-02-15 18:13 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-15 13:20 [PATCH 0/3] Use global pages with PTI Dave Hansen
2018-02-15 13:20 ` Dave Hansen
2018-02-15 13:20 ` [PATCH 1/3] x86/mm: factor out conditional pageattr PTE bit setting code Dave Hansen
2018-02-15 13:20   ` Dave Hansen
2018-02-15 13:20 ` [PATCH 2/3] x86/mm: introduce __PAGE_KERNEL_GLOBAL Dave Hansen
2018-02-15 13:20   ` Dave Hansen
2018-02-16 17:47   ` Nadav Amit
2018-02-16 17:47     ` Nadav Amit
2018-02-16 18:03     ` Dave Hansen
2018-02-16 18:03       ` Dave Hansen
2018-02-16 18:25       ` Nadav Amit
2018-02-16 18:25         ` Nadav Amit
2018-02-16 19:06         ` Dave Hansen
2018-02-16 19:06           ` Dave Hansen
2018-02-16 19:54           ` Nadav Amit
2018-02-16 19:54             ` Nadav Amit
2018-02-16 20:00             ` Dave Hansen
2018-02-16 20:00               ` Dave Hansen
2018-02-16 23:19         ` Dave Hansen
2018-02-16 23:19           ` Dave Hansen
2018-02-15 13:20 ` [PATCH 3/3] x86/pti: enable global pages for shared areas Dave Hansen
2018-02-15 13:20   ` Dave Hansen
2018-02-15 17:47 ` [PATCH 0/3] Use global pages with PTI Linus Torvalds
2018-02-15 17:47   ` Linus Torvalds
2018-02-15 18:13   ` Dave Hansen [this message]
2018-02-15 18:13     ` Dave Hansen
2018-02-15 23:55   ` Dave Hansen
2018-02-15 23:55     ` Dave Hansen
  -- strict thread matches above, loose matches on Subject: below --
2018-02-13 23:19 Dave Hansen

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