All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH i-g-t 1/3] i915/gem_exec_fence: KMS master is not required
@ 2019-11-08 14:22 ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-08 14:22 UTC (permalink / raw)
  To: intel-gfx

Within this set of fence execution tests, we never once try to modeset;
being KMS master is not required.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_fence.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 3657c4b27..d2d26a28b 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -1513,7 +1513,7 @@ igt_main
 	int i915 = -1;
 
 	igt_fixture {
-		i915 = drm_open_driver_master(DRIVER_INTEL);
+		i915 = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(i915);
 		igt_require(gem_has_exec_fence(i915));
 		gem_require_mmap_wc(i915);
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH i-g-t 1/3] i915/gem_exec_fence: KMS master is not required
@ 2019-11-08 14:22 ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-08 14:22 UTC (permalink / raw)
  To: intel-gfx

Within this set of fence execution tests, we never once try to modeset;
being KMS master is not required.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_fence.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 3657c4b27..d2d26a28b 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -1513,7 +1513,7 @@ igt_main
 	int i915 = -1;
 
 	igt_fixture {
-		i915 = drm_open_driver_master(DRIVER_INTEL);
+		i915 = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(i915);
 		igt_require(gem_has_exec_fence(i915));
 		gem_require_mmap_wc(i915);
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH i-g-t 2/3] i915/gem_exec_fence: Allow GPU resets during hang checks
@ 2019-11-08 14:22   ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-08 14:22 UTC (permalink / raw)
  To: intel-gfx

The pair of *-hang-all will generate sufficient hangs for the kernel to
ban the client. This is unfortunate as it means all further tests are
skipped. Ask nicely not to be banned.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_fence.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index d2d26a28b..4e8bdd7b3 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -1522,6 +1522,8 @@ igt_main
 	}
 
 	igt_subtest_group {
+		igt_hang_t hang;
+
 		igt_fixture {
 			igt_fork_hang_detector(i915);
 		}
@@ -1533,12 +1535,17 @@ igt_main
 
 		igt_fixture {
 			igt_stop_hang_detector();
+			hang = igt_allow_hang(i915, 0, 0);
 		}
 
 		igt_subtest("busy-hang-all")
 			test_fence_busy_all(i915, HANG);
 		igt_subtest("wait-hang-all")
 			test_fence_busy_all(i915, WAIT | HANG);
+
+		igt_fixture {
+			igt_disallow_hang(i915, hang);
+		}
 	}
 
 	for (e = intel_execution_engines; e->name; e++) {
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH i-g-t 2/3] i915/gem_exec_fence: Allow GPU resets during hang checks
@ 2019-11-08 14:22   ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-08 14:22 UTC (permalink / raw)
  To: intel-gfx

The pair of *-hang-all will generate sufficient hangs for the kernel to
ban the client. This is unfortunate as it means all further tests are
skipped. Ask nicely not to be banned.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_fence.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index d2d26a28b..4e8bdd7b3 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -1522,6 +1522,8 @@ igt_main
 	}
 
 	igt_subtest_group {
+		igt_hang_t hang;
+
 		igt_fixture {
 			igt_fork_hang_detector(i915);
 		}
@@ -1533,12 +1535,17 @@ igt_main
 
 		igt_fixture {
 			igt_stop_hang_detector();
+			hang = igt_allow_hang(i915, 0, 0);
 		}
 
 		igt_subtest("busy-hang-all")
 			test_fence_busy_all(i915, HANG);
 		igt_subtest("wait-hang-all")
 			test_fence_busy_all(i915, WAIT | HANG);
+
+		igt_fixture {
+			igt_disallow_hang(i915, hang);
+		}
 	}
 
 	for (e = intel_execution_engines; e->name; e++) {
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps
@ 2019-11-08 14:22   ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-08 14:22 UTC (permalink / raw)
  To: intel-gfx

The kernel is now enforcing that clients are not allowed to block higher
priority contexts from accessing the GPU; one is no longer allowed to
sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short
enough not to anger the preempt-off checks while long enough for any
ordinary GPU work to complete.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_fence.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 4e8bdd7b3..002120bf3 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -348,7 +348,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 		i++;
 	}
 
-	sleep(1);
+	/* Long, but not too long to anger preemption disable checks */
+	usleep(50 * 1000); /* 50 ms, typical preempt reset is 150+ms */
 
 	/* Check for invalidly completing the task early */
 	igt_assert(fence_busy(spin->out_fence));
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps
@ 2019-11-08 14:22   ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-08 14:22 UTC (permalink / raw)
  To: intel-gfx

The kernel is now enforcing that clients are not allowed to block higher
priority contexts from accessing the GPU; one is no longer allowed to
sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short
enough not to anger the preempt-off checks while long enough for any
ordinary GPU work to complete.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_fence.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 4e8bdd7b3..002120bf3 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -348,7 +348,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 		i++;
 	}
 
-	sleep(1);
+	/* Long, but not too long to anger preemption disable checks */
+	usleep(50 * 1000); /* 50 ms, typical preempt reset is 150+ms */
 
 	/* Check for invalidly completing the task early */
 	igt_assert(fence_busy(spin->out_fence));
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* ✗ Fi.CI.BAT: failure for series starting with [1/3] i915/gem_exec_fence: KMS master is not required
@ 2019-11-08 15:07   ` Patchwork
  0 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-11-08 15:07 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] i915/gem_exec_fence: KMS master is not required
URL   : https://patchwork.freedesktop.org/series/69193/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7298 -> IGTPW_3668
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3668 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3668, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3668:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  
Known issues
------------

  Here are the changes found in IGTPW_3668 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_execlists:
    - fi-glk-dsi:         [PASS][3] -> [INCOMPLETE][4] ([fdo#103359] / [k.org#198133])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-glk-dsi/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-glk-dsi/igt@i915_selftest@live_execlists.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [PASS][5] -> [FAIL][6] ([fdo#111407])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][7] -> [DMESG-WARN][8] ([fdo#102614])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-icl-u3:          [DMESG-WARN][9] -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-icl-u3/igt@i915_pm_rpm@module-reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-icl-u3/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_hangcheck:
    - fi-hsw-4770r:       [DMESG-FAIL][11] ([fdo#111991]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-icl-u2:          [FAIL][13] ([fdo#109635 ] / [fdo#110387]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 
  [fdo#110387]: https://bugs.freedesktop.org/show_bug.cgi?id=110387
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111991]: https://bugs.freedesktop.org/show_bug.cgi?id=111991
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (51 -> 44)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-dsi fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5268 -> IGTPW_3668

  CI-20190529: 20190529
  CI_DRM_7298: 1281ac91aabe4bed2f89e539a7f2073475d0124b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3668: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/index.html
  IGT_5268: c94958b8f7caefcda72392417ae6f3a98e36a48b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] i915/gem_exec_fence: KMS master is not required
@ 2019-11-08 15:07   ` Patchwork
  0 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2019-11-08 15:07 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/3] i915/gem_exec_fence: KMS master is not required
URL   : https://patchwork.freedesktop.org/series/69193/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7298 -> IGTPW_3668
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3668 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3668, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3668:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_blt:
    - fi-hsw-4770r:       [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  
Known issues
------------

  Here are the changes found in IGTPW_3668 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_execlists:
    - fi-glk-dsi:         [PASS][3] -> [INCOMPLETE][4] ([fdo#103359] / [k.org#198133])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-glk-dsi/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-glk-dsi/igt@i915_selftest@live_execlists.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [PASS][5] -> [FAIL][6] ([fdo#111407])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][7] -> [DMESG-WARN][8] ([fdo#102614])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@i915_pm_rpm@module-reload:
    - fi-icl-u3:          [DMESG-WARN][9] -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-icl-u3/igt@i915_pm_rpm@module-reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-icl-u3/igt@i915_pm_rpm@module-reload.html

  * igt@i915_selftest@live_hangcheck:
    - fi-hsw-4770r:       [DMESG-FAIL][11] ([fdo#111991]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-hsw-4770r/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-icl-u2:          [FAIL][13] ([fdo#109635 ] / [fdo#110387]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7298/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/fi-icl-u2/igt@kms_chamelium@dp-crc-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 
  [fdo#110387]: https://bugs.freedesktop.org/show_bug.cgi?id=110387
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#111991]: https://bugs.freedesktop.org/show_bug.cgi?id=111991
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (51 -> 44)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-dsi fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5268 -> IGTPW_3668

  CI-20190529: 20190529
  CI_DRM_7298: 1281ac91aabe4bed2f89e539a7f2073475d0124b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3668: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/index.html
  IGT_5268: c94958b8f7caefcda72392417ae6f3a98e36a48b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3668/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH i-g-t 1/3] i915/gem_exec_fence: KMS master is not required
@ 2019-11-13 10:47   ` Tvrtko Ursulin
  0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2019-11-13 10:47 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 14:22, Chris Wilson wrote:
> Within this set of fence execution tests, we never once try to modeset;
> being KMS master is not required.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_exec_fence.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index 3657c4b27..d2d26a28b 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -1513,7 +1513,7 @@ igt_main
>   	int i915 = -1;
>   
>   	igt_fixture {
> -		i915 = drm_open_driver_master(DRIVER_INTEL);
> +		i915 = drm_open_driver(DRIVER_INTEL);
>   		igt_require_gem(i915);
>   		igt_require(gem_has_exec_fence(i915));
>   		gem_require_mmap_wc(i915);
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t 1/3] i915/gem_exec_fence: KMS master is not required
@ 2019-11-13 10:47   ` Tvrtko Ursulin
  0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2019-11-13 10:47 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 14:22, Chris Wilson wrote:
> Within this set of fence execution tests, we never once try to modeset;
> being KMS master is not required.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_exec_fence.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index 3657c4b27..d2d26a28b 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -1513,7 +1513,7 @@ igt_main
>   	int i915 = -1;
>   
>   	igt_fixture {
> -		i915 = drm_open_driver_master(DRIVER_INTEL);
> +		i915 = drm_open_driver(DRIVER_INTEL);
>   		igt_require_gem(i915);
>   		igt_require(gem_has_exec_fence(i915));
>   		gem_require_mmap_wc(i915);
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH i-g-t 2/3] i915/gem_exec_fence: Allow GPU resets during hang checks
@ 2019-11-13 10:51     ` Tvrtko Ursulin
  0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2019-11-13 10:51 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 14:22, Chris Wilson wrote:
> The pair of *-hang-all will generate sufficient hangs for the kernel to
> ban the client. This is unfortunate as it means all further tests are
> skipped. Ask nicely not to be banned.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_exec_fence.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index d2d26a28b..4e8bdd7b3 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -1522,6 +1522,8 @@ igt_main
>   	}
>   
>   	igt_subtest_group {
> +		igt_hang_t hang;
> +
>   		igt_fixture {
>   			igt_fork_hang_detector(i915);
>   		}
> @@ -1533,12 +1535,17 @@ igt_main
>   
>   		igt_fixture {
>   			igt_stop_hang_detector();
> +			hang = igt_allow_hang(i915, 0, 0);
>   		}
>   
>   		igt_subtest("busy-hang-all")
>   			test_fence_busy_all(i915, HANG);
>   		igt_subtest("wait-hang-all")
>   			test_fence_busy_all(i915, WAIT | HANG);
> +
> +		igt_fixture {
> +			igt_disallow_hang(i915, hang);
> +		}
>   	}
>   
>   	for (e = intel_execution_engines; e->name; e++) {
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t 2/3] i915/gem_exec_fence: Allow GPU resets during hang checks
@ 2019-11-13 10:51     ` Tvrtko Ursulin
  0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2019-11-13 10:51 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 14:22, Chris Wilson wrote:
> The pair of *-hang-all will generate sufficient hangs for the kernel to
> ban the client. This is unfortunate as it means all further tests are
> skipped. Ask nicely not to be banned.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_exec_fence.c | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index d2d26a28b..4e8bdd7b3 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -1522,6 +1522,8 @@ igt_main
>   	}
>   
>   	igt_subtest_group {
> +		igt_hang_t hang;
> +
>   		igt_fixture {
>   			igt_fork_hang_detector(i915);
>   		}
> @@ -1533,12 +1535,17 @@ igt_main
>   
>   		igt_fixture {
>   			igt_stop_hang_detector();
> +			hang = igt_allow_hang(i915, 0, 0);
>   		}
>   
>   		igt_subtest("busy-hang-all")
>   			test_fence_busy_all(i915, HANG);
>   		igt_subtest("wait-hang-all")
>   			test_fence_busy_all(i915, WAIT | HANG);
> +
> +		igt_fixture {
> +			igt_disallow_hang(i915, hang);
> +		}
>   	}
>   
>   	for (e = intel_execution_engines; e->name; e++) {
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps
@ 2019-11-13 10:54     ` Tvrtko Ursulin
  0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2019-11-13 10:54 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 14:22, Chris Wilson wrote:
> The kernel is now enforcing that clients are not allowed to block higher
> priority contexts from accessing the GPU; one is no longer allowed to
> sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short
> enough not to anger the preempt-off checks while long enough for any
> ordinary GPU work to complete.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_exec_fence.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index 4e8bdd7b3..002120bf3 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -348,7 +348,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
>   		i++;
>   	}
>   
> -	sleep(1);
> +	/* Long, but not too long to anger preemption disable checks */
> +	usleep(50 * 1000); /* 50 ms, typical preempt reset is 150+ms */

Was the point of this sleep two-fold: 1) allow spinner to start (use 
polling spinner?) and allow forked children to submit (use pipe sync?)?

But okay as a quick fix.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

>   
>   	/* Check for invalidly completing the task early */
>   	igt_assert(fence_busy(spin->out_fence));
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps
@ 2019-11-13 10:54     ` Tvrtko Ursulin
  0 siblings, 0 replies; 16+ messages in thread
From: Tvrtko Ursulin @ 2019-11-13 10:54 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 14:22, Chris Wilson wrote:
> The kernel is now enforcing that clients are not allowed to block higher
> priority contexts from accessing the GPU; one is no longer allowed to
> sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short
> enough not to anger the preempt-off checks while long enough for any
> ordinary GPU work to complete.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   tests/i915/gem_exec_fence.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> index 4e8bdd7b3..002120bf3 100644
> --- a/tests/i915/gem_exec_fence.c
> +++ b/tests/i915/gem_exec_fence.c
> @@ -348,7 +348,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
>   		i++;
>   	}
>   
> -	sleep(1);
> +	/* Long, but not too long to anger preemption disable checks */
> +	usleep(50 * 1000); /* 50 ms, typical preempt reset is 150+ms */

Was the point of this sleep two-fold: 1) allow spinner to start (use 
polling spinner?) and allow forked children to submit (use pipe sync?)?

But okay as a quick fix.

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

>   
>   	/* Check for invalidly completing the task early */
>   	igt_assert(fence_busy(spin->out_fence));
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps
@ 2019-11-13 11:06       ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-13 11:06 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2019-11-13 10:54:58)
> 
> On 08/11/2019 14:22, Chris Wilson wrote:
> > The kernel is now enforcing that clients are not allowed to block higher
> > priority contexts from accessing the GPU; one is no longer allowed to
> > sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short
> > enough not to anger the preempt-off checks while long enough for any
> > ordinary GPU work to complete.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >   tests/i915/gem_exec_fence.c | 3 ++-
> >   1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> > index 4e8bdd7b3..002120bf3 100644
> > --- a/tests/i915/gem_exec_fence.c
> > +++ b/tests/i915/gem_exec_fence.c
> > @@ -348,7 +348,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
> >               i++;
> >       }
> >   
> > -     sleep(1);
> > +     /* Long, but not too long to anger preemption disable checks */
> > +     usleep(50 * 1000); /* 50 ms, typical preempt reset is 150+ms */
> 
> Was the point of this sleep two-fold: 1) allow spinner to start (use 
> polling spinner?) and allow forked children to submit (use pipe sync?)?

It was 3: wait long enough so we could be reasonably sure that the
children were indeed waiting and given the opportunity would not run
ahead of the parent.

This is a very loose, runs anywhere test. Revised variants are in
gem_exec_scheduler, which I like to think are a bit more precise.
Although I think the general test concept of "encouraging the children to
run first" could do with a little more exploration, as therein are where
the bugs lie.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps
@ 2019-11-13 11:06       ` Chris Wilson
  0 siblings, 0 replies; 16+ messages in thread
From: Chris Wilson @ 2019-11-13 11:06 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2019-11-13 10:54:58)
> 
> On 08/11/2019 14:22, Chris Wilson wrote:
> > The kernel is now enforcing that clients are not allowed to block higher
> > priority contexts from accessing the GPU; one is no longer allowed to
> > sleep for a second hogging the GPU. Reduce the sleep down to 50ms, short
> > enough not to anger the preempt-off checks while long enough for any
> > ordinary GPU work to complete.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >   tests/i915/gem_exec_fence.c | 3 ++-
> >   1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
> > index 4e8bdd7b3..002120bf3 100644
> > --- a/tests/i915/gem_exec_fence.c
> > +++ b/tests/i915/gem_exec_fence.c
> > @@ -348,7 +348,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
> >               i++;
> >       }
> >   
> > -     sleep(1);
> > +     /* Long, but not too long to anger preemption disable checks */
> > +     usleep(50 * 1000); /* 50 ms, typical preempt reset is 150+ms */
> 
> Was the point of this sleep two-fold: 1) allow spinner to start (use 
> polling spinner?) and allow forked children to submit (use pipe sync?)?

It was 3: wait long enough so we could be reasonably sure that the
children were indeed waiting and given the opportunity would not run
ahead of the parent.

This is a very loose, runs anywhere test. Revised variants are in
gem_exec_scheduler, which I like to think are a bit more precise.
Although I think the general test concept of "encouraging the children to
run first" could do with a little more exploration, as therein are where
the bugs lie.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2019-11-13 11:07 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-08 14:22 [PATCH i-g-t 1/3] i915/gem_exec_fence: KMS master is not required Chris Wilson
2019-11-08 14:22 ` [Intel-gfx] " Chris Wilson
2019-11-08 14:22 ` [PATCH i-g-t 2/3] i915/gem_exec_fence: Allow GPU resets during hang checks Chris Wilson
2019-11-08 14:22   ` [Intel-gfx] " Chris Wilson
2019-11-13 10:51   ` Tvrtko Ursulin
2019-11-13 10:51     ` [Intel-gfx] " Tvrtko Ursulin
2019-11-08 14:22 ` [PATCH i-g-t 3/3] i915/gem_exec_fence: Avoid long preempt-off sleeps Chris Wilson
2019-11-08 14:22   ` [Intel-gfx] " Chris Wilson
2019-11-13 10:54   ` Tvrtko Ursulin
2019-11-13 10:54     ` [Intel-gfx] " Tvrtko Ursulin
2019-11-13 11:06     ` Chris Wilson
2019-11-13 11:06       ` [Intel-gfx] " Chris Wilson
2019-11-08 15:07 ` ✗ Fi.CI.BAT: failure for series starting with [1/3] i915/gem_exec_fence: KMS master is not required Patchwork
2019-11-08 15:07   ` [Intel-gfx] " Patchwork
2019-11-13 10:47 ` [PATCH i-g-t 1/3] " Tvrtko Ursulin
2019-11-13 10:47   ` [Intel-gfx] " Tvrtko Ursulin

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.