From: Robin Murphy <robin.murphy@arm.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: will@kernel.org, iommu@lists.linux-foundation.org,
linux-kernel@vger.kernel.org, hch@lst.de, john.garry@huawei.com
Subject: Re: [PATCH v2] iommu/dma: Add config for PCI SAC address trick
Date: Thu, 23 Jun 2022 12:41:00 +0100 [thread overview]
Message-ID: <653fba02-7eef-5f0d-66dd-7599af84db86@arm.com> (raw)
In-Reply-To: <YrRPfhXvdPo0Y6Cx@8bytes.org>
On 2022-06-23 12:33, Joerg Roedel wrote:
> On Wed, Jun 22, 2022 at 02:12:39PM +0100, Robin Murphy wrote:
>> Thanks for your bravery!
>
> It already starts, with that patch I am getting:
>
> xhci_hcd 0000:02:00.0: AMD-Vi: Event logged [IO_PAGE_FAULT domain=0x000f address=0xff00ffffffefe000 flags=0x0000]
>
> In my kernel log. The device is an AMD XHCI controller and seems to
> funciton normally after boot. The message disappears with
> iommu.forcedac=0.
>
> Need to look more into that...
Given how amd_iommu_domain_alloc() sets the domain aperture, presumably
the DMA address allocated was 0xffffffffffefe000? Odd that it gets bits
punched out in the middle rather than simply truncated off the top as I
would have expected :/
Robin.
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: iommu@lists.linux-foundation.org, will@kernel.org,
linux-kernel@vger.kernel.org, hch@lst.de
Subject: Re: [PATCH v2] iommu/dma: Add config for PCI SAC address trick
Date: Thu, 23 Jun 2022 12:41:00 +0100 [thread overview]
Message-ID: <653fba02-7eef-5f0d-66dd-7599af84db86@arm.com> (raw)
In-Reply-To: <YrRPfhXvdPo0Y6Cx@8bytes.org>
On 2022-06-23 12:33, Joerg Roedel wrote:
> On Wed, Jun 22, 2022 at 02:12:39PM +0100, Robin Murphy wrote:
>> Thanks for your bravery!
>
> It already starts, with that patch I am getting:
>
> xhci_hcd 0000:02:00.0: AMD-Vi: Event logged [IO_PAGE_FAULT domain=0x000f address=0xff00ffffffefe000 flags=0x0000]
>
> In my kernel log. The device is an AMD XHCI controller and seems to
> funciton normally after boot. The message disappears with
> iommu.forcedac=0.
>
> Need to look more into that...
Given how amd_iommu_domain_alloc() sets the domain aperture, presumably
the DMA address allocated was 0xffffffffffefe000? Odd that it gets bits
punched out in the middle rather than simply truncated off the top as I
would have expected :/
Robin.
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next prev parent reply other threads:[~2022-06-23 11:41 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-09 15:12 [PATCH v2] iommu/dma: Add config for PCI SAC address trick Robin Murphy
2022-06-09 15:12 ` Robin Murphy
2022-06-09 18:09 ` John Garry via iommu
2022-06-09 18:09 ` John Garry
2022-06-10 6:01 ` Christoph Hellwig
2022-06-10 6:01 ` Christoph Hellwig
2022-06-22 12:59 ` Joerg Roedel
2022-06-22 12:59 ` Joerg Roedel
2022-06-22 13:12 ` Robin Murphy
2022-06-22 13:12 ` Robin Murphy
2022-06-23 11:33 ` Joerg Roedel
2022-06-23 11:33 ` Joerg Roedel
2022-06-23 11:41 ` Robin Murphy [this message]
2022-06-23 11:41 ` Robin Murphy
2022-06-24 13:28 ` Joerg Roedel
2022-06-24 13:28 ` Joerg Roedel
2022-06-24 14:49 ` Robin Murphy
2022-06-24 14:49 ` Robin Murphy
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