* [PATCH] ARM: dts: stm32: Add LPtimer support to stm32mp157c
@ 2018-04-18 7:43 ` Fabrice Gasnier
0 siblings, 0 replies; 6+ messages in thread
From: Fabrice Gasnier @ 2018-04-18 7:43 UTC (permalink / raw)
To: alexandre.torgue, robh+dt
Cc: mcoquelin.stm32, mark.rutland, linux-arm-kernel, devicetree,
linux-kernel, fabrice.gasnier
Add LPtimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 108 +++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc..7e6301c 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -104,6 +104,33 @@
interrupt-parent = <&intc>;
ranges;
+ lptimer1: timer@40009000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x40009000 0x400>;
+ clocks = <&rcc LPTIM1_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger@0 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <0>;
+ status = "disabled";
+ };
+
+ counter {
+ compatible = "st,stm32-lptimer-counter";
+ status = "disabled";
+ };
+ };
+
usart2: serial@4000e000 {
compatible = "st,stm32h7-uart";
reg = <0x4000e000 0x400>;
@@ -167,6 +194,87 @@
#reset-cells = <1>;
};
+ lptimer2: timer@50021000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50021000 0x400>;
+ clocks = <&rcc LPTIM2_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger@1 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <1>;
+ status = "disabled";
+ };
+
+ counter {
+ compatible = "st,stm32-lptimer-counter";
+ status = "disabled";
+ };
+ };
+
+ lptimer3: timer@50022000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50022000 0x400>;
+ clocks = <&rcc LPTIM3_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger@2 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <2>;
+ status = "disabled";
+ };
+ };
+
+ lptimer4: timer@50023000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50023000 0x400>;
+ clocks = <&rcc LPTIM4_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ };
+
+ lptimer5: timer@50024000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50024000 0x400>;
+ clocks = <&rcc LPTIM5_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ };
+
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] ARM: dts: stm32: Add LPtimer support to stm32mp157c
@ 2018-04-18 7:43 ` Fabrice Gasnier
0 siblings, 0 replies; 6+ messages in thread
From: Fabrice Gasnier @ 2018-04-18 7:43 UTC (permalink / raw)
To: alexandre.torgue, robh+dt
Cc: mcoquelin.stm32, mark.rutland, linux-arm-kernel, devicetree,
linux-kernel, fabrice.gasnier
Add LPtimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 108 +++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc..7e6301c 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -104,6 +104,33 @@
interrupt-parent = <&intc>;
ranges;
+ lptimer1: timer@40009000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x40009000 0x400>;
+ clocks = <&rcc LPTIM1_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger@0 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <0>;
+ status = "disabled";
+ };
+
+ counter {
+ compatible = "st,stm32-lptimer-counter";
+ status = "disabled";
+ };
+ };
+
usart2: serial@4000e000 {
compatible = "st,stm32h7-uart";
reg = <0x4000e000 0x400>;
@@ -167,6 +194,87 @@
#reset-cells = <1>;
};
+ lptimer2: timer@50021000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50021000 0x400>;
+ clocks = <&rcc LPTIM2_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger@1 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <1>;
+ status = "disabled";
+ };
+
+ counter {
+ compatible = "st,stm32-lptimer-counter";
+ status = "disabled";
+ };
+ };
+
+ lptimer3: timer@50022000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50022000 0x400>;
+ clocks = <&rcc LPTIM3_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger@2 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <2>;
+ status = "disabled";
+ };
+ };
+
+ lptimer4: timer@50023000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50023000 0x400>;
+ clocks = <&rcc LPTIM4_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ };
+
+ lptimer5: timer@50024000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50024000 0x400>;
+ clocks = <&rcc LPTIM5_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ };
+
usart1: serial@5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH] ARM: dts: stm32: Add LPtimer support to stm32mp157c
@ 2018-04-18 7:43 ` Fabrice Gasnier
0 siblings, 0 replies; 6+ messages in thread
From: Fabrice Gasnier @ 2018-04-18 7:43 UTC (permalink / raw)
To: linux-arm-kernel
Add LPtimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
arch/arm/boot/dts/stm32mp157c.dtsi | 108 +++++++++++++++++++++++++++++++++++++
1 file changed, 108 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc..7e6301c 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -104,6 +104,33 @@
interrupt-parent = <&intc>;
ranges;
+ lptimer1: timer at 40009000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x40009000 0x400>;
+ clocks = <&rcc LPTIM1_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger at 0 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <0>;
+ status = "disabled";
+ };
+
+ counter {
+ compatible = "st,stm32-lptimer-counter";
+ status = "disabled";
+ };
+ };
+
usart2: serial at 4000e000 {
compatible = "st,stm32h7-uart";
reg = <0x4000e000 0x400>;
@@ -167,6 +194,87 @@
#reset-cells = <1>;
};
+ lptimer2: timer at 50021000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50021000 0x400>;
+ clocks = <&rcc LPTIM2_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger at 1 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <1>;
+ status = "disabled";
+ };
+
+ counter {
+ compatible = "st,stm32-lptimer-counter";
+ status = "disabled";
+ };
+ };
+
+ lptimer3: timer at 50022000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50022000 0x400>;
+ clocks = <&rcc LPTIM3_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ trigger at 2 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <2>;
+ status = "disabled";
+ };
+ };
+
+ lptimer4: timer at 50023000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50023000 0x400>;
+ clocks = <&rcc LPTIM4_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ };
+
+ lptimer5: timer at 50024000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-lptimer";
+ reg = <0x50024000 0x400>;
+ clocks = <&rcc LPTIM5_K>;
+ clock-names = "mux";
+ status = "disabled";
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+ };
+
usart1: serial at 5c000000 {
compatible = "st,stm32h7-uart";
reg = <0x5c000000 0x400>;
--
1.9.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: dts: stm32: Add LPtimer support to stm32mp157c
2018-04-18 7:43 ` Fabrice Gasnier
(?)
@ 2018-05-02 12:09 ` Alexandre Torgue
-1 siblings, 0 replies; 6+ messages in thread
From: Alexandre Torgue @ 2018-05-02 12:09 UTC (permalink / raw)
To: Fabrice Gasnier, robh+dt
Cc: mcoquelin.stm32, mark.rutland, linux-arm-kernel, devicetree,
linux-kernel
Hi Fabrice
On 04/18/2018 09:43 AM, Fabrice Gasnier wrote:
> Add LPtimer definitions, depending on features they provide:
> - lptimer1 & 2 can act as PWM, trigger and encoder/counter
> - lptimer3 can act as PWM and trigger
> - lptimer4 & 5 can act as PWM
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> ---
Applied on stm32-next.
I fixed out DTC warning:
/soc/timer@50023000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
/soc/timer@50024000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
Thanks.
Alex
> arch/arm/boot/dts/stm32mp157c.dtsi | 108 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 108 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
> index bc3eddc..7e6301c 100644
> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
> @@ -104,6 +104,33 @@
> interrupt-parent = <&intc>;
> ranges;
>
> + lptimer1: timer@40009000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x40009000 0x400>;
> + clocks = <&rcc LPTIM1_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger@0 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <0>;
> + status = "disabled";
> + };
> +
> + counter {
> + compatible = "st,stm32-lptimer-counter";
> + status = "disabled";
> + };
> + };
> +
> usart2: serial@4000e000 {
> compatible = "st,stm32h7-uart";
> reg = <0x4000e000 0x400>;
> @@ -167,6 +194,87 @@
> #reset-cells = <1>;
> };
>
> + lptimer2: timer@50021000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50021000 0x400>;
> + clocks = <&rcc LPTIM2_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger@1 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <1>;
> + status = "disabled";
> + };
> +
> + counter {
> + compatible = "st,stm32-lptimer-counter";
> + status = "disabled";
> + };
> + };
> +
> + lptimer3: timer@50022000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50022000 0x400>;
> + clocks = <&rcc LPTIM3_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger@2 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <2>;
> + status = "disabled";
> + };
> + };
> +
> + lptimer4: timer@50023000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50023000 0x400>;
> + clocks = <&rcc LPTIM4_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> + };
> +
> + lptimer5: timer@50024000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50024000 0x400>;
> + clocks = <&rcc LPTIM5_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> + };
> +
> usart1: serial@5c000000 {
> compatible = "st,stm32h7-uart";
> reg = <0x5c000000 0x400>;
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] ARM: dts: stm32: Add LPtimer support to stm32mp157c
@ 2018-05-02 12:09 ` Alexandre Torgue
0 siblings, 0 replies; 6+ messages in thread
From: Alexandre Torgue @ 2018-05-02 12:09 UTC (permalink / raw)
To: Fabrice Gasnier, robh+dt
Cc: mcoquelin.stm32, mark.rutland, linux-arm-kernel, devicetree,
linux-kernel
Hi Fabrice
On 04/18/2018 09:43 AM, Fabrice Gasnier wrote:
> Add LPtimer definitions, depending on features they provide:
> - lptimer1 & 2 can act as PWM, trigger and encoder/counter
> - lptimer3 can act as PWM and trigger
> - lptimer4 & 5 can act as PWM
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> ---
Applied on stm32-next.
I fixed out DTC warning:
/soc/timer@50023000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
/soc/timer@50024000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
Thanks.
Alex
> arch/arm/boot/dts/stm32mp157c.dtsi | 108 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 108 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
> index bc3eddc..7e6301c 100644
> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
> @@ -104,6 +104,33 @@
> interrupt-parent = <&intc>;
> ranges;
>
> + lptimer1: timer@40009000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x40009000 0x400>;
> + clocks = <&rcc LPTIM1_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger@0 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <0>;
> + status = "disabled";
> + };
> +
> + counter {
> + compatible = "st,stm32-lptimer-counter";
> + status = "disabled";
> + };
> + };
> +
> usart2: serial@4000e000 {
> compatible = "st,stm32h7-uart";
> reg = <0x4000e000 0x400>;
> @@ -167,6 +194,87 @@
> #reset-cells = <1>;
> };
>
> + lptimer2: timer@50021000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50021000 0x400>;
> + clocks = <&rcc LPTIM2_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger@1 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <1>;
> + status = "disabled";
> + };
> +
> + counter {
> + compatible = "st,stm32-lptimer-counter";
> + status = "disabled";
> + };
> + };
> +
> + lptimer3: timer@50022000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50022000 0x400>;
> + clocks = <&rcc LPTIM3_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger@2 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <2>;
> + status = "disabled";
> + };
> + };
> +
> + lptimer4: timer@50023000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50023000 0x400>;
> + clocks = <&rcc LPTIM4_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> + };
> +
> + lptimer5: timer@50024000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50024000 0x400>;
> + clocks = <&rcc LPTIM5_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> + };
> +
> usart1: serial@5c000000 {
> compatible = "st,stm32h7-uart";
> reg = <0x5c000000 0x400>;
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH] ARM: dts: stm32: Add LPtimer support to stm32mp157c
@ 2018-05-02 12:09 ` Alexandre Torgue
0 siblings, 0 replies; 6+ messages in thread
From: Alexandre Torgue @ 2018-05-02 12:09 UTC (permalink / raw)
To: linux-arm-kernel
Hi Fabrice
On 04/18/2018 09:43 AM, Fabrice Gasnier wrote:
> Add LPtimer definitions, depending on features they provide:
> - lptimer1 & 2 can act as PWM, trigger and encoder/counter
> - lptimer3 can act as PWM and trigger
> - lptimer4 & 5 can act as PWM
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> ---
Applied on stm32-next.
I fixed out DTC warning:
/soc/timer at 50023000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
/soc/timer at 50024000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
Thanks.
Alex
> arch/arm/boot/dts/stm32mp157c.dtsi | 108 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 108 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
> index bc3eddc..7e6301c 100644
> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
> @@ -104,6 +104,33 @@
> interrupt-parent = <&intc>;
> ranges;
>
> + lptimer1: timer at 40009000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x40009000 0x400>;
> + clocks = <&rcc LPTIM1_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger at 0 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <0>;
> + status = "disabled";
> + };
> +
> + counter {
> + compatible = "st,stm32-lptimer-counter";
> + status = "disabled";
> + };
> + };
> +
> usart2: serial at 4000e000 {
> compatible = "st,stm32h7-uart";
> reg = <0x4000e000 0x400>;
> @@ -167,6 +194,87 @@
> #reset-cells = <1>;
> };
>
> + lptimer2: timer at 50021000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50021000 0x400>;
> + clocks = <&rcc LPTIM2_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger at 1 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <1>;
> + status = "disabled";
> + };
> +
> + counter {
> + compatible = "st,stm32-lptimer-counter";
> + status = "disabled";
> + };
> + };
> +
> + lptimer3: timer at 50022000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50022000 0x400>;
> + clocks = <&rcc LPTIM3_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> +
> + trigger at 2 {
> + compatible = "st,stm32-lptimer-trigger";
> + reg = <2>;
> + status = "disabled";
> + };
> + };
> +
> + lptimer4: timer at 50023000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50023000 0x400>;
> + clocks = <&rcc LPTIM4_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> + };
> +
> + lptimer5: timer at 50024000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-lptimer";
> + reg = <0x50024000 0x400>;
> + clocks = <&rcc LPTIM5_K>;
> + clock-names = "mux";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> + status = "disabled";
> + };
> + };
> +
> usart1: serial at 5c000000 {
> compatible = "st,stm32h7-uart";
> reg = <0x5c000000 0x400>;
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-05-02 12:10 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-04-18 7:43 [PATCH] ARM: dts: stm32: Add LPtimer support to stm32mp157c Fabrice Gasnier
2018-04-18 7:43 ` Fabrice Gasnier
2018-04-18 7:43 ` Fabrice Gasnier
2018-05-02 12:09 ` Alexandre Torgue
2018-05-02 12:09 ` Alexandre Torgue
2018-05-02 12:09 ` Alexandre Torgue
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