* [PATCH] arm64: dts: stratix10: fix SPI settings
@ 2017-12-20 21:44 ` thor.thayer at linux.intel.com
0 siblings, 0 replies; 3+ messages in thread
From: thor.thayer-VuQAYsv1563Yd54FQh9/CA @ 2017-12-20 21:44 UTC (permalink / raw)
To: dinguyen-DgEjT+Ai2ygdnm+yROfE0A, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, catalin.marinas-5wv7dgnIgG8,
will.deacon-5wv7dgnIgG8
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Thor Thayer
From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
Correct the SPI Master node settings.
Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 7c9bdc7ab50b..367bc00be802 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -248,7 +248,9 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0xffda4000 0x1000>;
- interrupts = <0 101 4>;
+ interrupts = <0 99 4>;
+ resets = <&rst SPIM0_RESET>;
+ reg-io-width = <4>;
num-chipselect = <4>;
bus-num = <0>;
status = "disabled";
@@ -259,7 +261,9 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0xffda5000 0x1000>;
- interrupts = <0 102 4>;
+ interrupts = <0 100 4>;
+ resets = <&rst SPIM1_RESET>;
+ reg-io-width = <4>;
num-chipselect = <4>;
bus-num = <0>;
status = "disabled";
--
2.7.4
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* [PATCH] arm64: dts: stratix10: fix SPI settings
@ 2017-12-20 21:44 ` thor.thayer at linux.intel.com
0 siblings, 0 replies; 3+ messages in thread
From: thor.thayer at linux.intel.com @ 2017-12-20 21:44 UTC (permalink / raw)
To: linux-arm-kernel
From: Thor Thayer <thor.thayer@linux.intel.com>
Correct the SPI Master node settings.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index 7c9bdc7ab50b..367bc00be802 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -248,7 +248,9 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0xffda4000 0x1000>;
- interrupts = <0 101 4>;
+ interrupts = <0 99 4>;
+ resets = <&rst SPIM0_RESET>;
+ reg-io-width = <4>;
num-chipselect = <4>;
bus-num = <0>;
status = "disabled";
@@ -259,7 +261,9 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0xffda5000 0x1000>;
- interrupts = <0 102 4>;
+ interrupts = <0 100 4>;
+ resets = <&rst SPIM1_RESET>;
+ reg-io-width = <4>;
num-chipselect = <4>;
bus-num = <0>;
status = "disabled";
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] arm64: dts: stratix10: fix SPI settings
[not found] ` <1513806251-20273-1-git-send-email-thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
@ 2018-01-16 19:08 ` Dinh Nguyen
0 siblings, 0 replies; 3+ messages in thread
From: Dinh Nguyen @ 2018-01-16 19:08 UTC (permalink / raw)
To: thor.thayer-VuQAYsv1563Yd54FQh9/CA,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
catalin.marinas-5wv7dgnIgG8, will.deacon-5wv7dgnIgG8
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 12/20/2017 03:44 PM, thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org wrote:
> From: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
>
> Correct the SPI Master node settings.
>
> Signed-off-by: Thor Thayer <thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> ---
> arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
Applied, thanks!
Dinh
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2017-12-20 21:44 [PATCH] arm64: dts: stratix10: fix SPI settings thor.thayer-VuQAYsv1563Yd54FQh9/CA
2017-12-20 21:44 ` thor.thayer at linux.intel.com
[not found] ` <1513806251-20273-1-git-send-email-thor.thayer-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2018-01-16 19:08 ` Dinh Nguyen
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