From: "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "linux-fbdev@vger.kernel.org" <linux-fbdev@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary Data Packet)
Date: Sun, 09 Feb 2020 03:38:45 +0000 [thread overview]
Message-ID: <661f4ffafe7bd829ecd80e83e3e908b4b1a2d3c2.camel@intel.com> (raw)
In-Reply-To: <E7C9878FBA1C6D42A1CA3F62AEB6945F823DD00C@BGSMSX104.gar.corp.intel.com>
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WARNING: multiple messages have this Message-ID (diff)
From: "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "linux-fbdev@vger.kernel.org" <linux-fbdev@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary Data Packet)
Date: Sun, 9 Feb 2020 03:38:45 +0000 [thread overview]
Message-ID: <661f4ffafe7bd829ecd80e83e3e908b4b1a2d3c2.camel@intel.com> (raw)
In-Reply-To: <E7C9878FBA1C6D42A1CA3F62AEB6945F823DD00C@BGSMSX104.gar.corp.intel.com>
On Wed, 2020-02-05 at 21:59 +0530, Shankar, Uma wrote:
> > -----Original Message-----
> > From: dri-devel <dri-devel-bounces@lists.freedesktop.org> On Behalf
> > Of Gwan-
> > gyeong Mun
> > Sent: Tuesday, February 4, 2020 4:50 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org
> > Subject: [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary
> > Data Packet)
>
> Drop the content in bracket.
>
> > It adds code to read the DP SDPs from the video DIP and unpack them
> > into the crtc
> > state.
> >
> > It adds routines that read out DP VSC SDP and DP HDR Metadata
> > Infoframe SDP In
> > order to unpack DP VSC SDP, it adds intel_dp_vsc_sdp_unpack()
> > function.
> > It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and
> > [Table 2-117: VSC
> > SDP Payload for DB16 through DB18]
> >
> > In order to unpack DP HDR Metadata Infoframe SDP, it adds
> > intel_dp_hdr_metadata_infoframe_sdp_unpack(). And it follows DP
> > 1.4a spec.
> > ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126:
> > INFOFRAME
> > SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G
> > spec. [Table-42
> > Dynamic Range and Mastering InfoFrame].
> >
> > A nameing rule and style of intel_read_dp_sdp() function references
>
> Typo in naming.
>
> > intel_read_infoframe() function of intel_hdmi.c
> >
> > v2: Minor style fix
> > v3: Replace a structure name to drm_dp_vsc_sdp from
> > intel_dp_vsc_sdp
> >
> > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 170
> > ++++++++++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +
> > 2 files changed, 173 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index dd7e5588001e..d4ece0a824c0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4925,6 +4925,176 @@ void intel_dp_set_infoframes(struct
> > intel_encoder
> > *encoder,
> > intel_write_dp_sdp(encoder, crtc_state,
> > HDMI_PACKET_TYPE_GAMUT_METADATA); }
> >
> > +static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
> > + const void *buffer, size_t size) {
> > + const struct dp_sdp *sdp = buffer;
> > +
> > + if (size < sizeof(struct dp_sdp))
> > + return -EINVAL;
> > +
> > + memset(vsc, 0, size);
> > +
> > + if (sdp->sdp_header.HB0 != 0)
> > + return -EINVAL;
> > +
> > + if (sdp->sdp_header.HB1 != DP_SDP_VSC)
> > + return -EINVAL;
> > + vsc->sdp_type = sdp->sdp_header.HB1;
> > +
> > + if (sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) {
> > + vsc->revision = sdp->sdp_header.HB2;
> > + vsc->length = sdp->sdp_header.HB3;
> > + } else if (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 ==
> > 0xe) {
> > + vsc->revision = sdp->sdp_header.HB2;
> > + vsc->length = sdp->sdp_header.HB3;
> > + } else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 ==
> > 0x13) {
> > + vsc->revision = sdp->sdp_header.HB2;
> > + vsc->length = sdp->sdp_header.HB3;
>
> The above 2 lines can be done unconditionally, may be combine the if
> checks.
>
> > + vsc->colorspace = (sdp->db[16] >> 4) & 0xf;
> > + vsc->colorimetry = sdp->db[16] & 0xf;
> > + vsc->dynamic_range = (sdp->db[17] >> 7) & 0x1;
> > +
> > + switch (sdp->db[17] & 0x7) {
> > + case 0x1:
> > + vsc->bpc = 8;
> > + break;
> > + case 0x2:
> > + vsc->bpc = 10;
> > + break;
> > + case 0x3:
> > + vsc->bpc = 12;
> > + break;
> > + case 0x4:
> > + vsc->bpc = 16;
> > + break;
> > + default:
> > + MISSING_CASE(sdp->db[17] & 0x7);
>
> Handle 6bpc case as well.
>
Yes, I'll update everything that you commented.
> > + return -EINVAL;
> > + }
> > +
> > + vsc->content_type = sdp->db[18] & 0x7;
> > + } else {
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +intel_dp_hdr_metadata_infoframe_sdp_unpack(struct
> > hdmi_drm_infoframe
> > *drm_infoframe,
> > + const void *buffer, size_t
> > size) {
> > + int ret;
> > +
> > + const struct dp_sdp *sdp = buffer;
> > +
> > + if (size < sizeof(struct dp_sdp))
> > + return -EINVAL;
> > +
> > + if (sdp->sdp_header.HB0 != 0)
> > + return -EINVAL;
> > +
> > + if (sdp->sdp_header.HB1 != HDMI_INFOFRAME_TYPE_DRM)
> > + return -EINVAL;
> > +
> > + /*
> > + * Least Significant Eight Bits of (Data Byte Count – 1)
> > + * 1Dh (i.e., Data Byte Count = 30 bytes).
> > + */
> > + if (sdp->sdp_header.HB2 != 0x1D)
> > + return -EINVAL;
> > +
> > + /* Most Significant Two Bits of (Data Byte Count – 1), Clear to
> > 00b. */
> > + if ((sdp->sdp_header.HB3 & 0x3) != 0)
> > + return -EINVAL;
> > +
> > + /* INFOFRAME SDP Version Number */
> > + if (((sdp->sdp_header.HB3 >> 2) & 0x3f) != 0x13)
> > + return -EINVAL;
> > +
> > + /* CTA Header Byte 2 (INFOFRAME Version Number) */
> > + if (sdp->db[0] != 1)
> > + return -EINVAL;
> > +
> > + /* CTA Header Byte 3 (Length of INFOFRAME):
> > HDMI_DRM_INFOFRAME_SIZE */
> > + if (sdp->db[1] != HDMI_DRM_INFOFRAME_SIZE)
> > + return -EINVAL;
> > +
> > + ret = hdmi_drm_infoframe_unpack_only(drm_infoframe, &sdp-
> > >db[2],
> > + HDMI_DRM_INFOFRAME_SIZE);
> > +
> > + return ret;
> > +}
> > +
> > +static void intel_read_dp_vsc_sdp(struct intel_encoder *encoder,
> > + struct intel_crtc_state *crtc_state,
> > + struct drm_dp_vsc_sdp *vsc)
> > +{
> > + struct intel_digital_port *intel_dig_port =
> > enc_to_dig_port(encoder);
> > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > + unsigned int type = DP_SDP_VSC;
> > + struct dp_sdp sdp = {};
> > + int ret;
> > +
> > + /* When PSR is enabled, VSC SDP is handled by PSR routine */
> > + if (intel_psr_enabled(intel_dp))
> > + return;
> > +
> > + if ((crtc_state->infoframes.enable &
> > + intel_hdmi_infoframe_enable(type)) == 0)
> > + return;
> > +
> > + intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
> > +sizeof(sdp));
> > +
> > + ret = intel_dp_vsc_sdp_unpack(vsc, &sdp, sizeof(sdp));
> > +
> > + if (ret)
> > + DRM_DEBUG_KMS("Failed to unpack DP VSC SDP\n"); }
> > +
> > +static void intel_read_dp_hdr_metadata_infoframe_sdp(struct
> > intel_encoder
> > *encoder,
> > + struct
> > intel_crtc_state
> > *crtc_state,
> > + struct
> > hdmi_drm_infoframe
> > *drm_infoframe) {
> > + struct intel_digital_port *intel_dig_port =
> > enc_to_dig_port(encoder);
> > + unsigned int type = HDMI_PACKET_TYPE_GAMUT_METADATA;
> > + struct dp_sdp sdp = {};
> > + int ret;
> > +
> > + if ((crtc_state->infoframes.enable &
> > + intel_hdmi_infoframe_enable(type)) == 0)
> > + return;
> > +
> > + intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
> > + sizeof(sdp));
> > +
> > + ret = intel_dp_hdr_metadata_infoframe_sdp_unpack(drm_infoframe,
> > &sdp,
> > + sizeof(sdp));
> > +
> > + if (ret)
> > + DRM_DEBUG_KMS("Failed to unpack DP HDR Metadata
> > Infoframe
> > SDP\n"); }
> > +
> > +void intel_read_dp_sdp(struct intel_encoder *encoder,
> > + struct intel_crtc_state *crtc_state,
> > + unsigned int type)
> > +{
> > + switch (type) {
> > + case DP_SDP_VSC:
> > + intel_read_dp_vsc_sdp(encoder, crtc_state,
> > + &crtc_state->infoframes.vsc);
> > + break;
> > + case HDMI_PACKET_TYPE_GAMUT_METADATA:
> > + intel_read_dp_hdr_metadata_infoframe_sdp(encoder,
> > crtc_state,
> > + &crtc_state-
> > > infoframes.drm.drm);
> > + break;
> > + default:
> > + MISSING_CASE(type);
> > + break;
> > + }
> > +}
> > +
> > static void
> > intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
> > const struct intel_crtc_state *crtc_state, diff
> > --git
> > a/drivers/gpu/drm/i915/display/intel_dp.h
> > b/drivers/gpu/drm/i915/display/intel_dp.h
> > index 0dc09a463ee1..e8f9ba962d09 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -119,6 +119,9 @@ void intel_dp_hdr_metadata_enable(struct
> > intel_dp
> > *intel_dp, void intel_dp_set_infoframes(struct intel_encoder
> > *encoder, bool
> > enable,
> > const struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state
> > *conn_state);
> > +void intel_read_dp_sdp(struct intel_encoder *encoder,
> > + struct intel_crtc_state *crtc_state,
> > + unsigned int type);
> > bool intel_digital_port_connected(struct intel_encoder *encoder);
> >
> > static inline unsigned int intel_dp_unused_lane_mask(int
> > lane_count)
> > --
> > 2.24.1
> >
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: "Mun, Gwan-gyeong" <gwan-gyeong.mun@intel.com>
To: "Shankar, Uma" <uma.shankar@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "linux-fbdev@vger.kernel.org" <linux-fbdev@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary Data Packet)
Date: Sun, 9 Feb 2020 03:38:45 +0000 [thread overview]
Message-ID: <661f4ffafe7bd829ecd80e83e3e908b4b1a2d3c2.camel@intel.com> (raw)
In-Reply-To: <E7C9878FBA1C6D42A1CA3F62AEB6945F823DD00C@BGSMSX104.gar.corp.intel.com>
On Wed, 2020-02-05 at 21:59 +0530, Shankar, Uma wrote:
> > -----Original Message-----
> > From: dri-devel <dri-devel-bounces@lists.freedesktop.org> On Behalf
> > Of Gwan-
> > gyeong Mun
> > Sent: Tuesday, February 4, 2020 4:50 AM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: linux-fbdev@vger.kernel.org; dri-devel@lists.freedesktop.org
> > Subject: [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary
> > Data Packet)
>
> Drop the content in bracket.
>
> > It adds code to read the DP SDPs from the video DIP and unpack them
> > into the crtc
> > state.
> >
> > It adds routines that read out DP VSC SDP and DP HDR Metadata
> > Infoframe SDP In
> > order to unpack DP VSC SDP, it adds intel_dp_vsc_sdp_unpack()
> > function.
> > It follows DP 1.4a spec. [Table 2-116: VSC SDP Header Bytes] and
> > [Table 2-117: VSC
> > SDP Payload for DB16 through DB18]
> >
> > In order to unpack DP HDR Metadata Infoframe SDP, it adds
> > intel_dp_hdr_metadata_infoframe_sdp_unpack(). And it follows DP
> > 1.4a spec.
> > ([Table 2-125: INFOFRAME SDP v1.2 Header Bytes] and [Table 2-126:
> > INFOFRAME
> > SDP v1.2 Payload Data Bytes - DB0 through DB31]) and CTA-861-G
> > spec. [Table-42
> > Dynamic Range and Mastering InfoFrame].
> >
> > A nameing rule and style of intel_read_dp_sdp() function references
>
> Typo in naming.
>
> > intel_read_infoframe() function of intel_hdmi.c
> >
> > v2: Minor style fix
> > v3: Replace a structure name to drm_dp_vsc_sdp from
> > intel_dp_vsc_sdp
> >
> > Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 170
> > ++++++++++++++++++++++++
> > drivers/gpu/drm/i915/display/intel_dp.h | 3 +
> > 2 files changed, 173 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index dd7e5588001e..d4ece0a824c0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -4925,6 +4925,176 @@ void intel_dp_set_infoframes(struct
> > intel_encoder
> > *encoder,
> > intel_write_dp_sdp(encoder, crtc_state,
> > HDMI_PACKET_TYPE_GAMUT_METADATA); }
> >
> > +static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
> > + const void *buffer, size_t size) {
> > + const struct dp_sdp *sdp = buffer;
> > +
> > + if (size < sizeof(struct dp_sdp))
> > + return -EINVAL;
> > +
> > + memset(vsc, 0, size);
> > +
> > + if (sdp->sdp_header.HB0 != 0)
> > + return -EINVAL;
> > +
> > + if (sdp->sdp_header.HB1 != DP_SDP_VSC)
> > + return -EINVAL;
> > + vsc->sdp_type = sdp->sdp_header.HB1;
> > +
> > + if (sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) {
> > + vsc->revision = sdp->sdp_header.HB2;
> > + vsc->length = sdp->sdp_header.HB3;
> > + } else if (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 ==
> > 0xe) {
> > + vsc->revision = sdp->sdp_header.HB2;
> > + vsc->length = sdp->sdp_header.HB3;
> > + } else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 ==
> > 0x13) {
> > + vsc->revision = sdp->sdp_header.HB2;
> > + vsc->length = sdp->sdp_header.HB3;
>
> The above 2 lines can be done unconditionally, may be combine the if
> checks.
>
> > + vsc->colorspace = (sdp->db[16] >> 4) & 0xf;
> > + vsc->colorimetry = sdp->db[16] & 0xf;
> > + vsc->dynamic_range = (sdp->db[17] >> 7) & 0x1;
> > +
> > + switch (sdp->db[17] & 0x7) {
> > + case 0x1:
> > + vsc->bpc = 8;
> > + break;
> > + case 0x2:
> > + vsc->bpc = 10;
> > + break;
> > + case 0x3:
> > + vsc->bpc = 12;
> > + break;
> > + case 0x4:
> > + vsc->bpc = 16;
> > + break;
> > + default:
> > + MISSING_CASE(sdp->db[17] & 0x7);
>
> Handle 6bpc case as well.
>
Yes, I'll update everything that you commented.
> > + return -EINVAL;
> > + }
> > +
> > + vsc->content_type = sdp->db[18] & 0x7;
> > + } else {
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +intel_dp_hdr_metadata_infoframe_sdp_unpack(struct
> > hdmi_drm_infoframe
> > *drm_infoframe,
> > + const void *buffer, size_t
> > size) {
> > + int ret;
> > +
> > + const struct dp_sdp *sdp = buffer;
> > +
> > + if (size < sizeof(struct dp_sdp))
> > + return -EINVAL;
> > +
> > + if (sdp->sdp_header.HB0 != 0)
> > + return -EINVAL;
> > +
> > + if (sdp->sdp_header.HB1 != HDMI_INFOFRAME_TYPE_DRM)
> > + return -EINVAL;
> > +
> > + /*
> > + * Least Significant Eight Bits of (Data Byte Count – 1)
> > + * 1Dh (i.e., Data Byte Count = 30 bytes).
> > + */
> > + if (sdp->sdp_header.HB2 != 0x1D)
> > + return -EINVAL;
> > +
> > + /* Most Significant Two Bits of (Data Byte Count – 1), Clear to
> > 00b. */
> > + if ((sdp->sdp_header.HB3 & 0x3) != 0)
> > + return -EINVAL;
> > +
> > + /* INFOFRAME SDP Version Number */
> > + if (((sdp->sdp_header.HB3 >> 2) & 0x3f) != 0x13)
> > + return -EINVAL;
> > +
> > + /* CTA Header Byte 2 (INFOFRAME Version Number) */
> > + if (sdp->db[0] != 1)
> > + return -EINVAL;
> > +
> > + /* CTA Header Byte 3 (Length of INFOFRAME):
> > HDMI_DRM_INFOFRAME_SIZE */
> > + if (sdp->db[1] != HDMI_DRM_INFOFRAME_SIZE)
> > + return -EINVAL;
> > +
> > + ret = hdmi_drm_infoframe_unpack_only(drm_infoframe, &sdp-
> > >db[2],
> > + HDMI_DRM_INFOFRAME_SIZE);
> > +
> > + return ret;
> > +}
> > +
> > +static void intel_read_dp_vsc_sdp(struct intel_encoder *encoder,
> > + struct intel_crtc_state *crtc_state,
> > + struct drm_dp_vsc_sdp *vsc)
> > +{
> > + struct intel_digital_port *intel_dig_port =
> > enc_to_dig_port(encoder);
> > + struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > + unsigned int type = DP_SDP_VSC;
> > + struct dp_sdp sdp = {};
> > + int ret;
> > +
> > + /* When PSR is enabled, VSC SDP is handled by PSR routine */
> > + if (intel_psr_enabled(intel_dp))
> > + return;
> > +
> > + if ((crtc_state->infoframes.enable &
> > + intel_hdmi_infoframe_enable(type)) == 0)
> > + return;
> > +
> > + intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
> > +sizeof(sdp));
> > +
> > + ret = intel_dp_vsc_sdp_unpack(vsc, &sdp, sizeof(sdp));
> > +
> > + if (ret)
> > + DRM_DEBUG_KMS("Failed to unpack DP VSC SDP\n"); }
> > +
> > +static void intel_read_dp_hdr_metadata_infoframe_sdp(struct
> > intel_encoder
> > *encoder,
> > + struct
> > intel_crtc_state
> > *crtc_state,
> > + struct
> > hdmi_drm_infoframe
> > *drm_infoframe) {
> > + struct intel_digital_port *intel_dig_port =
> > enc_to_dig_port(encoder);
> > + unsigned int type = HDMI_PACKET_TYPE_GAMUT_METADATA;
> > + struct dp_sdp sdp = {};
> > + int ret;
> > +
> > + if ((crtc_state->infoframes.enable &
> > + intel_hdmi_infoframe_enable(type)) == 0)
> > + return;
> > +
> > + intel_dig_port->read_infoframe(encoder, crtc_state, type, &sdp,
> > + sizeof(sdp));
> > +
> > + ret = intel_dp_hdr_metadata_infoframe_sdp_unpack(drm_infoframe,
> > &sdp,
> > + sizeof(sdp));
> > +
> > + if (ret)
> > + DRM_DEBUG_KMS("Failed to unpack DP HDR Metadata
> > Infoframe
> > SDP\n"); }
> > +
> > +void intel_read_dp_sdp(struct intel_encoder *encoder,
> > + struct intel_crtc_state *crtc_state,
> > + unsigned int type)
> > +{
> > + switch (type) {
> > + case DP_SDP_VSC:
> > + intel_read_dp_vsc_sdp(encoder, crtc_state,
> > + &crtc_state->infoframes.vsc);
> > + break;
> > + case HDMI_PACKET_TYPE_GAMUT_METADATA:
> > + intel_read_dp_hdr_metadata_infoframe_sdp(encoder,
> > crtc_state,
> > + &crtc_state-
> > > infoframes.drm.drm);
> > + break;
> > + default:
> > + MISSING_CASE(type);
> > + break;
> > + }
> > +}
> > +
> > static void
> > intel_dp_setup_vsc_sdp(struct intel_dp *intel_dp,
> > const struct intel_crtc_state *crtc_state, diff
> > --git
> > a/drivers/gpu/drm/i915/display/intel_dp.h
> > b/drivers/gpu/drm/i915/display/intel_dp.h
> > index 0dc09a463ee1..e8f9ba962d09 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> > @@ -119,6 +119,9 @@ void intel_dp_hdr_metadata_enable(struct
> > intel_dp
> > *intel_dp, void intel_dp_set_infoframes(struct intel_encoder
> > *encoder, bool
> > enable,
> > const struct intel_crtc_state *crtc_state,
> > const struct drm_connector_state
> > *conn_state);
> > +void intel_read_dp_sdp(struct intel_encoder *encoder,
> > + struct intel_crtc_state *crtc_state,
> > + unsigned int type);
> > bool intel_digital_port_connected(struct intel_encoder *encoder);
> >
> > static inline unsigned int intel_dp_unused_lane_mask(int
> > lane_count)
> > --
> > 2.24.1
> >
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
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next prev parent reply other threads:[~2020-02-09 3:38 UTC|newest]
Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-03 23:19 [PATCH v3 00/17] In order to readout DP SDPs, refactors the handling of DP SDPs Gwan-gyeong Mun
2020-02-03 23:19 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:19 ` Gwan-gyeong Mun
2020-02-03 23:19 ` [PATCH v3 01/17] drm: add DP 1.4 VSC SDP Payload related enums and a structure Gwan-gyeong Mun
2020-02-03 23:19 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:19 ` Gwan-gyeong Mun
2020-02-05 14:42 ` Shankar, Uma
2020-02-05 14:42 ` [Intel-gfx] " Shankar, Uma
2020-02-05 14:42 ` Shankar, Uma
2020-02-09 3:26 ` Mun, Gwan-gyeong
2020-02-09 3:26 ` [Intel-gfx] " Mun, Gwan-gyeong
2020-02-09 3:26 ` Mun, Gwan-gyeong
2020-02-03 23:19 ` [PATCH v3 02/17] drm/i915/dp: Add compute routine for DP VSC SDP Gwan-gyeong Mun
2020-02-03 23:19 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:19 ` Gwan-gyeong Mun
2020-02-05 14:51 ` Shankar, Uma
2020-02-05 14:51 ` [Intel-gfx] " Shankar, Uma
2020-02-05 14:51 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 03/17] drm/i915/dp: Add compute routine for DP HDR Metadata Infoframe SDP Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 15:06 ` Shankar, Uma
2020-02-05 15:06 ` [Intel-gfx] " Shankar, Uma
2020-02-05 15:06 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 04/17] drm/i915/dp: Add writing of DP SDPs (Secondary Data Packet) Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:09 ` Shankar, Uma
2020-02-05 16:09 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:09 ` Shankar, Uma
2020-02-09 3:34 ` Mun, Gwan-gyeong
2020-02-09 3:34 ` [Intel-gfx] " Mun, Gwan-gyeong
2020-02-09 3:34 ` Mun, Gwan-gyeong
2020-02-10 8:16 ` Shankar, Uma
2020-02-10 8:16 ` [Intel-gfx] " Shankar, Uma
2020-02-10 8:16 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 05/17] video/hdmi: Add Unpack only function for DRM infoframe Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:15 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:15 ` Shankar, Uma
2020-02-05 16:15 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 06/17] drm/i915/dp: Read out DP SDPs (Secondary Data Packet) Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:29 ` Shankar, Uma
2020-02-05 16:29 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:29 ` Shankar, Uma
2020-02-09 3:38 ` Mun, Gwan-gyeong [this message]
2020-02-09 3:38 ` [Intel-gfx] " Mun, Gwan-gyeong
2020-02-09 3:38 ` Mun, Gwan-gyeong
2020-02-03 23:20 ` [PATCH v3 07/17] drm: Add logging function for DP VSC SDP Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:38 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:38 ` Shankar, Uma
2020-02-05 16:38 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 08/17] drm/i915: Include HDMI DRM infoframe in the crtc state dump Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:42 ` Shankar, Uma
2020-02-05 16:42 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:42 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 09/17] drm/i915: Include DP HDR Metadata Infoframe SDP " Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:44 ` Shankar, Uma
2020-02-05 16:44 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:44 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 10/17] drm/i915: Include DP VSC " Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:46 ` Shankar, Uma
2020-02-05 16:46 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:46 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 11/17] drm/i915: Program DP SDPs with computed configs Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:51 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:51 ` Shankar, Uma
2020-02-05 16:51 ` Shankar, Uma
2020-02-09 3:40 ` Mun, Gwan-gyeong
2020-02-09 3:40 ` Mun, Gwan-gyeong
2020-02-09 3:40 ` Mun, Gwan-gyeong
2020-02-03 23:20 ` [PATCH v3 12/17] drm/i915: Add state readout for DP HDR Metadata Infoframe SDP Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 16:54 ` [Intel-gfx] " Shankar, Uma
2020-02-05 16:54 ` Shankar, Uma
2020-02-05 16:54 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 13/17] drm/i915: Add state readout for DP VSC SDP Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 17:00 ` Shankar, Uma
2020-02-05 17:00 ` [Intel-gfx] " Shankar, Uma
2020-02-05 17:00 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 14/17] drm/i915: Program DP SDPs on pipe updates Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 17:02 ` Shankar, Uma
2020-02-05 17:02 ` [Intel-gfx] " Shankar, Uma
2020-02-05 17:02 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 15/17] drm/i915: Stop sending DP SDPs on intel_ddi_post_disable_dp() Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 17:05 ` Shankar, Uma
2020-02-05 17:05 ` [Intel-gfx] " Shankar, Uma
2020-02-05 17:05 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 16/17] drm/i915/dp: Add compute routine for DP PSR VSC SDP Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 17:12 ` Shankar, Uma
2020-02-05 17:12 ` [Intel-gfx] " Shankar, Uma
2020-02-05 17:12 ` Shankar, Uma
2020-02-03 23:20 ` [PATCH v3 17/17] drm/i915/psr: Use new DP VSC SDP compute routine on PSR Gwan-gyeong Mun
2020-02-03 23:20 ` [Intel-gfx] " Gwan-gyeong Mun
2020-02-03 23:20 ` Gwan-gyeong Mun
2020-02-05 17:15 ` [Intel-gfx] " Shankar, Uma
2020-02-05 17:15 ` Shankar, Uma
2020-02-05 17:15 ` Shankar, Uma
2020-02-04 20:32 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for In order to readout DP SDPs, refactors the handling of DP SDPs (rev3) Patchwork
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