* [PATCH 0/2] drm/etnaviv: add GC7000 r6202 support
@ 2021-06-18 12:04 ` Michael Walle
0 siblings, 0 replies; 8+ messages in thread
From: Michael Walle @ 2021-06-18 12:04 UTC (permalink / raw)
To: etnaviv, dri-devel, linux-kernel
Cc: David Airlie, Michael Walle, Russell King, Lukas F . Hartmann
This is the first step to bring GPU support to the NXP LS1028A SoC. It
features a Mali DP500, a Vivante GC7000 and has one DisplayPort output
which is driven by a Cadence MHDP controller and PHY.
This was briefly tested with glmark2, a patched mesa kmsro driver [1]
to support the mali DP500/GC7000 duo, fixes from mesa merge request
9255 [2] and using ETNA_MESA_DEBUG=no_supertile,no_ts.
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11419
[2] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9255
Michael Walle (2):
drm/etnaviv: add HWDB entry for GC7000 r6202
drm/etnaviv: add clock gating workaround for GC7000 r6202
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 +++++
drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++
2 files changed, 37 insertions(+)
--
2.20.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/2] drm/etnaviv: add HWDB entry for GC7000 r6202
2021-06-18 12:04 ` Michael Walle
@ 2021-06-18 12:04 ` Michael Walle
-1 siblings, 0 replies; 8+ messages in thread
From: Michael Walle @ 2021-06-18 12:04 UTC (permalink / raw)
To: etnaviv, dri-devel, linux-kernel
Cc: Lucas Stach, Russell King, Christian Gmeiner, David Airlie,
Daniel Vetter, Lukas F . Hartmann, Michael Walle
The GPU is found on the NXP LS1028A SoC. The feature bits are taken from
the NXP downstream kernel driver 6.4.3.p1.
Signed-off-by: Michael Walle <michael@walle.cc>
---
changes since RFC:
- none
drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
index dfc0f536b3b9..f2fc645c7956 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
@@ -37,6 +37,37 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
.minor_features10 = 0x0,
.minor_features11 = 0x0,
},
+ {
+ .model = 0x7000,
+ .revision = 0x6202,
+ .product_id = 0x70003,
+ .customer_id = 0,
+ .eco_id = 0,
+ .stream_count = 8,
+ .register_max = 64,
+ .thread_count = 512,
+ .shader_core_count = 2,
+ .vertex_cache_size = 16,
+ .vertex_output_buffer_size = 1024,
+ .pixel_pipes = 1,
+ .instruction_count = 512,
+ .num_constants = 320,
+ .buffer_size = 0,
+ .varyings_count = 16,
+ .features = 0xe0287cad,
+ .minor_features0 = 0xc1489eff,
+ .minor_features1 = 0xfefbfad9,
+ .minor_features2 = 0xeb9d4fbf,
+ .minor_features3 = 0xedfffced,
+ .minor_features4 = 0xdb0dafc7,
+ .minor_features5 = 0x3b5ac333,
+ .minor_features6 = 0xfccee201,
+ .minor_features7 = 0x03fffa6f,
+ .minor_features8 = 0x00e10ef0,
+ .minor_features9 = 0x0088003c,
+ .minor_features10 = 0x00004040,
+ .minor_features11 = 0x00000024,
+ },
{
.model = 0x7000,
.revision = 0x6204,
--
2.20.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 1/2] drm/etnaviv: add HWDB entry for GC7000 r6202
@ 2021-06-18 12:04 ` Michael Walle
0 siblings, 0 replies; 8+ messages in thread
From: Michael Walle @ 2021-06-18 12:04 UTC (permalink / raw)
To: etnaviv, dri-devel, linux-kernel
Cc: David Airlie, Michael Walle, Russell King, Lukas F . Hartmann
The GPU is found on the NXP LS1028A SoC. The feature bits are taken from
the NXP downstream kernel driver 6.4.3.p1.
Signed-off-by: Michael Walle <michael@walle.cc>
---
changes since RFC:
- none
drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
index dfc0f536b3b9..f2fc645c7956 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
@@ -37,6 +37,37 @@ static const struct etnaviv_chip_identity etnaviv_chip_identities[] = {
.minor_features10 = 0x0,
.minor_features11 = 0x0,
},
+ {
+ .model = 0x7000,
+ .revision = 0x6202,
+ .product_id = 0x70003,
+ .customer_id = 0,
+ .eco_id = 0,
+ .stream_count = 8,
+ .register_max = 64,
+ .thread_count = 512,
+ .shader_core_count = 2,
+ .vertex_cache_size = 16,
+ .vertex_output_buffer_size = 1024,
+ .pixel_pipes = 1,
+ .instruction_count = 512,
+ .num_constants = 320,
+ .buffer_size = 0,
+ .varyings_count = 16,
+ .features = 0xe0287cad,
+ .minor_features0 = 0xc1489eff,
+ .minor_features1 = 0xfefbfad9,
+ .minor_features2 = 0xeb9d4fbf,
+ .minor_features3 = 0xedfffced,
+ .minor_features4 = 0xdb0dafc7,
+ .minor_features5 = 0x3b5ac333,
+ .minor_features6 = 0xfccee201,
+ .minor_features7 = 0x03fffa6f,
+ .minor_features8 = 0x00e10ef0,
+ .minor_features9 = 0x0088003c,
+ .minor_features10 = 0x00004040,
+ .minor_features11 = 0x00000024,
+ },
{
.model = 0x7000,
.revision = 0x6204,
--
2.20.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/etnaviv: add clock gating workaround for GC7000 r6202
2021-06-18 12:04 ` Michael Walle
@ 2021-06-18 12:04 ` Michael Walle
-1 siblings, 0 replies; 8+ messages in thread
From: Michael Walle @ 2021-06-18 12:04 UTC (permalink / raw)
To: etnaviv, dri-devel, linux-kernel
Cc: Lucas Stach, Russell King, Christian Gmeiner, David Airlie,
Daniel Vetter, Lukas F . Hartmann, Michael Walle
The LS1028A SoC errata sheet mentions A-050121 "GPU hangs if clock
gating for Rasterizer, Setup Engine and Texture Engine are enabled".
The workaround is to disable the corresponding clock gatings.
Signed-off-by: Michael Walle <michael@walle.cc>
---
changes since RFC:
- corrected the wording of the comment
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 4102bcea3341..c297fffe06eb 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -613,6 +613,12 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
etnaviv_is_model_rev(gpu, GC2000, 0x5108))
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;
+ /* Disable SE, RA and TX clock gating on affected core revisions. */
+ if (etnaviv_is_model_rev(gpu, GC7000, 0x6202))
+ pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE |
+ VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA |
+ VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;
+
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;
--
2.20.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/etnaviv: add clock gating workaround for GC7000 r6202
@ 2021-06-18 12:04 ` Michael Walle
0 siblings, 0 replies; 8+ messages in thread
From: Michael Walle @ 2021-06-18 12:04 UTC (permalink / raw)
To: etnaviv, dri-devel, linux-kernel
Cc: David Airlie, Michael Walle, Russell King, Lukas F . Hartmann
The LS1028A SoC errata sheet mentions A-050121 "GPU hangs if clock
gating for Rasterizer, Setup Engine and Texture Engine are enabled".
The workaround is to disable the corresponding clock gatings.
Signed-off-by: Michael Walle <michael@walle.cc>
---
changes since RFC:
- corrected the wording of the comment
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 4102bcea3341..c297fffe06eb 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -613,6 +613,12 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
etnaviv_is_model_rev(gpu, GC2000, 0x5108))
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;
+ /* Disable SE, RA and TX clock gating on affected core revisions. */
+ if (etnaviv_is_model_rev(gpu, GC7000, 0x6202))
+ pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE |
+ VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA |
+ VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;
+
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;
--
2.20.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 0/2] drm/etnaviv: add GC7000 r6202 support
2021-06-18 12:04 ` Michael Walle
@ 2021-07-06 16:33 ` Lucas Stach
-1 siblings, 0 replies; 8+ messages in thread
From: Lucas Stach @ 2021-07-06 16:33 UTC (permalink / raw)
To: Michael Walle, etnaviv, dri-devel, linux-kernel
Cc: Russell King, Christian Gmeiner, David Airlie, Daniel Vetter,
Lukas F . Hartmann
Am Freitag, dem 18.06.2021 um 14:04 +0200 schrieb Michael Walle:
> This is the first step to bring GPU support to the NXP LS1028A SoC. It
> features a Mali DP500, a Vivante GC7000 and has one DisplayPort output
> which is driven by a Cadence MHDP controller and PHY.
>
> This was briefly tested with glmark2, a patched mesa kmsro driver [1]
> to support the mali DP500/GC7000 duo, fixes from mesa merge request
> 9255 [2] and using ETNA_MESA_DEBUG=no_supertile,no_ts.
>
> [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11419
> [2] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9255
>
> Michael Walle (2):
> drm/etnaviv: add HWDB entry for GC7000 r6202
> drm/etnaviv: add clock gating workaround for GC7000 r6202
>
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 +++++
> drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++
> 2 files changed, 37 insertions(+)
Thanks, I've applied this series to my etnaviv/next branch.
Regards,
Lucas
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 0/2] drm/etnaviv: add GC7000 r6202 support
@ 2021-07-06 16:33 ` Lucas Stach
0 siblings, 0 replies; 8+ messages in thread
From: Lucas Stach @ 2021-07-06 16:33 UTC (permalink / raw)
To: Michael Walle, etnaviv, dri-devel, linux-kernel
Cc: David Airlie, Lukas F . Hartmann, Russell King
Am Freitag, dem 18.06.2021 um 14:04 +0200 schrieb Michael Walle:
> This is the first step to bring GPU support to the NXP LS1028A SoC. It
> features a Mali DP500, a Vivante GC7000 and has one DisplayPort output
> which is driven by a Cadence MHDP controller and PHY.
>
> This was briefly tested with glmark2, a patched mesa kmsro driver [1]
> to support the mali DP500/GC7000 duo, fixes from mesa merge request
> 9255 [2] and using ETNA_MESA_DEBUG=no_supertile,no_ts.
>
> [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11419
> [2] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9255
>
> Michael Walle (2):
> drm/etnaviv: add HWDB entry for GC7000 r6202
> drm/etnaviv: add clock gating workaround for GC7000 r6202
>
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 6 +++++
> drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 31 ++++++++++++++++++++++++++
> 2 files changed, 37 insertions(+)
Thanks, I've applied this series to my etnaviv/next branch.
Regards,
Lucas
^ permalink raw reply [flat|nested] 8+ messages in thread