[PATCH v2 0/3] Add nvmem driver support for ZynqMP

[PATCH v2 0/3] Add nvmem driver support for ZynqMP

[Nava kishore Manne]

Nava kishore Manne (3):
  firmware: xilinx: Add zynqmp_pm_get_chipid() API
  dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
  nvmem: zynqmp: Added zynqmp nvmem firmware driver

 .../bindings/nvmem/xlnx,zynqmp-nvmem.txt      | 47 ++++++++++
 drivers/firmware/xilinx/zynqmp.c              | 24 ++++++
 drivers/nvmem/Kconfig                         | 15 ++--
 drivers/nvmem/Makefile                        |  5 +-
 drivers/nvmem/zynqmp_nvmem.c                  | 86 +++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h          |  2 +
 6 files changed, 169 insertions(+), 10 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
 create mode 100644 drivers/nvmem/zynqmp_nvmem.c

-- 
2.18.0

[PATCH v2 0/3] Add nvmem driver support for ZynqMP

[Nava kishore Manne]

Nava kishore Manne (3):
  firmware: xilinx: Add zynqmp_pm_get_chipid() API
  dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
  nvmem: zynqmp: Added zynqmp nvmem firmware driver

 .../bindings/nvmem/xlnx,zynqmp-nvmem.txt      | 47 ++++++++++
 drivers/firmware/xilinx/zynqmp.c              | 24 ++++++
 drivers/nvmem/Kconfig                         | 15 ++--
 drivers/nvmem/Makefile                        |  5 +-
 drivers/nvmem/zynqmp_nvmem.c                  | 86 +++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h          |  2 +
 6 files changed, 169 insertions(+), 10 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
 create mode 100644 drivers/nvmem/zynqmp_nvmem.c

-- 
2.18.0


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[PATCH v2 0/3] Add nvmem driver support for ZynqMP

[Nava kishore Manne]

Nava kishore Manne (3):
  firmware: xilinx: Add zynqmp_pm_get_chipid() API
  dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
  nvmem: zynqmp: Added zynqmp nvmem firmware driver

 .../bindings/nvmem/xlnx,zynqmp-nvmem.txt      | 47 ++++++++++
 drivers/firmware/xilinx/zynqmp.c              | 24 ++++++
 drivers/nvmem/Kconfig                         | 15 ++--
 drivers/nvmem/Makefile                        |  5 +-
 drivers/nvmem/zynqmp_nvmem.c                  | 86 +++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h          |  2 +
 6 files changed, 169 insertions(+), 10 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
 create mode 100644 drivers/nvmem/zynqmp_nvmem.c

-- 
2.18.0

[PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Nava kishore Manne]

This patch adds a new API to provide access to the
hardware related data like soc revision, IDCODE... etc.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
		-None.
Changes for v1:
                -None.

Changes for RFC-V3:
                -corrected typo error in commit msg.

Changes for RFC-v2:
                -New Patch.

 drivers/firmware/xilinx/zynqmp.c     | 24 ++++++++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h |  2 ++
 2 files changed, 26 insertions(+)

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 9a1c72a9280f..af2a209fc2da 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -186,6 +186,29 @@ static int zynqmp_pm_get_api_version(u32 *version)
 	return ret;
 }
 
+/**
+ * zynqmp_pm_get_chipid - Get silicon ID registers
+ * @idcode:     IDCODE register
+ * @version:    version register
+ *
+ * Return:      Returns the status of the operation and the idcode and version
+ *              registers in @idcode and @version.
+ */
+static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
+{
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	int ret;
+
+	if (!idcode || !version)
+		return -EINVAL;
+
+	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
+	*idcode = ret_payload[1];
+	*version = ret_payload[2];
+
+	return ret;
+}
+
 /**
  * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
  * @version:	Returned version value
@@ -471,6 +494,7 @@ static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2,
 
 static const struct zynqmp_eemi_ops eemi_ops = {
 	.get_api_version = zynqmp_pm_get_api_version,
+	.get_chipid = zynqmp_pm_get_chipid,
 	.query_data = zynqmp_pm_query_data,
 	.clock_enable = zynqmp_pm_clock_enable,
 	.clock_disable = zynqmp_pm_clock_disable,
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 3c3c28eff56a..c435f4b35adf 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -34,6 +34,7 @@
 
 enum pm_api_id {
 	PM_GET_API_VERSION = 1,
+	PM_GET_CHIPID = 22,
 	PM_IOCTL = 34,
 	PM_QUERY_DATA,
 	PM_CLOCK_ENABLE,
@@ -91,6 +92,7 @@ struct zynqmp_pm_query_data {
 
 struct zynqmp_eemi_ops {
 	int (*get_api_version)(u32 *version);
+	int (*get_chipid)(u32 *idcode, u32 *version);
 	int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
 	int (*clock_enable)(u32 clock_id);
 	int (*clock_disable)(u32 clock_id);
-- 
2.18.0

[PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Nava kishore Manne]

This patch adds a new API to provide access to the
hardware related data like soc revision, IDCODE... etc.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
		-None.
Changes for v1:
                -None.

Changes for RFC-V3:
                -corrected typo error in commit msg.

Changes for RFC-v2:
                -New Patch.

 drivers/firmware/xilinx/zynqmp.c     | 24 ++++++++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h |  2 ++
 2 files changed, 26 insertions(+)

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 9a1c72a9280f..af2a209fc2da 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -186,6 +186,29 @@ static int zynqmp_pm_get_api_version(u32 *version)
 	return ret;
 }
 
+/**
+ * zynqmp_pm_get_chipid - Get silicon ID registers
+ * @idcode:     IDCODE register
+ * @version:    version register
+ *
+ * Return:      Returns the status of the operation and the idcode and version
+ *              registers in @idcode and @version.
+ */
+static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
+{
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	int ret;
+
+	if (!idcode || !version)
+		return -EINVAL;
+
+	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
+	*idcode = ret_payload[1];
+	*version = ret_payload[2];
+
+	return ret;
+}
+
 /**
  * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
  * @version:	Returned version value
@@ -471,6 +494,7 @@ static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2,
 
 static const struct zynqmp_eemi_ops eemi_ops = {
 	.get_api_version = zynqmp_pm_get_api_version,
+	.get_chipid = zynqmp_pm_get_chipid,
 	.query_data = zynqmp_pm_query_data,
 	.clock_enable = zynqmp_pm_clock_enable,
 	.clock_disable = zynqmp_pm_clock_disable,
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 3c3c28eff56a..c435f4b35adf 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -34,6 +34,7 @@
 
 enum pm_api_id {
 	PM_GET_API_VERSION = 1,
+	PM_GET_CHIPID = 22,
 	PM_IOCTL = 34,
 	PM_QUERY_DATA,
 	PM_CLOCK_ENABLE,
@@ -91,6 +92,7 @@ struct zynqmp_pm_query_data {
 
 struct zynqmp_eemi_ops {
 	int (*get_api_version)(u32 *version);
+	int (*get_chipid)(u32 *idcode, u32 *version);
 	int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
 	int (*clock_enable)(u32 clock_id);
 	int (*clock_disable)(u32 clock_id);
-- 
2.18.0


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[PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Nava kishore Manne]

This patch adds a new API to provide access to the
hardware related data like soc revision, IDCODE... etc.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
		-None.
Changes for v1:
                -None.

Changes for RFC-V3:
                -corrected typo error in commit msg.

Changes for RFC-v2:
                -New Patch.

 drivers/firmware/xilinx/zynqmp.c     | 24 ++++++++++++++++++++++++
 include/linux/firmware/xlnx-zynqmp.h |  2 ++
 2 files changed, 26 insertions(+)

diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 9a1c72a9280f..af2a209fc2da 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -186,6 +186,29 @@ static int zynqmp_pm_get_api_version(u32 *version)
 	return ret;
 }
 
+/**
+ * zynqmp_pm_get_chipid - Get silicon ID registers
+ * @idcode:     IDCODE register
+ * @version:    version register
+ *
+ * Return:      Returns the status of the operation and the idcode and version
+ *              registers in @idcode and @version.
+ */
+static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
+{
+	u32 ret_payload[PAYLOAD_ARG_CNT];
+	int ret;
+
+	if (!idcode || !version)
+		return -EINVAL;
+
+	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
+	*idcode = ret_payload[1];
+	*version = ret_payload[2];
+
+	return ret;
+}
+
 /**
  * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
  * @version:	Returned version value
@@ -471,6 +494,7 @@ static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2,
 
 static const struct zynqmp_eemi_ops eemi_ops = {
 	.get_api_version = zynqmp_pm_get_api_version,
+	.get_chipid = zynqmp_pm_get_chipid,
 	.query_data = zynqmp_pm_query_data,
 	.clock_enable = zynqmp_pm_clock_enable,
 	.clock_disable = zynqmp_pm_clock_disable,
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 3c3c28eff56a..c435f4b35adf 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -34,6 +34,7 @@
 
 enum pm_api_id {
 	PM_GET_API_VERSION = 1,
+	PM_GET_CHIPID = 22,
 	PM_IOCTL = 34,
 	PM_QUERY_DATA,
 	PM_CLOCK_ENABLE,
@@ -91,6 +92,7 @@ struct zynqmp_pm_query_data {
 
 struct zynqmp_eemi_ops {
 	int (*get_api_version)(u32 *version);
+	int (*get_chipid)(u32 *idcode, u32 *version);
 	int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
 	int (*clock_enable)(u32 clock_id);
 	int (*clock_disable)(u32 clock_id);
-- 
2.18.0

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Srinivas Kandagatla]

Hi Kishore,

I need ack for this patch from Michal Simek to take this via nvmem tree.

thanks,
srini

On 04/02/2019 07:09, Nava kishore Manne wrote:
> This patch adds a new API to provide access to the
> hardware related data like soc revision, IDCODE... etc.
> 
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> Changes for v2:
> 		-None.
> Changes for v1:
>                  -None.
> 
> Changes for RFC-V3:
>                  -corrected typo error in commit msg.
> 
> Changes for RFC-v2:
>                  -New Patch.
> 
>   drivers/firmware/xilinx/zynqmp.c     | 24 ++++++++++++++++++++++++
>   include/linux/firmware/xlnx-zynqmp.h |  2 ++
>   2 files changed, 26 insertions(+)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index 9a1c72a9280f..af2a209fc2da 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -186,6 +186,29 @@ static int zynqmp_pm_get_api_version(u32 *version)
>   	return ret;
>   }
>   
> +/**
> + * zynqmp_pm_get_chipid - Get silicon ID registers
> + * @idcode:     IDCODE register
> + * @version:    version register
> + *
> + * Return:      Returns the status of the operation and the idcode and version
> + *              registers in @idcode and @version.
> + */
> +static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
> +{
> +	u32 ret_payload[PAYLOAD_ARG_CNT];
> +	int ret;
> +
> +	if (!idcode || !version)
> +		return -EINVAL;
> +
> +	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
> +	*idcode = ret_payload[1];
> +	*version = ret_payload[2];
> +
> +	return ret;
> +}
> +
>   /**
>    * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
>    * @version:	Returned version value
> @@ -471,6 +494,7 @@ static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2,
>   
>   static const struct zynqmp_eemi_ops eemi_ops = {
>   	.get_api_version = zynqmp_pm_get_api_version,
> +	.get_chipid = zynqmp_pm_get_chipid,
>   	.query_data = zynqmp_pm_query_data,
>   	.clock_enable = zynqmp_pm_clock_enable,
>   	.clock_disable = zynqmp_pm_clock_disable,
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 3c3c28eff56a..c435f4b35adf 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -34,6 +34,7 @@
>   
>   enum pm_api_id {
>   	PM_GET_API_VERSION = 1,
> +	PM_GET_CHIPID = 22,
>   	PM_IOCTL = 34,
>   	PM_QUERY_DATA,
>   	PM_CLOCK_ENABLE,
> @@ -91,6 +92,7 @@ struct zynqmp_pm_query_data {
>   
>   struct zynqmp_eemi_ops {
>   	int (*get_api_version)(u32 *version);
> +	int (*get_chipid)(u32 *idcode, u32 *version);
>   	int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
>   	int (*clock_enable)(u32 clock_id);
>   	int (*clock_disable)(u32 clock_id);
> 

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Srinivas Kandagatla]

Hi Kishore,

I need ack for this patch from Michal Simek to take this via nvmem tree.

thanks,
srini

On 04/02/2019 07:09, Nava kishore Manne wrote:
> This patch adds a new API to provide access to the
> hardware related data like soc revision, IDCODE... etc.
> 
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> Changes for v2:
> 		-None.
> Changes for v1:
>                  -None.
> 
> Changes for RFC-V3:
>                  -corrected typo error in commit msg.
> 
> Changes for RFC-v2:
>                  -New Patch.
> 
>   drivers/firmware/xilinx/zynqmp.c     | 24 ++++++++++++++++++++++++
>   include/linux/firmware/xlnx-zynqmp.h |  2 ++
>   2 files changed, 26 insertions(+)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index 9a1c72a9280f..af2a209fc2da 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -186,6 +186,29 @@ static int zynqmp_pm_get_api_version(u32 *version)
>   	return ret;
>   }
>   
> +/**
> + * zynqmp_pm_get_chipid - Get silicon ID registers
> + * @idcode:     IDCODE register
> + * @version:    version register
> + *
> + * Return:      Returns the status of the operation and the idcode and version
> + *              registers in @idcode and @version.
> + */
> +static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
> +{
> +	u32 ret_payload[PAYLOAD_ARG_CNT];
> +	int ret;
> +
> +	if (!idcode || !version)
> +		return -EINVAL;
> +
> +	ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
> +	*idcode = ret_payload[1];
> +	*version = ret_payload[2];
> +
> +	return ret;
> +}
> +
>   /**
>    * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
>    * @version:	Returned version value
> @@ -471,6 +494,7 @@ static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2,
>   
>   static const struct zynqmp_eemi_ops eemi_ops = {
>   	.get_api_version = zynqmp_pm_get_api_version,
> +	.get_chipid = zynqmp_pm_get_chipid,
>   	.query_data = zynqmp_pm_query_data,
>   	.clock_enable = zynqmp_pm_clock_enable,
>   	.clock_disable = zynqmp_pm_clock_disable,
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 3c3c28eff56a..c435f4b35adf 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -34,6 +34,7 @@
>   
>   enum pm_api_id {
>   	PM_GET_API_VERSION = 1,
> +	PM_GET_CHIPID = 22,
>   	PM_IOCTL = 34,
>   	PM_QUERY_DATA,
>   	PM_CLOCK_ENABLE,
> @@ -91,6 +92,7 @@ struct zynqmp_pm_query_data {
>   
>   struct zynqmp_eemi_ops {
>   	int (*get_api_version)(u32 *version);
> +	int (*get_chipid)(u32 *idcode, u32 *version);
>   	int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
>   	int (*clock_enable)(u32 clock_id);
>   	int (*clock_disable)(u32 clock_id);
> 

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Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Michal Simek]

[-- Attachment #1: Type: text/plain, Size: 3658 bytes --]

ne, 3. úno 2019 9:50 odesílatel Srinivas Kandagatla <
srinivas.kandagatla@linaro.org> napsal:

> Hi Kishore,
>
> I need ack for this patch from Michal Simek to take this via nvmem tree.
>
> thanks,
> srini
>

There will be collisions with other patches. If you can review it then I
will take it via arm soc tree.

Thanks,
Michal





> On 04/02/2019 07:09, Nava kishore Manne wrote:
> > This patch adds a new API to provide access to the
> > hardware related data like soc revision, IDCODE... etc.
> >
> > Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> > ---
> > Changes for v2:
> >               -None.
> > Changes for v1:
> >                  -None.
> >
> > Changes for RFC-V3:
> >                  -corrected typo error in commit msg.
> >
> > Changes for RFC-v2:
> >                  -New Patch.
> >
> >   drivers/firmware/xilinx/zynqmp.c     | 24 ++++++++++++++++++++++++
> >   include/linux/firmware/xlnx-zynqmp.h |  2 ++
> >   2 files changed, 26 insertions(+)
> >
> > diff --git a/drivers/firmware/xilinx/zynqmp.c
> b/drivers/firmware/xilinx/zynqmp.c
> > index 9a1c72a9280f..af2a209fc2da 100644
> > --- a/drivers/firmware/xilinx/zynqmp.c
> > +++ b/drivers/firmware/xilinx/zynqmp.c
> > @@ -186,6 +186,29 @@ static int zynqmp_pm_get_api_version(u32 *version)
> >       return ret;
> >   }
> >
> > +/**
> > + * zynqmp_pm_get_chipid - Get silicon ID registers
> > + * @idcode:     IDCODE register
> > + * @version:    version register
> > + *
> > + * Return:      Returns the status of the operation and the idcode and
> version
> > + *              registers in @idcode and @version.
> > + */
> > +static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
> > +{
> > +     u32 ret_payload[PAYLOAD_ARG_CNT];
> > +     int ret;
> > +
> > +     if (!idcode || !version)
> > +             return -EINVAL;
> > +
> > +     ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
> > +     *idcode = ret_payload[1];
> > +     *version = ret_payload[2];
> > +
> > +     return ret;
> > +}
> > +
> >   /**
> >    * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware
> version
> >    * @version:        Returned version value
> > @@ -471,6 +494,7 @@ static int zynqmp_pm_ioctl(u32 node_id, u32
> ioctl_id, u32 arg1, u32 arg2,
> >
> >   static const struct zynqmp_eemi_ops eemi_ops = {
> >       .get_api_version = zynqmp_pm_get_api_version,
> > +     .get_chipid = zynqmp_pm_get_chipid,
> >       .query_data = zynqmp_pm_query_data,
> >       .clock_enable = zynqmp_pm_clock_enable,
> >       .clock_disable = zynqmp_pm_clock_disable,
> > diff --git a/include/linux/firmware/xlnx-zynqmp.h
> b/include/linux/firmware/xlnx-zynqmp.h
> > index 3c3c28eff56a..c435f4b35adf 100644
> > --- a/include/linux/firmware/xlnx-zynqmp.h
> > +++ b/include/linux/firmware/xlnx-zynqmp.h
> > @@ -34,6 +34,7 @@
> >
> >   enum pm_api_id {
> >       PM_GET_API_VERSION = 1,
> > +     PM_GET_CHIPID = 22,
> >       PM_IOCTL = 34,
> >       PM_QUERY_DATA,
> >       PM_CLOCK_ENABLE,
> > @@ -91,6 +92,7 @@ struct zynqmp_pm_query_data {
> >
> >   struct zynqmp_eemi_ops {
> >       int (*get_api_version)(u32 *version);
> > +     int (*get_chipid)(u32 *idcode, u32 *version);
> >       int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
> >       int (*clock_enable)(u32 clock_id);
> >       int (*clock_disable)(u32 clock_id);
> >
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

[-- Attachment #2: Type: text/html, Size: 5205 bytes --]

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Michal Simek]

Hi,

On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
> Hi Kishore,
> 
> I need ack for this patch from Michal Simek to take this via nvmem tree.

not sure if my reaction went through. Just for a record. There is high
chance that there is collision in firmware interface. It means if you
can ack/review that patches then I would take them via arm-soc trees.

Thanks,
Michal

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Michal Simek]

Hi,

On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
> Hi Kishore,
> 
> I need ack for this patch from Michal Simek to take this via nvmem tree.

not sure if my reaction went through. Just for a record. There is high
chance that there is collision in firmware interface. It means if you
can ack/review that patches then I would take them via arm-soc trees.

Thanks,
Michal

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Michal Simek]

Hi,

On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
> Hi Kishore,
> 
> I need ack for this patch from Michal Simek to take this via nvmem tree.

not sure if my reaction went through. Just for a record. There is high
chance that there is collision in firmware interface. It means if you
can ack/review that patches then I would take them via arm-soc trees.

Thanks,
Michal

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Srinivas Kandagatla]

On 05/02/2019 10:29, Michal Simek wrote:
> Hi,
> 
> On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
>> Hi Kishore,
>>
>> I need ack for this patch from Michal Simek to take this via nvmem tree.
> 
> not sure if my reaction went through. Just for a record. There is high
> chance that there is collision in firmware interface. It means if you
> can ack/review that patches then I would take them via arm-soc trees.
> 

I got the message! There are outstanding comments on the nvmem patch!

--srini
> Thanks,
> Michal
> 

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Srinivas Kandagatla]

On 05/02/2019 10:29, Michal Simek wrote:
> Hi,
> 
> On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
>> Hi Kishore,
>>
>> I need ack for this patch from Michal Simek to take this via nvmem tree.
> 
> not sure if my reaction went through. Just for a record. There is high
> chance that there is collision in firmware interface. It means if you
> can ack/review that patches then I would take them via arm-soc trees.
> 

I got the message! There are outstanding comments on the nvmem patch!

--srini
> Thanks,
> Michal
> 

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Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Michal Simek]

On 05. 02. 19 11:33, Srinivas Kandagatla wrote:
> 
> 
> On 05/02/2019 10:29, Michal Simek wrote:
>> Hi,
>>
>> On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
>>> Hi Kishore,
>>>
>>> I need ack for this patch from Michal Simek to take this via nvmem tree.
>>
>> not sure if my reaction went through. Just for a record. There is high
>> chance that there is collision in firmware interface. It means if you
>> can ack/review that patches then I would take them via arm-soc trees.
>>
> 
> I got the message! There are outstanding comments on the nvmem patch!

ok thanks.
Michal

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Michal Simek]

On 05. 02. 19 11:33, Srinivas Kandagatla wrote:
> 
> 
> On 05/02/2019 10:29, Michal Simek wrote:
>> Hi,
>>
>> On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
>>> Hi Kishore,
>>>
>>> I need ack for this patch from Michal Simek to take this via nvmem tree.
>>
>> not sure if my reaction went through. Just for a record. There is high
>> chance that there is collision in firmware interface. It means if you
>> can ack/review that patches then I would take them via arm-soc trees.
>>
> 
> I got the message! There are outstanding comments on the nvmem patch!

ok thanks.
Michal

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH v2 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API

[Michal Simek]

On 05. 02. 19 11:33, Srinivas Kandagatla wrote:
> 
> 
> On 05/02/2019 10:29, Michal Simek wrote:
>> Hi,
>>
>> On 03. 02. 19 9:50, Srinivas Kandagatla wrote:
>>> Hi Kishore,
>>>
>>> I need ack for this patch from Michal Simek to take this via nvmem tree.
>>
>> not sure if my reaction went through. Just for a record. There is high
>> chance that there is collision in firmware interface. It means if you
>> can ack/review that patches then I would take them via arm-soc trees.
>>
> 
> I got the message! There are outstanding comments on the nvmem patch!

ok thanks.
Michal

[PATCH v2 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver

[Nava kishore Manne]

Add documentation to describe Xilinx ZynqMP nvmem driver
bindings.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../bindings/nvmem/xlnx,zynqmp-nvmem.txt      | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt

diff --git a/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
new file mode 100644
index 000000000000..2043c8284f8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
@@ -0,0 +1,47 @@
+--------------------------------------------------------------------------
+=  Zynq UltraScale+ MPSoC nvmem firmware driver binding =
+--------------------------------------------------------------------------
+The nvmem_firmware node provides access to the hardware related data
+like soc revision, IDCODE... etc, By using the firmware interface.
+
+Required properties:
+- compatible: should be "xlnx,zynqmp-nvmem-fw"
+
+= Data cells =
+Are child nodes of silicon id, bindings of which as described in
+bindings/nvmem/nvmem.txt
+
+-------
+ Example
+-------
+firmware {
+	zynqmp_firmware: zynqmp-firmware {
+		compatible = "xlnx,zynqmp-firmware";
+		method = "smc";
+
+		nvmem_firmware {
+			compatible = "xlnx,zynqmp-nvmem-fw";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/* Data cells */
+			soc_revision: soc_revision {
+				reg = <0x0 0x4>;
+			};
+		};
+	};
+};
+
+= Data consumers =
+Are device nodes which consume nvmem data cells.
+
+For example:
+	pcap {
+		...
+
+		nvmem-cells = <&soc_revision>;
+		nvmem-cell-names = "soc_revision";
+
+		...
+	};
+
-- 
2.18.0

[PATCH v2 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver

[Nava kishore Manne]

Add documentation to describe Xilinx ZynqMP nvmem driver
bindings.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../bindings/nvmem/xlnx,zynqmp-nvmem.txt      | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt

diff --git a/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
new file mode 100644
index 000000000000..2043c8284f8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
@@ -0,0 +1,47 @@
+--------------------------------------------------------------------------
+=  Zynq UltraScale+ MPSoC nvmem firmware driver binding =
+--------------------------------------------------------------------------
+The nvmem_firmware node provides access to the hardware related data
+like soc revision, IDCODE... etc, By using the firmware interface.
+
+Required properties:
+- compatible: should be "xlnx,zynqmp-nvmem-fw"
+
+= Data cells =
+Are child nodes of silicon id, bindings of which as described in
+bindings/nvmem/nvmem.txt
+
+-------
+ Example
+-------
+firmware {
+	zynqmp_firmware: zynqmp-firmware {
+		compatible = "xlnx,zynqmp-firmware";
+		method = "smc";
+
+		nvmem_firmware {
+			compatible = "xlnx,zynqmp-nvmem-fw";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/* Data cells */
+			soc_revision: soc_revision {
+				reg = <0x0 0x4>;
+			};
+		};
+	};
+};
+
+= Data consumers =
+Are device nodes which consume nvmem data cells.
+
+For example:
+	pcap {
+		...
+
+		nvmem-cells = <&soc_revision>;
+		nvmem-cell-names = "soc_revision";
+
+		...
+	};
+
-- 
2.18.0


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[PATCH v2 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver

[Nava kishore Manne]

Add documentation to describe Xilinx ZynqMP nvmem driver
bindings.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
 .../bindings/nvmem/xlnx,zynqmp-nvmem.txt      | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt

diff --git a/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
new file mode 100644
index 000000000000..2043c8284f8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
@@ -0,0 +1,47 @@
+--------------------------------------------------------------------------
+=  Zynq UltraScale+ MPSoC nvmem firmware driver binding =
+--------------------------------------------------------------------------
+The nvmem_firmware node provides access to the hardware related data
+like soc revision, IDCODE... etc, By using the firmware interface.
+
+Required properties:
+- compatible: should be "xlnx,zynqmp-nvmem-fw"
+
+= Data cells =
+Are child nodes of silicon id, bindings of which as described in
+bindings/nvmem/nvmem.txt
+
+-------
+ Example
+-------
+firmware {
+	zynqmp_firmware: zynqmp-firmware {
+		compatible = "xlnx,zynqmp-firmware";
+		method = "smc";
+
+		nvmem_firmware {
+			compatible = "xlnx,zynqmp-nvmem-fw";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			/* Data cells */
+			soc_revision: soc_revision {
+				reg = <0x0 0x4>;
+			};
+		};
+	};
+};
+
+= Data consumers =
+Are device nodes which consume nvmem data cells.
+
+For example:
+	pcap {
+		...
+
+		nvmem-cells = <&soc_revision>;
+		nvmem-cell-names = "soc_revision";
+
+		...
+	};
+
-- 
2.18.0

[PATCH v2 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver

[Nava kishore Manne]

This patch adds zynqmp nvmem firmware driver to access the
SoC revision information from the hardware register.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
		-None.
Changes for v1:
                -None.

Changes for RFC-V3:
                -Changed nvmem_register() to devm_nvmem_register()
                 and pr_debug() to dev_dbg() as suggested by srinivas.

Changes for RFC-V2:
                -None.

 drivers/nvmem/Kconfig        | 15 +++----
 drivers/nvmem/Makefile       |  5 ++-
 drivers/nvmem/zynqmp_nvmem.c | 86 ++++++++++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+), 10 deletions(-)
 create mode 100644 drivers/nvmem/zynqmp_nvmem.c

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 0a7a470ee859..2edb1428ef6d 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -181,15 +181,14 @@ config RAVE_SP_EEPROM
 	help
 	  Say y here to enable Rave SP EEPROM support.
 
-config SC27XX_EFUSE
-	tristate "Spreadtrum SC27XX eFuse Support"
-	depends on MFD_SC27XX_PMIC || COMPILE_TEST
-	depends on HAS_IOMEM
+config NVMEM_ZYNQMP
+	bool "Xilinx ZYNQMP SoC nvmem firmware support"
+	depends on ARCH_ZYNQMP
 	help
-	  This is a simple driver to dump specified values of Spreadtrum
-	  SC27XX PMICs from eFuse.
+	  This is a driver to access hardware related data like
+	  soc revision, IDCODE... etc by using the firmware
+	  interface.
 
-	  This driver can also be built as a module. If so, the module
-	  will be called nvmem-sc27xx-efuse.
+	  If sure, say yes. If unsure, say no.
 
 endif
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index 4e8c61628f1a..0b3abd7f5d02 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -39,5 +39,6 @@ obj-$(CONFIG_NVMEM_SNVS_LPGPR)	+= nvmem_snvs_lpgpr.o
 nvmem_snvs_lpgpr-y		:= snvs_lpgpr.o
 obj-$(CONFIG_RAVE_SP_EEPROM)	+= nvmem-rave-sp-eeprom.o
 nvmem-rave-sp-eeprom-y		:= rave-sp-eeprom.o
-obj-$(CONFIG_SC27XX_EFUSE)	+= nvmem-sc27xx-efuse.o
-nvmem-sc27xx-efuse-y		:= sc27xx-efuse.o
+obj-$(CONFIG_NVMEM_ZYNQMP)     += nvmem_zynqmp_nvmem.o
+nvmem_zynqmp_nvmem-y           := zynqmp_nvmem.o
+
diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c
new file mode 100644
index 000000000000..b910864e91b7
--- /dev/null
+++ b/drivers/nvmem/zynqmp_nvmem.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/firmware/xlnx-zynqmp.h>
+
+#define SILICON_REVISION_MASK 0xF
+
+struct zynqmp_nvmem_data {
+	struct device *dev;
+	struct nvmem_device *nvmem;
+};
+
+static int zynqmp_nvmem_read(void *context, unsigned int offset,
+			     void *val, size_t bytes)
+{
+	int ret;
+	int idcode, version;
+	struct zynqmp_nvmem_data *priv = context;
+
+	const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
+
+	if (!eemi_ops || !eemi_ops->get_chipid)
+		return -ENXIO;
+
+	ret = eemi_ops->get_chipid(&idcode, &version);
+	if (ret < 0)
+		return ret;
+
+	dev_dbg(priv->dev, "Read chipid val %x %x\n", idcode, version);
+	*(int *)val = version & SILICON_REVISION_MASK;
+
+	return 0;
+}
+
+static struct nvmem_config econfig = {
+	.name = "zynqmp-nvmem",
+	.owner = THIS_MODULE,
+	.word_size = 1,
+	.size = 1,
+	.read_only = true,
+};
+
+static const struct of_device_id zynqmp_nvmem_match[] = {
+	{ .compatible = "xlnx,zynqmp-nvmem-fw", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, zynqmp_nvmem_match);
+
+static int zynqmp_nvmem_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct zynqmp_nvmem_data *priv;
+
+	priv = devm_kzalloc(dev, sizeof(struct zynqmp_nvmem_data), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = dev;
+	econfig.dev = dev;
+	econfig.reg_read = zynqmp_nvmem_read;
+	econfig.priv = priv;
+
+	priv->nvmem = devm_nvmem_register(dev, &econfig);
+
+	return PTR_ERR_OR_ZERO(priv->nvmem);
+}
+
+static struct platform_driver zynqmp_nvmem_driver = {
+	.probe = zynqmp_nvmem_probe,
+	.driver = {
+		.name = "zynqmp-nvmem",
+		.of_match_table = zynqmp_nvmem_match,
+	},
+};
+
+module_platform_driver(zynqmp_nvmem_driver);
+
+MODULE_AUTHOR("Michal Simek <michal.simek@xilinx.com>, Nava kishore Manne <navam@xilinx.com>");
+MODULE_DESCRIPTION("ZynqMP NVMEM driver");
+MODULE_LICENSE("GPL");
-- 
2.18.0

[PATCH v2 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver

[Nava kishore Manne]

This patch adds zynqmp nvmem firmware driver to access the
SoC revision information from the hardware register.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
		-None.
Changes for v1:
                -None.

Changes for RFC-V3:
                -Changed nvmem_register() to devm_nvmem_register()
                 and pr_debug() to dev_dbg() as suggested by srinivas.

Changes for RFC-V2:
                -None.

 drivers/nvmem/Kconfig        | 15 +++----
 drivers/nvmem/Makefile       |  5 ++-
 drivers/nvmem/zynqmp_nvmem.c | 86 ++++++++++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+), 10 deletions(-)
 create mode 100644 drivers/nvmem/zynqmp_nvmem.c

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 0a7a470ee859..2edb1428ef6d 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -181,15 +181,14 @@ config RAVE_SP_EEPROM
 	help
 	  Say y here to enable Rave SP EEPROM support.
 
-config SC27XX_EFUSE
-	tristate "Spreadtrum SC27XX eFuse Support"
-	depends on MFD_SC27XX_PMIC || COMPILE_TEST
-	depends on HAS_IOMEM
+config NVMEM_ZYNQMP
+	bool "Xilinx ZYNQMP SoC nvmem firmware support"
+	depends on ARCH_ZYNQMP
 	help
-	  This is a simple driver to dump specified values of Spreadtrum
-	  SC27XX PMICs from eFuse.
+	  This is a driver to access hardware related data like
+	  soc revision, IDCODE... etc by using the firmware
+	  interface.
 
-	  This driver can also be built as a module. If so, the module
-	  will be called nvmem-sc27xx-efuse.
+	  If sure, say yes. If unsure, say no.
 
 endif
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index 4e8c61628f1a..0b3abd7f5d02 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -39,5 +39,6 @@ obj-$(CONFIG_NVMEM_SNVS_LPGPR)	+= nvmem_snvs_lpgpr.o
 nvmem_snvs_lpgpr-y		:= snvs_lpgpr.o
 obj-$(CONFIG_RAVE_SP_EEPROM)	+= nvmem-rave-sp-eeprom.o
 nvmem-rave-sp-eeprom-y		:= rave-sp-eeprom.o
-obj-$(CONFIG_SC27XX_EFUSE)	+= nvmem-sc27xx-efuse.o
-nvmem-sc27xx-efuse-y		:= sc27xx-efuse.o
+obj-$(CONFIG_NVMEM_ZYNQMP)     += nvmem_zynqmp_nvmem.o
+nvmem_zynqmp_nvmem-y           := zynqmp_nvmem.o
+
diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c
new file mode 100644
index 000000000000..b910864e91b7
--- /dev/null
+++ b/drivers/nvmem/zynqmp_nvmem.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/firmware/xlnx-zynqmp.h>
+
+#define SILICON_REVISION_MASK 0xF
+
+struct zynqmp_nvmem_data {
+	struct device *dev;
+	struct nvmem_device *nvmem;
+};
+
+static int zynqmp_nvmem_read(void *context, unsigned int offset,
+			     void *val, size_t bytes)
+{
+	int ret;
+	int idcode, version;
+	struct zynqmp_nvmem_data *priv = context;
+
+	const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
+
+	if (!eemi_ops || !eemi_ops->get_chipid)
+		return -ENXIO;
+
+	ret = eemi_ops->get_chipid(&idcode, &version);
+	if (ret < 0)
+		return ret;
+
+	dev_dbg(priv->dev, "Read chipid val %x %x\n", idcode, version);
+	*(int *)val = version & SILICON_REVISION_MASK;
+
+	return 0;
+}
+
+static struct nvmem_config econfig = {
+	.name = "zynqmp-nvmem",
+	.owner = THIS_MODULE,
+	.word_size = 1,
+	.size = 1,
+	.read_only = true,
+};
+
+static const struct of_device_id zynqmp_nvmem_match[] = {
+	{ .compatible = "xlnx,zynqmp-nvmem-fw", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, zynqmp_nvmem_match);
+
+static int zynqmp_nvmem_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct zynqmp_nvmem_data *priv;
+
+	priv = devm_kzalloc(dev, sizeof(struct zynqmp_nvmem_data), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = dev;
+	econfig.dev = dev;
+	econfig.reg_read = zynqmp_nvmem_read;
+	econfig.priv = priv;
+
+	priv->nvmem = devm_nvmem_register(dev, &econfig);
+
+	return PTR_ERR_OR_ZERO(priv->nvmem);
+}
+
+static struct platform_driver zynqmp_nvmem_driver = {
+	.probe = zynqmp_nvmem_probe,
+	.driver = {
+		.name = "zynqmp-nvmem",
+		.of_match_table = zynqmp_nvmem_match,
+	},
+};
+
+module_platform_driver(zynqmp_nvmem_driver);
+
+MODULE_AUTHOR("Michal Simek <michal.simek@xilinx.com>, Nava kishore Manne <navam@xilinx.com>");
+MODULE_DESCRIPTION("ZynqMP NVMEM driver");
+MODULE_LICENSE("GPL");
-- 
2.18.0


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[PATCH v2 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver

[Nava kishore Manne]

This patch adds zynqmp nvmem firmware driver to access the
SoC revision information from the hardware register.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v2:
		-None.
Changes for v1:
                -None.

Changes for RFC-V3:
                -Changed nvmem_register() to devm_nvmem_register()
                 and pr_debug() to dev_dbg() as suggested by srinivas.

Changes for RFC-V2:
                -None.

 drivers/nvmem/Kconfig        | 15 +++----
 drivers/nvmem/Makefile       |  5 ++-
 drivers/nvmem/zynqmp_nvmem.c | 86 ++++++++++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+), 10 deletions(-)
 create mode 100644 drivers/nvmem/zynqmp_nvmem.c

diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 0a7a470ee859..2edb1428ef6d 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -181,15 +181,14 @@ config RAVE_SP_EEPROM
 	help
 	  Say y here to enable Rave SP EEPROM support.
 
-config SC27XX_EFUSE
-	tristate "Spreadtrum SC27XX eFuse Support"
-	depends on MFD_SC27XX_PMIC || COMPILE_TEST
-	depends on HAS_IOMEM
+config NVMEM_ZYNQMP
+	bool "Xilinx ZYNQMP SoC nvmem firmware support"
+	depends on ARCH_ZYNQMP
 	help
-	  This is a simple driver to dump specified values of Spreadtrum
-	  SC27XX PMICs from eFuse.
+	  This is a driver to access hardware related data like
+	  soc revision, IDCODE... etc by using the firmware
+	  interface.
 
-	  This driver can also be built as a module. If so, the module
-	  will be called nvmem-sc27xx-efuse.
+	  If sure, say yes. If unsure, say no.
 
 endif
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index 4e8c61628f1a..0b3abd7f5d02 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -39,5 +39,6 @@ obj-$(CONFIG_NVMEM_SNVS_LPGPR)	+= nvmem_snvs_lpgpr.o
 nvmem_snvs_lpgpr-y		:= snvs_lpgpr.o
 obj-$(CONFIG_RAVE_SP_EEPROM)	+= nvmem-rave-sp-eeprom.o
 nvmem-rave-sp-eeprom-y		:= rave-sp-eeprom.o
-obj-$(CONFIG_SC27XX_EFUSE)	+= nvmem-sc27xx-efuse.o
-nvmem-sc27xx-efuse-y		:= sc27xx-efuse.o
+obj-$(CONFIG_NVMEM_ZYNQMP)     += nvmem_zynqmp_nvmem.o
+nvmem_zynqmp_nvmem-y           := zynqmp_nvmem.o
+
diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c
new file mode 100644
index 000000000000..b910864e91b7
--- /dev/null
+++ b/drivers/nvmem/zynqmp_nvmem.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/firmware/xlnx-zynqmp.h>
+
+#define SILICON_REVISION_MASK 0xF
+
+struct zynqmp_nvmem_data {
+	struct device *dev;
+	struct nvmem_device *nvmem;
+};
+
+static int zynqmp_nvmem_read(void *context, unsigned int offset,
+			     void *val, size_t bytes)
+{
+	int ret;
+	int idcode, version;
+	struct zynqmp_nvmem_data *priv = context;
+
+	const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
+
+	if (!eemi_ops || !eemi_ops->get_chipid)
+		return -ENXIO;
+
+	ret = eemi_ops->get_chipid(&idcode, &version);
+	if (ret < 0)
+		return ret;
+
+	dev_dbg(priv->dev, "Read chipid val %x %x\n", idcode, version);
+	*(int *)val = version & SILICON_REVISION_MASK;
+
+	return 0;
+}
+
+static struct nvmem_config econfig = {
+	.name = "zynqmp-nvmem",
+	.owner = THIS_MODULE,
+	.word_size = 1,
+	.size = 1,
+	.read_only = true,
+};
+
+static const struct of_device_id zynqmp_nvmem_match[] = {
+	{ .compatible = "xlnx,zynqmp-nvmem-fw", },
+	{ /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, zynqmp_nvmem_match);
+
+static int zynqmp_nvmem_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct zynqmp_nvmem_data *priv;
+
+	priv = devm_kzalloc(dev, sizeof(struct zynqmp_nvmem_data), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->dev = dev;
+	econfig.dev = dev;
+	econfig.reg_read = zynqmp_nvmem_read;
+	econfig.priv = priv;
+
+	priv->nvmem = devm_nvmem_register(dev, &econfig);
+
+	return PTR_ERR_OR_ZERO(priv->nvmem);
+}
+
+static struct platform_driver zynqmp_nvmem_driver = {
+	.probe = zynqmp_nvmem_probe,
+	.driver = {
+		.name = "zynqmp-nvmem",
+		.of_match_table = zynqmp_nvmem_match,
+	},
+};
+
+module_platform_driver(zynqmp_nvmem_driver);
+
+MODULE_AUTHOR("Michal Simek <michal.simek@xilinx.com>, Nava kishore Manne <navam@xilinx.com>");
+MODULE_DESCRIPTION("ZynqMP NVMEM driver");
+MODULE_LICENSE("GPL");
-- 
2.18.0

Re: [PATCH v2 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver

[Srinivas Kandagatla]

On 04/02/2019 07:09, Nava kishore Manne wrote:
>   
> -config SC27XX_EFUSE
> -	tristate "Spreadtrum SC27XX eFuse Support"
> -	depends on MFD_SC27XX_PMIC || COMPILE_TEST
> -	depends on HAS_IOMEM

Why are you removing SC27XX_EFUSE support here?

It does not look right!

> +config NVMEM_ZYNQMP
> +	bool "Xilinx ZYNQMP SoC nvmem firmware support"
> +	depends on ARCH_ZYNQMP
>   	help
> -	  This is a simple driver to dump specified values of Spreadtrum
> -	  SC27XX PMICs from eFuse.
> +	  This is a driver to access hardware related data like
> +	  soc revision, IDCODE... etc by using the firmware
> +	  interface.
>   
> -	  This driver can also be built as a module. If so, the module
> -	  will be called nvmem-sc27xx-efuse.
> +	  If sure, say yes. If unsure, say no.
>   
>   endif
> diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
> index 4e8c61628f1a..0b3abd7f5d02 100644
> --- a/drivers/nvmem/Makefile
> +++ b/drivers/nvmem/Makefile
> @@ -39,5 +39,6 @@ obj-$(CONFIG_NVMEM_SNVS_LPGPR)	+= nvmem_snvs_lpgpr.o
>   nvmem_snvs_lpgpr-y		:= snvs_lpgpr.o
>   obj-$(CONFIG_RAVE_SP_EEPROM)	+= nvmem-rave-sp-eeprom.o
>   nvmem-rave-sp-eeprom-y		:= rave-sp-eeprom.o
> -obj-$(CONFIG_SC27XX_EFUSE)	+= nvmem-sc27xx-efuse.o
> -nvmem-sc27xx-efuse-y		:= sc27xx-efuse.o

same here?

> +obj-$(CONFIG_NVMEM_ZYNQMP)     += nvmem_zynqmp_nvmem.o
> +nvmem_zynqmp_nvmem-y           := zynqmp_nvmem.o
> +

--srini

Re: [PATCH v2 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver

[Srinivas Kandagatla]

On 04/02/2019 07:09, Nava kishore Manne wrote:
>   
> -config SC27XX_EFUSE
> -	tristate "Spreadtrum SC27XX eFuse Support"
> -	depends on MFD_SC27XX_PMIC || COMPILE_TEST
> -	depends on HAS_IOMEM

Why are you removing SC27XX_EFUSE support here?

It does not look right!

> +config NVMEM_ZYNQMP
> +	bool "Xilinx ZYNQMP SoC nvmem firmware support"
> +	depends on ARCH_ZYNQMP
>   	help
> -	  This is a simple driver to dump specified values of Spreadtrum
> -	  SC27XX PMICs from eFuse.
> +	  This is a driver to access hardware related data like
> +	  soc revision, IDCODE... etc by using the firmware
> +	  interface.
>   
> -	  This driver can also be built as a module. If so, the module
> -	  will be called nvmem-sc27xx-efuse.
> +	  If sure, say yes. If unsure, say no.
>   
>   endif
> diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
> index 4e8c61628f1a..0b3abd7f5d02 100644
> --- a/drivers/nvmem/Makefile
> +++ b/drivers/nvmem/Makefile
> @@ -39,5 +39,6 @@ obj-$(CONFIG_NVMEM_SNVS_LPGPR)	+= nvmem_snvs_lpgpr.o
>   nvmem_snvs_lpgpr-y		:= snvs_lpgpr.o
>   obj-$(CONFIG_RAVE_SP_EEPROM)	+= nvmem-rave-sp-eeprom.o
>   nvmem-rave-sp-eeprom-y		:= rave-sp-eeprom.o
> -obj-$(CONFIG_SC27XX_EFUSE)	+= nvmem-sc27xx-efuse.o
> -nvmem-sc27xx-efuse-y		:= sc27xx-efuse.o

same here?

> +obj-$(CONFIG_NVMEM_ZYNQMP)     += nvmem_zynqmp_nvmem.o
> +nvmem_zynqmp_nvmem-y           := zynqmp_nvmem.o
> +

--srini

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RE: [PATCH v2 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver

[Nava kishore Manne]

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Hi Srinivas,



               Thanks for providing the review comments..



> -----Original Message-----

> From: Srinivas Kandagatla [mailto:srinivas.kandagatla@linaro.org]

> Sent: Sunday, February 3, 2019 3:08 PM

> To: Nava kishore Manne <navam@xilinx.com>; robh+dt@kernel.org;

> mark.rutland@arm.com; Michal Simek <michals@xilinx.com>; Jolly Shah

> <JOLLYS@xilinx.com>; Rajan Vaja <RAJANV@xilinx.com>;

> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-

> kernel@vger.kernel.org

> Subject: Re: [PATCH v2 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware

> driver

>

>

>

> On 04/02/2019 07:09, Nava kishore Manne wrote:

> >

> > -config SC27XX_EFUSE

> > -       tristate "Spreadtrum SC27XX eFuse Support"

> > -       depends on MFD_SC27XX_PMIC || COMPILE_TEST

> > -       depends on HAS_IOMEM

>

> Why are you removing SC27XX_EFUSE support here?

>

> It does not look right!

>



Thanks for pointing it...

Yes, we should not remove this support.

By mistake, I have done this changes.. will fix in the next version...



> > +config NVMEM_ZYNQMP

> > +      bool "Xilinx ZYNQMP SoC nvmem firmware support"

> > +      depends on ARCH_ZYNQMP

> >          help

> > -         This is a simple driver to dump specified values of Spreadtrum

> > -         SC27XX PMICs from eFuse.

> > +        This is a driver to access hardware related data like

> > +        soc revision, IDCODE... etc by using the firmware

> > +        interface.

> >

> > -         This driver can also be built as a module. If so, the module

> > -         will be called nvmem-sc27xx-efuse.

> > +        If sure, say yes. If unsure, say no.

> >

> >   endif

> > diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile index

> > 4e8c61628f1a..0b3abd7f5d02 100644

> > --- a/drivers/nvmem/Makefile

> > +++ b/drivers/nvmem/Makefile

> > @@ -39,5 +39,6 @@ obj-$(CONFIG_NVMEM_SNVS_LPGPR)    +=

> nvmem_snvs_lpgpr.o

> >   nvmem_snvs_lpgpr-y                            := snvs_lpgpr.o

> >   obj-$(CONFIG_RAVE_SP_EEPROM)   += nvmem-rave-sp-eeprom.o

> >   nvmem-rave-sp-eeprom-y                   := rave-sp-eeprom.o

> > -obj-$(CONFIG_SC27XX_EFUSE)           += nvmem-sc27xx-efuse.o

> > -nvmem-sc27xx-efuse-y                         := sc27xx-efuse.o

>

> same here?

>



Will fix in the next version...



Regards,

Navakishore.

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