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From: Luis Oliveira <Luis.Oliveira@synopsys.com>
To: Jarkko Nikula <jarkko.nikula@linux.intel.com>,
	Wolfram Sang <wsa@the-dreams.de>,
	Luis Oliveira <Luis.Oliveira@synopsys.com>
Cc: linux-i2c@vger.kernel.org,
	Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: Re: [PATCH] i2c: designware: Don't set SCL timings and speed mode when in slave mode
Date: Thu, 19 Oct 2017 12:52:45 +0100	[thread overview]
Message-ID: <69111a21-8383-07ab-512c-76c80458deab@synopsys.com> (raw)
In-Reply-To: <74ce49f5-8d4d-786c-cf57-24909356e5f5@linux.intel.com>

Hi Jarkko

I will try to have my hardware available asap. But for what I saw it should run
smoothly.

On 19-Oct-17 10:32, Jarkko Nikula wrote:
> Hi Luis
> 
> On 10/05/2017 02:18 PM, Wolfram Sang wrote:
>> On Wed, Aug 23, 2017 at 04:46:12PM +0300, Jarkko Nikula wrote:
>>> According to data sheet SCL timing parameters and DW_IC_CON SPEED mode
>>> bits are not used when operating in slave mode.
>>>
>>> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
>>> ---
>>> I've done quick testing with i2c-slave-eeprom and i2cdump over together
>>> hooked busses without issues. Would like to hear tested by or comment
>>> from Luis though. Patch is not urgent so can wait after vacation etc.
>>
>> Luis?
>>
> Do you have possibility test my patch it doesn't break anything?
> 

Regards,
Luis

  reply	other threads:[~2017-10-19 11:52 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-23 13:46 [PATCH] i2c: designware: Don't set SCL timings and speed mode when in slave mode Jarkko Nikula
2017-10-05 11:18 ` Wolfram Sang
2017-10-19  9:32   ` Jarkko Nikula
2017-10-19 11:52     ` Luis Oliveira [this message]
2017-11-14 11:17       ` Jarkko Nikula
2017-11-22 11:15 ` Luis Oliveira
2017-11-22 11:37   ` Jarkko Nikula
2017-11-27 17:30 ` Wolfram Sang

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